golden top Board Configuration

golden top Board Configuration

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Pin Assignments:

CLOCK
Name Location Direction IO Standard
CLK_100_B3A AV8 input 1.8 V
CLK_100_B3L B2 input 1.8 V
CLK_25_B3L B5 input 1.8 V

Buttons
Name Location Direction IO Standard
BUTTON[0] V31 input 3.0-V LVTTL
BUTTON[1] V30 input 3.0-V LVTTL

Swtiches
Name Location Direction IO Standard
SW[0] AT21 input 1.2 V
SW[1] AM22 input 1.2 V

LED
Name Location Direction IO Standard
LED[0] AP21 output 1.2 V
LED[1] AT20 output 1.2 V

DDR4A
Name Location Direction IO Standard
DDR4A_REFCLK_p D27 input LVDS
DDR4A_A[0] M28 output SSTL-12
DDR4A_A[1] N28 output SSTL-12
DDR4A_A[2] R26 output SSTL-12
DDR4A_A[3] P26 output SSTL-12
DDR4A_A[4] P28 output SSTL-12
DDR4A_A[5] R27 output SSTL-12
DDR4A_A[6] K26 output SSTL-12
DDR4A_A[7] K27 output SSTL-12
DDR4A_A[8] N26 output SSTL-12
DDR4A_A[9] N27 output SSTL-12
DDR4A_A[10] L27 output SSTL-12
DDR4A_A[11] M27 output SSTL-12
DDR4A_A[12] J29 output SSTL-12
DDR4A_A[13] J28 output SSTL-12
DDR4A_A[14] K28 output SSTL-12
DDR4A_A[15] H31 output SSTL-12
DDR4A_A[16] H30 output SSTL-12
DDR4A_BA[0] H27 output SSTL-12
DDR4A_BA[1] G27 output SSTL-12
DDR4A_BG[0] F27 output SSTL-12
DDR4A_CK K31 output DIFFERENTIAL 1.2-V SSTL
DDR4A_CK_n L30 output DIFFERENTIAL 1.2-V SSTL
DDR4A_CKE M30 output SSTL-12
DDR4A_DQS[0] C23 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS[1] N25 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS[2] T23 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS[3] J23 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS[4] D8 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS[5] E14 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS[6] R17 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS[7] N17 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS_n[0] C22 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS_n[1] P25 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS_n[2] R24 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS_n[3] H23 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS_n[4] C8 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS_n[5] F14 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS_n[6] P18 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS_n[7] M17 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQ[0] F24 inout 1.2-V POD
DDR4A_DQ[1] B22 inout 1.2-V POD
DDR4A_DQ[2] E24 inout 1.2-V POD
DDR4A_DQ[3] D23 inout 1.2-V POD
DDR4A_DQ[4] D24 inout 1.2-V POD
DDR4A_DQ[5] A22 inout 1.2-V POD
DDR4A_DQ[6] E23 inout 1.2-V POD
DDR4A_DQ[7] A21 inout 1.2-V POD
DDR4A_DQ[8] J25 inout 1.2-V POD
DDR4A_DQ[9] G25 inout 1.2-V POD
DDR4A_DQ[10] L25 inout 1.2-V POD
DDR4A_DQ[11] J24 inout 1.2-V POD
DDR4A_DQ[12] L24 inout 1.2-V POD
DDR4A_DQ[13] H26 inout 1.2-V POD
DDR4A_DQ[14] M25 inout 1.2-V POD
DDR4A_DQ[15] K24 inout 1.2-V POD
DDR4A_DQ[16] K22 inout 1.2-V POD
DDR4A_DQ[17] L22 inout 1.2-V POD
DDR4A_DQ[18] K23 inout 1.2-V POD
DDR4A_DQ[19] M22 inout 1.2-V POD
DDR4A_DQ[20] M23 inout 1.2-V POD
DDR4A_DQ[21] N22 inout 1.2-V POD
DDR4A_DQ[22] P23 inout 1.2-V POD
DDR4A_DQ[23] N23 inout 1.2-V POD
DDR4A_DQ[24] F21 inout 1.2-V POD
DDR4A_DQ[25] F22 inout 1.2-V POD
DDR4A_DQ[26] E21 inout 1.2-V POD
DDR4A_DQ[27] D21 inout 1.2-V POD
DDR4A_DQ[28] H21 inout 1.2-V POD
DDR4A_DQ[29] G22 inout 1.2-V POD
DDR4A_DQ[30] E22 inout 1.2-V POD
DDR4A_DQ[31] J21 inout 1.2-V POD
DDR4A_DQ[32] D11 inout 1.2-V POD
DDR4A_DQ[33] E11 inout 1.2-V POD
DDR4A_DQ[34] D10 inout 1.2-V POD
DDR4A_DQ[35] F12 inout 1.2-V POD
DDR4A_DQ[36] F11 inout 1.2-V POD
DDR4A_DQ[37] G12 inout 1.2-V POD
DDR4A_DQ[38] C10 inout 1.2-V POD
DDR4A_DQ[39] C11 inout 1.2-V POD
DDR4A_DQ[40] G14 inout 1.2-V POD
DDR4A_DQ[41] D15 inout 1.2-V POD
DDR4A_DQ[42] E13 inout 1.2-V POD
DDR4A_DQ[43] D14 inout 1.2-V POD
DDR4A_DQ[44] G13 inout 1.2-V POD
DDR4A_DQ[45] G15 inout 1.2-V POD
DDR4A_DQ[46] J15 inout 1.2-V POD
DDR4A_DQ[47] H15 inout 1.2-V POD
DDR4A_DQ[48] J16 inout 1.2-V POD
DDR4A_DQ[49] N16 inout 1.2-V POD
DDR4A_DQ[50] K16 inout 1.2-V POD
DDR4A_DQ[51] N15 inout 1.2-V POD
DDR4A_DQ[52] L16 inout 1.2-V POD
DDR4A_DQ[53] P16 inout 1.2-V POD
DDR4A_DQ[54] M15 inout 1.2-V POD
DDR4A_DQ[55] P15 inout 1.2-V POD
DDR4A_DQ[56] M18 inout 1.2-V POD
DDR4A_DQ[57] E16 inout 1.2-V POD
DDR4A_DQ[58] F17 inout 1.2-V POD
DDR4A_DQ[59] G17 inout 1.2-V POD
DDR4A_DQ[60] N18 inout 1.2-V POD
DDR4A_DQ[61] H17 inout 1.2-V POD
DDR4A_DQ[62] L17 inout 1.2-V POD
DDR4A_DQ[63] K17 inout 1.2-V POD
DDR4A_DBI_n[0] G23 inout 1.2-V POD
DDR4A_DBI_n[1] G24 inout 1.2-V POD
DDR4A_DBI_n[2] P24 inout 1.2-V POD
DDR4A_DBI_n[3] H22 inout 1.2-V POD
DDR4A_DBI_n[4] E12 inout 1.2-V POD
DDR4A_DBI_n[5] F15 inout 1.2-V POD
DDR4A_DBI_n[6] L15 inout 1.2-V POD
DDR4A_DBI_n[7] H16 inout 1.2-V POD
DDR4A_CS_n M29 output SSTL-12
DDR4A_RESET_n P31 output 1.2 V
DDR4A_ODT K30 output SSTL-12
DDR4A_PAR P29 output SSTL-12
DDR4A_ALERT_n B23 input 1.2 V
DDR4A_ACT_n L29 output SSTL-12
DDR4A_RZQ J30 input 1.2 V

DDR4B
Name Location Direction IO Standard
DDR4B_REFCLK_p AY19 input LVDS
DDR4B_A[0] AM25 output SSTL-12
DDR4B_A[1] AN25 output SSTL-12
DDR4B_A[2] AP24 output SSTL-12
DDR4B_A[3] AP25 output SSTL-12
DDR4B_A[4] AL24 output SSTL-12
DDR4B_A[5] AM24 output SSTL-12
DDR4B_A[6] AL26 output SSTL-12
DDR4B_A[7] AL25 output SSTL-12
DDR4B_A[8] AP23 output SSTL-12
DDR4B_A[9] AN23 output SSTL-12
DDR4B_A[10] AR23 output SSTL-12
DDR4B_A[11] AR24 output SSTL-12
DDR4B_A[12] AY21 output SSTL-12
DDR4B_A[13] BB19 output SSTL-12
DDR4B_A[14] BA19 output SSTL-12
DDR4B_A[15] AW21 output SSTL-12
DDR4B_A[16] AV21 output SSTL-12
DDR4B_BA[0] BA20 output SSTL-12
DDR4B_BA[1] AW20 output SSTL-12
DDR4B_BG[0] AV20 output SSTL-12
DDR4B_CK AU22 output DIFFERENTIAL 1.2-V SSTL
DDR4B_CK_n AV22 output DIFFERENTIAL 1.2-V SSTL
DDR4B_CKE AV23 output SSTL-12
DDR4B_DQS[0] AT27 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS[1] BB25 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS[2] AP29 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS[3] AK28 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS[4] BB18 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS[5] AM18 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS[6] AK22 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS[7] AH18 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS_n[0] AU27 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS_n[1] BA25 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS_n[2] AR30 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS_n[3] AK27 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS_n[4] BB17 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS_n[5] AN18 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS_n[6] AK21 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS_n[7] AJ18 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQ[0] AV25 inout 1.2-V POD
DDR4B_DQ[1] AW24 inout 1.2-V POD
DDR4B_DQ[2] AW25 inout 1.2-V POD
DDR4B_DQ[3] AY24 inout 1.2-V POD
DDR4B_DQ[4] AT26 inout 1.2-V POD
DDR4B_DQ[5] AT24 inout 1.2-V POD
DDR4B_DQ[6] AR27 inout 1.2-V POD
DDR4B_DQ[7] AU25 inout 1.2-V POD
DDR4B_DQ[8] BA26 inout 1.2-V POD
DDR4B_DQ[9] AY26 inout 1.2-V POD
DDR4B_DQ[10] AY27 inout 1.2-V POD
DDR4B_DQ[11] BA24 inout 1.2-V POD
DDR4B_DQ[12] BB27 inout 1.2-V POD
DDR4B_DQ[13] AW26 inout 1.2-V POD
DDR4B_DQ[14] AV27 inout 1.2-V POD
DDR4B_DQ[15] BA27 inout 1.2-V POD
DDR4B_DQ[16] AP28 inout 1.2-V POD
DDR4B_DQ[17] AT29 inout 1.2-V POD
DDR4B_DQ[18] AP30 inout 1.2-V POD
DDR4B_DQ[19] AM30 inout 1.2-V POD
DDR4B_DQ[20] AR28 inout 1.2-V POD
DDR4B_DQ[21] AT30 inout 1.2-V POD
DDR4B_DQ[22] AN30 inout 1.2-V POD
DDR4B_DQ[23] AL30 inout 1.2-V POD
DDR4B_DQ[24] AM28 inout 1.2-V POD
DDR4B_DQ[25] AP26 inout 1.2-V POD
DDR4B_DQ[26] AK29 inout 1.2-V POD
DDR4B_DQ[27] AN27 inout 1.2-V POD
DDR4B_DQ[28] AL29 inout 1.2-V POD
DDR4B_DQ[29] AM27 inout 1.2-V POD
DDR4B_DQ[30] AK30 inout 1.2-V POD
DDR4B_DQ[31] AN28 inout 1.2-V POD
DDR4B_DQ[32] AV18 inout 1.2-V POD
DDR4B_DQ[33] BA17 inout 1.2-V POD
DDR4B_DQ[34] AW16 inout 1.2-V POD
DDR4B_DQ[35] AY16 inout 1.2-V POD
DDR4B_DQ[36] AV16 inout 1.2-V POD
DDR4B_DQ[37] AW18 inout 1.2-V POD
DDR4B_DQ[38] AU18 inout 1.2-V POD
DDR4B_DQ[39] AV17 inout 1.2-V POD
DDR4B_DQ[40] AR17 inout 1.2-V POD
DDR4B_DQ[41] AT19 inout 1.2-V POD
DDR4B_DQ[42] AR19 inout 1.2-V POD
DDR4B_DQ[43] AT17 inout 1.2-V POD
DDR4B_DQ[44] AP19 inout 1.2-V POD
DDR4B_DQ[45] AR18 inout 1.2-V POD
DDR4B_DQ[46] AR16 inout 1.2-V POD
DDR4B_DQ[47] AT16 inout 1.2-V POD
DDR4B_DQ[48] AK23 inout 1.2-V POD
DDR4B_DQ[49] AJ23 inout 1.2-V POD
DDR4B_DQ[50] AL22 inout 1.2-V POD
DDR4B_DQ[51] AL20 inout 1.2-V POD
DDR4B_DQ[52] AJ24 inout 1.2-V POD
DDR4B_DQ[53] AL21 inout 1.2-V POD
DDR4B_DQ[54] AJ25 inout 1.2-V POD
DDR4B_DQ[55] AK24 inout 1.2-V POD
DDR4B_DQ[56] AK19 inout 1.2-V POD
DDR4B_DQ[57] AK17 inout 1.2-V POD
DDR4B_DQ[58] AL19 inout 1.2-V POD
DDR4B_DQ[59] AK18 inout 1.2-V POD
DDR4B_DQ[60] AM20 inout 1.2-V POD
DDR4B_DQ[61] AJ19 inout 1.2-V POD
DDR4B_DQ[62] AM19 inout 1.2-V POD
DDR4B_DQ[63] AM17 inout 1.2-V POD
DDR4B_DBI_n[0] AU24 inout 1.2-V POD
DDR4B_DBI_n[1] AV26 inout 1.2-V POD
DDR4B_DBI_n[2] AT31 inout 1.2-V POD
DDR4B_DBI_n[3] AL27 inout 1.2-V POD
DDR4B_DBI_n[4] AY18 inout 1.2-V POD
DDR4B_DBI_n[5] AP18 inout 1.2-V POD
DDR4B_DBI_n[6] AH24 inout 1.2-V POD
DDR4B_DBI_n[7] AN17 inout 1.2-V POD
DDR4B_CS_n AT22 output SSTL-12
DDR4B_RESET_n AY22 output 1.2 V
DDR4B_ODT BB23 output SSTL-12
DDR4B_PAR AW23 output SSTL-12
DDR4B_ALERT_n AT25 input 1.2 V
DDR4B_ACT_n AR22 output SSTL-12
DDR4B_RZQ BA21 input 1.2 V

USBFX3
Name Location Direction IO Standard
USBFX3_RESET_n AW11 output 1.8 V
USBFX3_PCLK AV6 output 1.8 V
USBFX3_CTL0_SLCS_n AR3 output 1.8 V
USBFX3_UART_TX AW1 output 1.8 V
USBFX3_UART_RX AU2 input 1.8 V
USBFX3_CTL10 AV11 output 1.8 V
USBFX3_CTL11_A1 AV12 output 1.8 V
USBFX3_CTL12_A0 AV5 output 1.8 V
USBFX3_CTL15_INT_n AP4 input 1.8 V
USBFX3_CTL1_SLWR_n AW9 output 1.8 V
USBFX3_CTL2_SLOE_n AV7 output 1.8 V
USBFX3_CTL3_SLRD_n AV10 output 1.8 V
USBFX3_CTL4_FLAGA AR4 input 1.8 V
USBFX3_CTL5_FLAGB AV2 input 1.8 V
USBFX3_CTL6_FLAGC AU3 input 1.8 V
USBFX3_CTL7_PKTEND_n AV3 output 1.8 V
USBFX3_CTL8_FLAGD AW10 input 1.8 V
USBFX3_CTL9 AU10 output 1.8 V
USBFX3_DQ[0] BA5 inout 1.8 V
USBFX3_DQ[1] BB5 inout 1.8 V
USBFX3_DQ[2] BA4 inout 1.8 V
USBFX3_DQ[3] BB4 inout 1.8 V
USBFX3_DQ[4] AW5 inout 1.8 V
USBFX3_DQ[5] AU5 inout 1.8 V
USBFX3_DQ[6] AY4 inout 1.8 V
USBFX3_DQ[7] AW4 inout 1.8 V
USBFX3_DQ[8] AW3 inout 1.8 V
USBFX3_DQ[9] AY3 inout 1.8 V
USBFX3_DQ[10] AY6 inout 1.8 V
USBFX3_DQ[11] AY7 inout 1.8 V
USBFX3_DQ[12] AU4 inout 1.8 V
USBFX3_DQ[13] BA2 inout 1.8 V
USBFX3_DQ[14] AY2 inout 1.8 V
USBFX3_DQ[15] AV1 inout 1.8 V
USBFX3_DQ[16] AW8 inout 1.8 V
USBFX3_DQ[17] AT7 inout 1.8 V
USBFX3_DQ[18] AU7 inout 1.8 V
USBFX3_DQ[19] AW6 inout 1.8 V
USBFX3_DQ[20] AT9 inout 1.8 V
USBFX3_DQ[21] AU9 inout 1.8 V
USBFX3_DQ[22] AU8 inout 1.8 V
USBFX3_DQ[23] AT10 inout 1.8 V
USBFX3_DQ[24] AT11 inout 1.8 V
USBFX3_DQ[25] AT12 inout 1.8 V
USBFX3_DQ[26] AR11 inout 1.8 V
USBFX3_DQ[27] AR12 inout 1.8 V
USBFX3_DQ[28] AR13 inout 1.8 V
USBFX3_DQ[29] AP13 inout 1.8 V
USBFX3_DQ[30] AU12 inout 1.8 V
USBFX3_DQ[31] AU13 inout 1.8 V
USBFX3_OTG_ID AP3 inout 1.8 V
USBFX3_USB_MODE A5 output 1.8 V

ENETB
Name Location Direction IO Standard
ENETB_REFCLK_p AD34 input LVDS
ENETB_TX_p AB42 output HSSI DIFFERENTIAL I/O
ENETB_RX_p AA36 input HSSI DIFFERENTIAL I/O
ENETB_INT_n E9 input 1.8 V
ENETB_MDC E8 output 1.8 V
ENETB_MDIO A6 inout 1.8 V
ENETB_RST_n A7 output 1.8 V

I2C for EEPROM (Si5341)
Name Location Direction IO Standard
FPGA_I2C_SCL AU19 inout 1.2 V
FPGA_I2C_SDA AU20 inout 1.2 V
FPGA_RST B3 input 1.8 V

FMCL
Name Location Direction IO Standard
FMCL_CLK2_BIDIR_p U3 inout 1.8 V
FMCL_CLK2_BIDIR_n U2 inout 1.8 V
FMCL_CLK3_BIDIR_p AD8 inout 1.8 V
FMCL_CLK3_BIDIR_n AD9 inout 1.8 V
FMCL_HA_p[0] AB13 inout 1.8 V
FMCL_HA_p[1] AE6 inout 1.8 V
FMCL_HA_p[2] AC7 inout 1.8 V
FMCL_HA_p[3] AC10 inout 1.8 V
FMCL_HA_p[4] AB7 inout 1.8 V
FMCL_HA_p[5] AB9 inout 1.8 V
FMCL_HA_p[6] AG13 inout 1.8 V
FMCL_HA_p[7] AD1 inout 1.8 V
FMCL_HA_p[8] AD3 inout 1.8 V
FMCL_HA_p[9] AC6 inout 1.8 V
FMCL_HA_p[10] AD5 inout 1.8 V
FMCL_HA_p[11] AF12 inout 1.8 V
FMCL_HA_p[12] AC12 inout 1.8 V
FMCL_HA_p[13] AC3 inout 1.8 V
FMCL_HA_p[14] AE2 inout 1.8 V
FMCL_HA_p[15] AE7 inout 1.8 V
FMCL_HA_p[16] AE8 inout 1.8 V
FMCL_HA_p[17] AE3 inout 1.8 V
FMCL_HA_p[18] AD11 inout 1.8 V
FMCL_HA_p[19] AG9 inout 1.8 V
FMCL_HA_p[20] AF5 inout 1.8 V
FMCL_HA_p[21] AE12 inout 1.8 V
FMCL_HA_p[22] AG10 inout 1.8 V
FMCL_HA_p[23] AH11 inout 1.8 V
FMCL_HA_n[0] AB12 inout 1.8 V
FMCL_HA_n[1] AD6 inout 1.8 V
FMCL_HA_n[2] AC8 inout 1.8 V
FMCL_HA_n[3] AC11 inout 1.8 V
FMCL_HA_n[4] AB8 inout 1.8 V
FMCL_HA_n[5] AB10 inout 1.8 V
FMCL_HA_n[6] AG12 inout 1.8 V
FMCL_HA_n[7] AC1 inout 1.8 V
FMCL_HA_n[8] AD4 inout 1.8 V
FMCL_HA_n[9] AB5 inout 1.8 V
FMCL_HA_n[10] AC5 inout 1.8 V
FMCL_HA_n[11] AF11 inout 1.8 V
FMCL_HA_n[12] AC13 inout 1.8 V
FMCL_HA_n[13] AC2 inout 1.8 V
FMCL_HA_n[14] AE1 inout 1.8 V
FMCL_HA_n[15] AF7 inout 1.8 V
FMCL_HA_n[16] AE9 inout 1.8 V
FMCL_HA_n[17] AE4 inout 1.8 V
FMCL_HA_n[18] AD10 inout 1.8 V
FMCL_HA_n[19] AF9 inout 1.8 V
FMCL_HA_n[20] AF6 inout 1.8 V
FMCL_HA_n[21] AE11 inout 1.8 V
FMCL_HA_n[22] AF10 inout 1.8 V
FMCL_HA_n[23] AH12 inout 1.8 V
FMCL_HB_p[0] N5 inout 1.8 V
FMCL_HB_p[1] N3 inout 1.8 V
FMCL_HB_p[2] P10 inout 1.8 V
FMCL_HB_p[3] T1 inout 1.8 V
FMCL_HB_p[4] R6 inout 1.8 V
FMCL_HB_p[5] T2 inout 1.8 V
FMCL_HB_p[6] R9 inout 1.8 V
FMCL_HB_p[7] P1 inout 1.8 V
FMCL_HB_p[8] U5 inout 1.8 V
FMCL_HB_p[9] R3 inout 1.8 V
FMCL_HB_p[10] N7 inout 1.8 V
FMCL_HB_p[11] P9 inout 1.8 V
FMCL_HB_p[12] T6 inout 1.8 V
FMCL_HB_p[13] R7 inout 1.8 V
FMCL_HB_p[14] U4 inout 1.8 V
FMCL_HB_p[15] N2 inout 1.8 V
FMCL_HB_p[16] R11 inout 1.8 V
FMCL_HB_p[17] P13 inout 1.8 V
FMCL_HB_p[18] N12 inout 1.8 V
FMCL_HB_p[19] T10 inout 1.8 V
FMCL_HB_p[20] R13 inout 1.8 V
FMCL_HB_p[21] T12 inout 1.8 V
FMCL_HB_n[0] N6 inout 1.8 V
FMCL_HB_n[1] P3 inout 1.8 V
FMCL_HB_n[2] N10 inout 1.8 V
FMCL_HB_n[3] R1 inout 1.8 V
FMCL_HB_n[4] P6 inout 1.8 V
FMCL_HB_n[5] R2 inout 1.8 V
FMCL_HB_n[6] T9 inout 1.8 V
FMCL_HB_n[7] N1 inout 1.8 V
FMCL_HB_n[8] T5 inout 1.8 V
FMCL_HB_n[9] R4 inout 1.8 V
FMCL_HB_n[10] N8 inout 1.8 V
FMCL_HB_n[11] P8 inout 1.8 V
FMCL_HB_n[12] T7 inout 1.8 V
FMCL_HB_n[13] R8 inout 1.8 V
FMCL_HB_n[14] T4 inout 1.8 V
FMCL_HB_n[15] M2 inout 1.8 V
FMCL_HB_n[16] P11 inout 1.8 V
FMCL_HB_n[17] N13 inout 1.8 V
FMCL_HB_n[18] N11 inout 1.8 V
FMCL_HB_n[19] T11 inout 1.8 V
FMCL_HB_n[20] R14 inout 1.8 V
FMCL_HB_n[21] R12 inout 1.8 V
FMCL_HD_p[0] M8 inout 1.8 V
FMCL_HD_p[1] L2 inout 1.8 V
FMCL_HD_p[2] L6 inout 1.8 V
FMCL_HD_p[3] L4 inout 1.8 V
FMCL_HD_p[4] K14 inout 1.8 V
FMCL_HD_p[5] H3 inout 1.8 V
FMCL_HD_p[6] M12 inout 1.8 V
FMCL_HD_p[7] L1 inout 1.8 V
FMCL_HD_p[8] H5 inout 1.8 V
FMCL_HD_p[9] K3 inout 1.8 V
FMCL_HD_p[10] K8 inout 1.8 V
FMCL_HD_p[11] M4 inout 1.8 V
FMCL_HD_p[12] K6 inout 1.8 V
FMCL_HD_p[13] G4 inout 1.8 V
FMCL_HD_p[14] L11 inout 1.8 V
FMCL_HD_p[15] M14 inout 1.8 V
FMCL_HD_p[16] L9 inout 1.8 V
FMCL_HD_p[17] F2 inout 1.8 V
FMCL_HD_p[18] J5 inout 1.8 V
FMCL_HD_p[19] G2 inout 1.8 V
FMCL_HD_p[20] K11 inout 1.8 V
FMCL_HD_p[21] H1 inout 1.8 V
FMCL_HD_p[22] F9 inout 1.8 V
FMCL_HD_p[23] E6 inout 1.8 V
FMCL_HD_n[0] M7 inout 1.8 V
FMCL_HD_n[1] K2 inout 1.8 V
FMCL_HD_n[2] L7 inout 1.8 V
FMCL_HD_n[3] K4 inout 1.8 V
FMCL_HD_n[4] K13 inout 1.8 V
FMCL_HD_n[5] G3 inout 1.8 V
FMCL_HD_n[6] L12 inout 1.8 V
FMCL_HD_n[7] K1 inout 1.8 V
FMCL_HD_n[8] H6 inout 1.8 V
FMCL_HD_n[9] J3 inout 1.8 V
FMCL_HD_n[10] K7 inout 1.8 V
FMCL_HD_n[11] M3 inout 1.8 V
FMCL_HD_n[12] J6 inout 1.8 V
FMCL_HD_n[13] G5 inout 1.8 V
FMCL_HD_n[14] L10 inout 1.8 V
FMCL_HD_n[15] M13 inout 1.8 V
FMCL_HD_n[16] K9 inout 1.8 V
FMCL_HD_n[17] F1 inout 1.8 V
FMCL_HD_n[18] J4 inout 1.8 V
FMCL_HD_n[19] H2 inout 1.8 V
FMCL_HD_n[20] K12 inout 1.8 V
FMCL_HD_n[21] J1 inout 1.8 V
FMCL_HD_n[22] F10 inout 1.8 V
FMCL_HD_n[23] E7 inout 1.8 V
FMCL_LA_p[0] W1 inout 1.8 V
FMCL_LA_p[1] W6 inout 1.8 V
FMCL_LA_p[2] W8 inout 1.8 V
FMCL_LA_p[3] V12 inout 1.8 V
FMCL_LA_p[4] V10 inout 1.8 V
FMCL_LA_p[5] U10 inout 1.8 V
FMCL_LA_p[6] U8 inout 1.8 V
FMCL_LA_p[7] Y7 inout 1.8 V
FMCL_LA_p[8] V7 inout 1.8 V
FMCL_LA_p[9] AH3 inout 1.8 V
FMCL_LA_p[10] AG4 inout 1.8 V
FMCL_LA_p[11] AH10 inout 1.8 V
FMCL_LA_p[12] AJ13 inout 1.8 V
FMCL_LA_p[13] AF1 inout 1.8 V
FMCL_LA_p[14] AH2 inout 1.8 V
FMCL_LA_p[15] AH5 inout 1.8 V
FMCL_LA_p[16] AJ10 inout 1.8 V
FMCL_LA_p[17] AH8 inout 1.8 V
FMCL_LA_p[18] AJ6 inout 1.8 V
FMCL_LA_p[19] AK2 inout 1.8 V
FMCL_LA_p[20] AG7 inout 1.8 V
FMCL_LA_p[21] AL11 inout 1.8 V
FMCL_LA_p[22] AK3 inout 1.8 V
FMCL_LA_p[23] AL7 inout 1.8 V
FMCL_LA_p[24] AJ3 inout 1.8 V
FMCL_LA_p[25] AL14 inout 1.8 V
FMCL_LA_p[26] AK6 inout 1.8 V
FMCL_LA_p[27] AJ1 inout 1.8 V
FMCL_LA_p[28] AL12 inout 1.8 V
FMCL_LA_p[29] AL9 inout 1.8 V
FMCL_LA_p[30] AK12 inout 1.8 V
FMCL_LA_p[31] P5 inout 1.8 V
FMCL_LA_p[32] M10 inout 1.8 V
FMCL_LA_p[33] M5 inout 1.8 V
FMCL_LA_n[0] V1 inout 1.8 V
FMCL_LA_n[1] Y6 inout 1.8 V
FMCL_LA_n[2] V8 inout 1.8 V
FMCL_LA_n[3] U12 inout 1.8 V
FMCL_LA_n[4] V11 inout 1.8 V
FMCL_LA_n[5] U9 inout 1.8 V
FMCL_LA_n[6] U7 inout 1.8 V
FMCL_LA_n[7] AA7 inout 1.8 V
FMCL_LA_n[8] V6 inout 1.8 V
FMCL_LA_n[9] AG3 inout 1.8 V
FMCL_LA_n[10] AF4 inout 1.8 V
FMCL_LA_n[11] AJ11 inout 1.8 V
FMCL_LA_n[12] AH13 inout 1.8 V
FMCL_LA_n[13] AF2 inout 1.8 V
FMCL_LA_n[14] AG2 inout 1.8 V
FMCL_LA_n[15] AG5 inout 1.8 V
FMCL_LA_n[16] AJ9 inout 1.8 V
FMCL_LA_n[17] AJ8 inout 1.8 V
FMCL_LA_n[18] AJ5 inout 1.8 V
FMCL_LA_n[19] AK1 inout 1.8 V
FMCL_LA_n[20] AG8 inout 1.8 V
FMCL_LA_n[21] AL10 inout 1.8 V
FMCL_LA_n[22] AK4 inout 1.8 V
FMCL_LA_n[23] AK8 inout 1.8 V
FMCL_LA_n[24] AJ4 inout 1.8 V
FMCL_LA_n[25] AK14 inout 1.8 V
FMCL_LA_n[26] AK7 inout 1.8 V
FMCL_LA_n[27] AH1 inout 1.8 V
FMCL_LA_n[28] AK11 inout 1.8 V
FMCL_LA_n[29] AK9 inout 1.8 V
FMCL_LA_n[30] AK13 inout 1.8 V
FMCL_LA_n[31] P4 inout 1.8 V
FMCL_LA_n[32] M9 inout 1.8 V
FMCL_LA_n[33] L5 inout 1.8 V
FMCL_CLK0_M2C_p W5 input LVDS
FMCL_CLK1_M2C_p AH6 input LVDS
FMCL_DIR_CLK C7 input 1.8 V
FMCL_DP_C2M_p[0] T42 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[1] U40 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[2] V42 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[3] W40 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[4] Y42 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[5] AA40 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[6] F42 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[7] G40 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[8] H42 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[9] J40 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[10] K42 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[11] L40 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[12] AK42 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[13] AL40 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[14] AM42 output HSSI DIFFERENTIAL I/O
FMCL_DP_C2M_p[15] AN40 output HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[0] R36 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[1] T38 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[2] V38 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[3] U36 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[4] Y38 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[5] W36 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[6] E36 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[7] C36 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[8] G36 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[9] J36 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[10] H38 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[11] L36 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[12] AJ36 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[13] AK38 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[14] AM38 input HSSI DIFFERENTIAL I/O
FMCL_DP_M2C_p[15] AL36 input HSSI DIFFERENTIAL I/O
FMCL_SCL AB31 inout 3.0-V LVTTL
FMCL_SDA AD28 inout 3.0-V LVTTL

FMCR
Name Location Direction IO Standard
FMCR_HC_p[0] G7 inout 1.8 V
FMCR_HC_p[1] AN6 inout 1.8 V
FMCR_HC_p[2] F5 inout 1.8 V
FMCR_HC_p[3] AM12 inout 1.8 V
FMCR_HC_p[4] H7 inout 1.8 V
FMCR_HC_p[5] AM8 inout 1.8 V
FMCR_HC_p[6] H11 inout 1.8 V
FMCR_HC_p[7] J8 inout 1.8 V
FMCR_HC_p[8] G8 inout 1.8 V
FMCR_HC_p[9] F4 inout 1.8 V
FMCR_HC_p[10] A4 inout 1.8 V
FMCR_HC_p[11] C5 inout 1.8 V
FMCR_HC_p[12] E3 inout 1.8 V
FMCR_HC_p[13] D3 inout 1.8 V
FMCR_HC_p[14] E1 inout 1.8 V
FMCR_HC_p[15] C2 inout 1.8 V
FMCR_HC_n[0] F7 inout 1.8 V
FMCR_HC_n[1] AN7 inout 1.8 V
FMCR_HC_n[2] F6 inout 1.8 V
FMCR_HC_n[3] AM13 inout 1.8 V
FMCR_HC_n[4] H8 inout 1.8 V
FMCR_HC_n[5] AM7 inout 1.8 V
FMCR_HC_n[6] H12 inout 1.8 V
FMCR_HC_n[7] J9 inout 1.8 V
FMCR_HC_n[8] G9 inout 1.8 V
FMCR_HC_n[9] E4 inout 1.8 V
FMCR_HC_n[10] B4 inout 1.8 V
FMCR_HC_n[11] D5 inout 1.8 V
FMCR_HC_n[12] E2 inout 1.8 V
FMCR_HC_n[13] D4 inout 1.8 V
FMCR_HC_n[14] D1 inout 1.8 V
FMCR_HC_n[15] C3 inout 1.8 V
FMCR_LA_p[0] AR2 inout 1.8 V
FMCR_LA_p[1] AT4 inout 1.8 V
FMCR_LA_p[2] AN3 inout 1.8 V
FMCR_LA_p[3] AP6 inout 1.8 V
FMCR_LA_p[4] AT6 inout 1.8 V
FMCR_LA_p[5] AR9 inout 1.8 V
FMCR_LA_p[6] AP8 inout 1.8 V
FMCR_LA_p[7] AP10 inout 1.8 V
FMCR_LA_p[8] AR8 inout 1.8 V
FMCR_LA_p[9] AN5 inout 1.8 V
FMCR_LA_p[10] AM4 inout 1.8 V
FMCR_LA_p[11] AM2 inout 1.8 V
FMCR_LA_p[12] AT2 inout 1.8 V
FMCR_LA_p[13] AN10 inout 1.8 V
FMCR_LA_p[14] AP1 inout 1.8 V
FMCR_LA_p[15] AA12 inout 1.8 V
FMCR_LA_p[16] AA10 inout 1.8 V
FMCR_LA_p[17] AN12 inout 1.8 V
FMCR_LA_p[18] AM9 inout 1.8 V
FMCR_LA_p[19] Y11 inout 1.8 V
FMCR_LA_p[20] Y13 inout 1.8 V
FMCR_LA_p[21] W4 inout 1.8 V
FMCR_LA_p[22] AA1 inout 1.8 V
FMCR_LA_p[23] W9 inout 1.8 V
FMCR_LA_p[24] J13 inout 1.8 V
FMCR_LA_p[25] AB4 inout 1.8 V
FMCR_LA_p[26] V3 inout 1.8 V
FMCR_LA_p[27] J10 inout 1.8 V
FMCR_LA_p[28] AA4 inout 1.8 V
FMCR_LA_p[29] AA5 inout 1.8 V
FMCR_LA_p[30] Y3 inout 1.8 V
FMCR_LA_p[31] Y8 inout 1.8 V
FMCR_LA_p[32] AB2 inout 1.8 V
FMCR_LA_p[33] AL1 inout 1.8 V
FMCR_LA_n[0] AR1 inout 1.8 V
FMCR_LA_n[1] AT5 inout 1.8 V
FMCR_LA_n[2] AN2 inout 1.8 V
FMCR_LA_n[3] AP5 inout 1.8 V
FMCR_LA_n[4] AR6 inout 1.8 V
FMCR_LA_n[5] AP9 inout 1.8 V
FMCR_LA_n[6] AN8 inout 1.8 V
FMCR_LA_n[7] AP11 inout 1.8 V
FMCR_LA_n[8] AR7 inout 1.8 V
FMCR_LA_n[9] AM5 inout 1.8 V
FMCR_LA_n[10] AL4 inout 1.8 V
FMCR_LA_n[11] AM3 inout 1.8 V
FMCR_LA_n[12] AT1 inout 1.8 V
FMCR_LA_n[13] AN11 inout 1.8 V
FMCR_LA_n[14] AN1 inout 1.8 V
FMCR_LA_n[15] AA11 inout 1.8 V
FMCR_LA_n[16] AA9 inout 1.8 V
FMCR_LA_n[17] AN13 inout 1.8 V
FMCR_LA_n[18] AM10 inout 1.8 V
FMCR_LA_n[19] W11 inout 1.8 V
FMCR_LA_n[20] Y12 inout 1.8 V
FMCR_LA_n[21] W3 inout 1.8 V
FMCR_LA_n[22] Y1 inout 1.8 V
FMCR_LA_n[23] W10 inout 1.8 V
FMCR_LA_n[24] H13 inout 1.8 V
FMCR_LA_n[25] AB3 inout 1.8 V
FMCR_LA_n[26] V2 inout 1.8 V
FMCR_LA_n[27] J11 inout 1.8 V
FMCR_LA_n[28] Y4 inout 1.8 V
FMCR_LA_n[29] AA6 inout 1.8 V
FMCR_LA_n[30] Y2 inout 1.8 V
FMCR_LA_n[31] Y9 inout 1.8 V
FMCR_LA_n[32] AA2 inout 1.8 V
FMCR_LA_n[33] AL2 inout 1.8 V
FMCR_CLK0_M2C_p AL5 input LVDS
FMCR_CLK1_M2C_p H10 input LVDS
FMCR_DP_C2M_p[0] AU40 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[1] AT42 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[2] AR40 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[3] AP42 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[4] BB34 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[5] BA36 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[6] BB38 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[7] AY38 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[8] BA40 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[9] AV38 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[10] AW40 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[11] AV42 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[12] R40 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[13] P42 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[14] N40 output HSSI DIFFERENTIAL I/O
FMCR_DP_C2M_p[15] M42 output HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[0] AR36 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[1] AN36 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[2] AT38 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[3] AP38 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[4] AV30 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[5] AY30 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[6] BB30 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[7] AW32 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[8] BA32 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[9] AY34 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[10] AU36 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[11] AW36 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[12] P38 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[13] N36 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[14] M38 input HSSI DIFFERENTIAL I/O
FMCR_DP_M2C_p[15] K38 input HSSI DIFFERENTIAL I/O

PCIE Reset
Name Location Direction IO Standard
PCIE_NPERSTL0 AC26 input 3.0-V LVTTL
PCIE_NPERSTL2 AA28 input 3.0-V LVTTL

Transceiver data and reference clock
Name Location Direction IO Standard
CLK2_XCVR_1C_p AT34 input LVDS
LGBTCLK0_1D_p AP34 input LVDS
LGBTCLK1_1M_p P34 input LVDS
LGBTCLK2_1L_p T34 input LVDS
RGBTCLK0_1K_p Y34 input LVDS
RGBTCLK1_1C_p AV34 input LVDS
RGBTCLK2_1E_p AK34 input LVDS
XCVR_REFCLK1D_p AM34 input LVDS
XCVR_REFCLK1E_p AH34 input LVDS
XCVR_REFCLK1K_p AB34 input LVDS
XCVR_REFCLK1L_p V34 input LVDS
XCVR_REFCLK1M_p M34 input LVDS

HPS
Name Location Direction IO Standard
HPS_EMMC_CLK C20 output 1.8 V
HPS_EMMC_CMD L21 inout 1.8 V
HPS_EMMC_DATA[0] J18 inout 1.8 V
HPS_EMMC_DATA[1] K21 inout 1.8 V
HPS_EMMC_DATA[2] H18 inout 1.8 V
HPS_EMMC_DATA[3] P19 inout 1.8 V
HPS_ENETA_MDC B20 output 1.8 V
HPS_ENETA_MDIO R19 inout 1.8 V
HPS_ENETA_RX_CLK B10 input 1.8 V
HPS_ENETA_RX_CTL A17 input 1.8 V
HPS_ENETA_RX_DATA[0] B9 input 1.8 V
HPS_ENETA_RX_DATA[1] A20 input 1.8 V
HPS_ENETA_RX_DATA[2] B19 input 1.8 V
HPS_ENETA_RX_DATA[3] B8 input 1.8 V
HPS_ENETA_TX_CLK A19 output 1.8 V
HPS_ENETA_TX_CTL C17 output 1.8 V
HPS_ENETA_TX_DATA[0] A9 output 1.8 V
HPS_ENETA_TX_DATA[1] B18 output 1.8 V
HPS_ENETA_TX_DATA[2] B12 output 1.8 V
HPS_ENETA_TX_DATA[3] C15 output 1.8 V
HPS_GPIO[0] D18 inout 1.8 V
HPS_GPIO[1] D20 inout 1.8 V
HPS_I2C_SCL N20 inout 1.8 V
HPS_I2C_SDA G18 inout 1.8 V
HPS_OSC_CLK E17 input 1.8 V
HPS_RST D6 input 1.8 V
HPS_UART_CTS M19 input 1.8 V
HPS_UART_RTS F19 output 1.8 V
HPS_UART_RX F20 input 1.8 V
HPS_UART_TX D19 output 1.8 V
HPS_USB_CLK A15 input 1.8 V
HPS_USB_DATA[0] A11 inout 1.8 V
HPS_USB_DATA[1] B13 inout 1.8 V
HPS_USB_DATA[2] B14 inout 1.8 V
HPS_USB_DATA[3] B17 inout 1.8 V
HPS_USB_DATA[4] A10 inout 1.8 V
HPS_USB_DATA[5] A16 inout 1.8 V
HPS_USB_DATA[6] A12 inout 1.8 V
HPS_USB_DATA[7] C16 inout 1.8 V
HPS_USB_DIR C18 input 1.8 V
HPS_USB_NXT A14 input 1.8 V
HPS_USB_STP B15 output 1.8 V

INFO
Name Location Direction IO Standard
INFO_SPI_SCLK AA29 output 3.0-V LVTTL
INFO_SPI_MISO W29 input 3.0-V LVTTL
INFO_SPI_MOSI W28 output 3.0-V LVTTL
INFO_SPI_CS_n Y28 output 3.0-V LVTTL