system

2024.07.12.18:14:20 Datasheet
Overview
Processor
   intel_niosv_g Bantam Lake 2.2.0
All Components
   intel_niosv_g intel_niosv_g 2.2.0
   intel_onchip_memory intel_onchip_memory 1.4.8
   jtag_uart altera_avalon_jtag_uart 19.2.4
   pio_ddr4_cal_done altera_avalon_pio 19.2.3
   pio_key altera_avalon_pio 19.2.3
   sysid_qsys altera_avalon_sysid_qsys 19.1.6
   timer altera_avalon_timer 19.3.4
Memory Map
emif_ph2_axil_driver intel_niosv_g
 axil_driver_axi4_lite  instruction_manager  data_manager
  emif_ph2_ddr4
s0_axi4  0x4000_0000 - 0x7fff_ffff
s0_axil  0x0000_0000 - 0x07ff_ffff
  intel_niosv_g
timer_sw_agent  0x0001_0000 - 0x0001_003f
dm_agent  0x0000_0000 - 0x0000_ffff 0x0000_0000 - 0x0000_ffff
  intel_onchip_memory
s1  0x0080_0000 - 0x0087_ffff 0x0080_0000 - 0x0087_ffff
  jtag_uart
avalon_jtag_slave  0x0001_0040 - 0x0001_0047
  pio_ddr4_cal_done
s1  0x0001_0080 - 0x0001_008f
  pio_key
s1  0x0001_0050 - 0x0001_005f
  sysid_qsys
control_slave  0x0001_0048 - 0x0001_004f
  timer
s1  0x0001_0060 - 0x0001_007f

clock_in

altera_clock_bridge v19.2.0


Parameters

generateLegacySim false
  

Software Assignments

(none)

emif_ph2_axil_driver

emif_ph2_axil_driver v1.0.0
iopll_sys outclk0   emif_ph2_axil_driver
  axil_driver_clk
reset_in out_reset  
  axil_driver_rst_n
mem_reset_handler reset_n_out  
  axil_driver_rst_n
axil_driver_axi4_lite   emif_ph2_ddr4
  s0_axil


Parameters

generateLegacySim false
  

Software Assignments

(none)

emif_ph2_ddr4

emif_ph2 v6.2.0
emif_ph2_axil_driver axil_driver_axi4_lite   emif_ph2_ddr4
  s0_axil
intel_niosv_g data_manager  
  s0_axi4
iopll_sys outclk0  
  s0_axil_clk
outclk0  
  usr_async_clk_0
reset_in out_reset  
  core_init_n_0
out_reset  
  s0_axil_rst_n
mem_reset_handler reset_n_out  
  core_init_n_0
reset_n_out  
  s0_axil_rst_n


Parameters

generateLegacySim false
  

Software Assignments

(none)

intel_niosv_g

intel_niosv_g v2.2.0
iopll_sys outclk0   intel_niosv_g
  clk
reset_in out_reset  
  reset
data_manager   jtag_uart
  avalon_jtag_slave
platform_irq_rx  
  irq
data_manager   sysid_qsys
  control_slave
data_manager   emif_ph2_ddr4
  s0_axi4
data_manager   timer
  s1
platform_irq_rx  
  irq
data_manager   intel_onchip_memory
  s1
instruction_manager  
  s1
data_manager   pio_ddr4_cal_done
  s1
data_manager   pio_key
  s1


Parameters

generateLegacySim false
  

Software Assignments

CPU_FREQ 100000000u
DATA_ADDR_WIDTH 32
DCACHE_LINE_SIZE 32
DCACHE_LINE_SIZE_LOG2 5
DCACHE_SIZE 4096
HAS_CSR_SUPPORT 1
HAS_DEBUG_STUB
ICACHE_LINE_SIZE 32
ICACHE_LINE_SIZE_LOG2 5
ICACHE_SIZE 4096
INST_ADDR_WIDTH 32
MTIME_OFFSET 0x00010000
NIOSV_CORE_VARIANT 3
NUM_GPR 32
RESET_ADDR 0x00800000
TICKS_PER_SEC no_quote(NIOSV_INTERNAL_TIMER_TICKS_PER_SECOND)
TIMER_DEVICE_TYPE 2

intel_onchip_memory

intel_onchip_memory v1.4.8
intel_niosv_g data_manager   intel_onchip_memory
  s1
instruction_manager  
  s1
iopll_sys outclk0  
  clk1
reset_in out_reset  
  reset1


Parameters

generateLegacySim false
  

Software Assignments

ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR 0
CONTENTS_INFO ""
DUAL_PORT 0
GUI_RAM_BLOCK_TYPE AUTO
INIT_CONTENTS_FILE system_intel_onchip_memory_0_intel_onchip_memory
INIT_MEM_CONTENT 1
INSTANCE_ID NONE
NON_DEFAULT_INIT_FILE_ENABLED 0
RAM_BLOCK_TYPE AUTO
READ_DURING_WRITE_MODE DONT_CARE
SINGLE_CLOCK_OP 0
SIZE_MULTIPLE 1
SIZE_VALUE 524288
WRITABLE 1

iopll_sys

altera_iopll v19.3.1
clock_in out_clk   iopll_sys
  refclk
mem_reset_handler conduit_0  
  locked
reset_in out_reset  
  reset
outclk0   emif_ph2_axil_driver
  axil_driver_clk
outclk0   intel_niosv_g
  clk
outclk0   jtag_uart
  clk
outclk0   sysid_qsys
  clk
outclk0   timer
  clk
outclk0   pio_ddr4_cal_done
  clk
outclk0   mem_reset_handler
  clk
outclk0   pio_key
  clk
outclk0   intel_onchip_memory
  clk1
outclk0   emif_ph2_ddr4
  s0_axil_clk
outclk0  
  usr_async_clk_0


Parameters

generateLegacySim false
  

Software Assignments

(none)

jtag_uart

altera_avalon_jtag_uart v19.2.4
intel_niosv_g data_manager   jtag_uart
  avalon_jtag_slave
platform_irq_rx  
  irq
iopll_sys outclk0  
  clk
reset_in out_reset  
  reset


Parameters

generateLegacySim false
  

Software Assignments

READ_DEPTH 64
READ_THRESHOLD 8
WRITE_DEPTH 64
WRITE_THRESHOLD 8

mem_reset_handler

mem_reset_handler v1.0.0
iopll_sys outclk0   mem_reset_handler
  clk
reset_in out_reset  
  reset_n_0
conduit_0   iopll_sys
  locked
reset_n_out   emif_ph2_axil_driver
  axil_driver_rst_n
reset_n_out   emif_ph2_ddr4
  core_init_n_0
reset_n_out  
  s0_axil_rst_n


Parameters

generateLegacySim false
  

Software Assignments

(none)

pio_ddr4_cal_done

altera_avalon_pio v19.2.3
intel_niosv_g data_manager   pio_ddr4_cal_done
  s1
iopll_sys outclk0  
  clk
reset_in out_reset  
  reset


Parameters

generateLegacySim false
  

Software Assignments

BIT_CLEARING_EDGE_REGISTER 0
BIT_MODIFYING_OUTPUT_REGISTER 0
CAPTURE 0
DATA_WIDTH 1
DO_TEST_BENCH_WIRING 0
DRIVEN_SIM_VALUE 0
EDGE_TYPE NONE
FREQ 100000000
HAS_IN 1
HAS_OUT 0
HAS_TRI 0
IRQ_TYPE NONE
RESET_VALUE 0

pio_key

altera_avalon_pio v19.2.3
intel_niosv_g data_manager   pio_key
  s1
iopll_sys outclk0  
  clk
reset_in out_reset  
  reset


Parameters

generateLegacySim false
  

Software Assignments

BIT_CLEARING_EDGE_REGISTER 0
BIT_MODIFYING_OUTPUT_REGISTER 0
CAPTURE 0
DATA_WIDTH 4
DO_TEST_BENCH_WIRING 0
DRIVEN_SIM_VALUE 0
EDGE_TYPE NONE
FREQ 100000000
HAS_IN 1
HAS_OUT 0
HAS_TRI 0
IRQ_TYPE NONE
RESET_VALUE 0

reset_in

altera_reset_bridge v19.2.0
clock_in out_clk   reset_in
  clk
out_reset   emif_ph2_axil_driver
  axil_driver_rst_n
out_reset   emif_ph2_ddr4
  core_init_n_0
out_reset  
  s0_axil_rst_n
out_reset   iopll_sys
  reset
out_reset   intel_niosv_g
  reset
out_reset   jtag_uart
  reset
out_reset   sysid_qsys
  reset
out_reset   timer
  reset
out_reset   pio_ddr4_cal_done
  reset
out_reset   pio_key
  reset
out_reset   intel_onchip_memory
  reset1
out_reset   mem_reset_handler
  reset_n_0


Parameters

generateLegacySim false
  

Software Assignments

(none)

sysid_qsys

altera_avalon_sysid_qsys v19.1.6
intel_niosv_g data_manager   sysid_qsys
  control_slave
iopll_sys outclk0  
  clk
reset_in out_reset  
  reset


Parameters

generateLegacySim false
  

Software Assignments

ID 0
TIMESTAMP 0

timer

altera_avalon_timer v19.3.4
intel_niosv_g data_manager   timer
  s1
platform_irq_rx  
  irq
iopll_sys outclk0  
  clk
reset_in out_reset  
  reset


Parameters

generateLegacySim false
  

Software Assignments

ALWAYS_RUN 0
COUNTER_SIZE 32
FIXED_PERIOD 0
FREQ 100000000
LOAD_VALUE 99999
MULT 0.001
PERIOD 1
PERIOD_UNITS ms
RESET_OUTPUT 0
SNAPSHOT 1
TICKS_PER_SEC 1000
TIMEOUT_PULSE_OUTPUT 0
TIMER_DEVICE_TYPE 1
generation took 0.00 seconds rendering took 0.02 seconds