golden top Board Configuration

golden top Board Configuration

               www.terasic.com

Copyright © 2003-2024 Terasic Inc. All Rights Reserved.

Pin Assignments:

CLOCK
Name Location Direction IO Standard
CLOCK2_50 D8 input 1.8-V LVCMOS
CLOCK3_50 BM71 input 1.2 V
CLOCK_50 CH128 input 3.3-V LVCMOS

KEY
Name Location Direction IO Standard
CPU_RESET_N BM78 input 1.2 V
KEY[0] BW59 input 1.2 V
KEY[1] CA59 input 1.2 V
KEY[2] CF71 input 1.2 V
KEY[3] CH71 input 1.2 V

SW
Name Location Direction IO Standard
SW[0] BM62 input 1.2 V
SW[1] BP62 input 1.2 V
SW[2] BH62 input 1.2 V
SW[3] BH59 input 1.2 V
SW[4] BM59 input 1.2 V
SW[5] BK59 input 1.2 V
SW[6] BU62 input 1.2 V
SW[7] BR62 input 1.2 V
SW[8] BU59 input 1.2 V
SW[9] BR59 input 1.2 V

LED
Name Location Direction IO Standard
LEDR[0] CC71 output 1.2 V
LEDR[1] CA71 output 1.2 V
LEDR[2] CH69 output 1.2 V
LEDR[3] CF69 output 1.2 V
LEDR[4] CA62 output 1.2 V
LEDR[5] CC62 output 1.2 V
LEDR[6] CF62 output 1.2 V
LEDR[7] CH62 output 1.2 V
LEDR[8] CF59 output 1.2 V
LEDR[9] BH78 output 1.2 V

Seg7
Name Location Direction IO Standard
HEX0[0] BP81 output 1.2 V
HEX0[1] BM81 output 1.2 V
HEX0[2] BM89 output 1.2 V
HEX0[3] BK89 output 1.2 V
HEX0[4] BH92 output 1.2 V
HEX0[5] BM92 output 1.2 V
HEX0[6] BP92 output 1.2 V
HEX1[0] CA78 output 1.2 V
HEX1[1] BW78 output 1.2 V
HEX1[2] BU78 output 1.2 V
HEX1[3] BR78 output 1.2 V
HEX1[4] BU81 output 1.2 V
HEX1[5] BR81 output 1.2 V
HEX1[6] CA89 output 1.2 V
HEX2[0] BW89 output 1.2 V
HEX2[1] BU92 output 1.2 V
HEX2[2] BR92 output 1.2 V
HEX2[3] BU89 output 1.2 V
HEX2[4] BR89 output 1.2 V
HEX2[5] CF78 output 1.2 V
HEX2[6] CH78 output 1.2 V
HEX3[0] CC81 output 1.2 V
HEX3[1] CA81 output 1.2 V
HEX3[2] CH81 output 1.2 V
HEX3[3] CF81 output 1.2 V
HEX3[4] CF89 output 1.2 V
HEX3[5] CH89 output 1.2 V
HEX3[6] CH92 output 1.2 V
HEX4[0] CF92 output 1.2 V
HEX4[1] CA92 output 1.2 V
HEX4[2] CC92 output 1.2 V
HEX4[3] CL76 output 1.2 V
HEX4[4] CK76 output 1.2 V
HEX4[5] CL82 output 1.2 V
HEX4[6] CK80 output 1.2 V
HEX5[0] CL85 output 1.2 V
HEX5[1] CK85 output 1.2 V
HEX5[2] BK69 output 1.2 V
HEX5[3] BP71 output 1.2 V
HEX5[4] BH89 output 1.2 V
HEX5[5] BH71 output 1.2 V
HEX5[6] BM69 output 1.2 V

SDRAM
Name Location Direction IO Standard
DRAM_CLK B39 output 1.8-V LVCMOS
DRAM_CKE B35 output 1.8-V LVCMOS
DRAM_ADDR[0] F27 output 1.8-V LVCMOS
DRAM_ADDR[1] F24 output 1.8-V LVCMOS
DRAM_ADDR[2] H27 output 1.8-V LVCMOS
DRAM_ADDR[3] D24 output 1.8-V LVCMOS
DRAM_ADDR[4] H18 output 1.8-V LVCMOS
DRAM_ADDR[5] D15 output 1.8-V LVCMOS
DRAM_ADDR[6] F18 output 1.8-V LVCMOS
DRAM_ADDR[7] F15 output 1.8-V LVCMOS
DRAM_ADDR[8] K8 output 1.8-V LVCMOS
DRAM_ADDR[9] F8 output 1.8-V LVCMOS
DRAM_ADDR[10] C2 output 1.8-V LVCMOS
DRAM_ADDR[11] A17 output 1.8-V LVCMOS
DRAM_ADDR[12] D4 output 1.8-V LVCMOS
DRAM_BA[0] D34 output 1.8-V LVCMOS
DRAM_BA[1] F4 output 1.8-V LVCMOS
DRAM_DQ[0] A14 inout 1.8-V LVCMOS
DRAM_DQ[1] A11 inout 1.8-V LVCMOS
DRAM_DQ[2] B14 inout 1.8-V LVCMOS
DRAM_DQ[3] B11 inout 1.8-V LVCMOS
DRAM_DQ[4] A20 inout 1.8-V LVCMOS
DRAM_DQ[5] A8 inout 1.8-V LVCMOS
DRAM_DQ[6] A23 inout 1.8-V LVCMOS
DRAM_DQ[7] B4 inout 1.8-V LVCMOS
DRAM_DQ[8] B20 inout 1.8-V LVCMOS
DRAM_DQ[9] B23 inout 1.8-V LVCMOS
DRAM_DQ[10] B26 inout 1.8-V LVCMOS
DRAM_DQ[11] B30 inout 1.8-V LVCMOS
DRAM_DQ[12] A39 inout 1.8-V LVCMOS
DRAM_DQ[13] A30 inout 1.8-V LVCMOS
DRAM_DQ[14] A35 inout 1.8-V LVCMOS
DRAM_DQ[15] A33 inout 1.8-V LVCMOS
DRAM_LDQM K4 output 1.8-V LVCMOS
DRAM_UDQM G2 output 1.8-V LVCMOS
DRAM_CS_N H8 output 1.8-V LVCMOS
DRAM_WE_N J2 output 1.8-V LVCMOS
DRAM_CAS_N J1 output 1.8-V LVCMOS
DRAM_RAS_N G1 output 1.8-V LVCMOS

DDR4
Name Location Direction IO Standard
DDR4_REFCLK_P AB117 input 1.2V TRUE DIFFERENTIAL SIGNALING
DDR4_A[0] T114 output SSTL-12
DDR4_A[1] P114 output SSTL-12
DDR4_A[2] V117 output SSTL-12
DDR4_A[3] T117 output SSTL-12
DDR4_A[4] M114 output SSTL-12
DDR4_A[5] K114 output SSTL-12
DDR4_A[6] V108 output SSTL-12
DDR4_A[7] T108 output SSTL-12
DDR4_A[8] T105 output SSTL-12
DDR4_A[9] P105 output SSTL-12
DDR4_A[10] M105 output SSTL-12
DDR4_A[11] K105 output SSTL-12
DDR4_A[12] AG111 output SSTL-12
DDR4_A[13] Y114 output SSTL-12
DDR4_A[14] AB114 output SSTL-12
DDR4_A[15] AK107 output SSTL-12
DDR4_A[16] AK104 output SSTL-12
DDR4_BA[0] AB108 output SSTL-12
DDR4_BA[1] Y105 output SSTL-12
DDR4_BG[0] AB105 output SSTL-12
DDR4_CK H108 output DIFFERENTIAL 1.2-V SSTL
DDR4_CK_N F108 output DIFFERENTIAL 1.2-V SSTL
DDR4_CKE F105 output SSTL-12
DDR4_DQS[0] B122 inout DIFFERENTIAL 1.2-V POD
DDR4_DQS[1] AG90 inout DIFFERENTIAL 1.2-V POD
DDR4_DQS[2] K95 inout DIFFERENTIAL 1.2-V POD
DDR4_DQS[3] F95 inout DIFFERENTIAL 1.2-V POD
DDR4_DQS_N[0] A125 inout DIFFERENTIAL 1.2-V POD
DDR4_DQS_N[1] AG93 inout DIFFERENTIAL 1.2-V POD
DDR4_DQS_N[2] M95 inout DIFFERENTIAL 1.2-V POD
DDR4_DQS_N[3] D95 inout DIFFERENTIAL 1.2-V POD
DDR4_DQ[0] B128 inout 1.2-V POD
DDR4_DQ[1] A116 inout 1.2-V POD
DDR4_DQ[2] A128 inout 1.2-V POD
DDR4_DQ[3] B116 inout 1.2-V POD
DDR4_DQ[4] B130 inout 1.2-V POD
DDR4_DQ[5] B113 inout 1.2-V POD
DDR4_DQ[6] A130 inout 1.2-V POD
DDR4_DQ[7] A113 inout 1.2-V POD
DDR4_DQ[8] AG100 inout 1.2-V POD
DDR4_DQ[9] Y98 inout 1.2-V POD
DDR4_DQ[10] AG104 inout 1.2-V POD
DDR4_DQ[11] Y95 inout 1.2-V POD
DDR4_DQ[12] AC96 inout 1.2-V POD
DDR4_DQ[13] Y87 inout 1.2-V POD
DDR4_DQ[14] AC100 inout 1.2-V POD
DDR4_DQ[15] Y84 inout 1.2-V POD
DDR4_DQ[16] T95 inout 1.2-V POD
DDR4_DQ[17] K84 inout 1.2-V POD
DDR4_DQ[18] P95 inout 1.2-V POD
DDR4_DQ[19] M84 inout 1.2-V POD
DDR4_DQ[20] T98 inout 1.2-V POD
DDR4_DQ[21] V98 inout 1.2-V POD
DDR4_DQ[22] T84 inout 1.2-V POD
DDR4_DQ[23] P84 inout 1.2-V POD
DDR4_DQ[24] M98 inout 1.2-V POD
DDR4_DQ[25] D84 inout 1.2-V POD
DDR4_DQ[26] K98 inout 1.2-V POD
DDR4_DQ[27] K87 inout 1.2-V POD
DDR4_DQ[28] F98 inout 1.2-V POD
DDR4_DQ[29] F84 inout 1.2-V POD
DDR4_DQ[30] H98 inout 1.2-V POD
DDR4_DQ[31] M87 inout 1.2-V POD
DDR4_DBI_N[0] B119 inout 1.2-V POD
DDR4_DBI_N[1] AC90 inout 1.2-V POD
DDR4_DBI_N[2] V87 inout 1.2-V POD
DDR4_DBI_N[3] H87 inout 1.2-V POD
DDR4_CS_N K117 output SSTL-12
DDR4_RESET_N H117 output SSTL-12
DDR4_ODT F114 output SSTL-12
DDR4_PAR K108 output SSTL-12
DDR4_ALERT_N Y108 input 1.2 V
DDR4_ACT_N M117 output SSTL-12
DDR4_RZQ AK111 input 1.2 V

Video-In
Name Location Direction IO Standard
TD_CLK27 BF75 input 1.2 V
TD_HS BE93 input 1.2 V
TD_VS BE96 input 1.2 V
TD_DATA[0] BF72 input 1.2 V
TD_DATA[1] BE75 input 1.2 V
TD_DATA[2] BE79 input 1.2 V
TD_DATA[3] BF83 input 1.2 V
TD_DATA[4] BE83 input 1.2 V
TD_DATA[5] BE86 input 1.2 V
TD_DATA[6] BF86 input 1.2 V
TD_DATA[7] BF90 input 1.2 V
TD_RESET_N BF93 output 1.2 V

HDMI
Name Location Direction IO Standard
HDMI_LRCLK BP112 inout 3.3-V LVCMOS
HDMI_MCLK BM118 inout 3.3-V LVCMOS
HDMI_SCLK BM112 inout 3.3-V LVCMOS
HDMI_TX_CLK CH59 output 1.2 V
HDMI_TX_HS BR109 output 3.3-V LVCMOS
HDMI_TX_VS BE107 output 3.3-V LVCMOS
HDMI_TX_D[0] CD134 output 3.3-V LVCMOS
HDMI_TX_D[1] CD135 output 3.3-V LVCMOS
HDMI_TX_D[2] CG134 output 3.3-V LVCMOS
HDMI_TX_D[3] CG135 output 3.3-V LVCMOS
HDMI_TX_D[4] CH132 output 3.3-V LVCMOS
HDMI_TX_D[5] CF132 output 3.3-V LVCMOS
HDMI_TX_D[6] CF128 output 3.3-V LVCMOS
HDMI_TX_D[7] CK134 output 3.3-V LVCMOS
HDMI_TX_D[8] CL125 output 3.3-V LVCMOS
HDMI_TX_D[9] CF121 output 3.3-V LVCMOS
HDMI_TX_D[10] CF118 output 3.3-V LVCMOS
HDMI_TX_D[11] BU118 output 3.3-V LVCMOS
HDMI_TX_D[12] BR118 output 3.3-V LVCMOS
HDMI_TX_D[13] CA118 output 3.3-V LVCMOS
HDMI_TX_D[14] BW118 output 3.3-V LVCMOS
HDMI_TX_D[15] CL128 output 3.3-V LVCMOS
HDMI_TX_D[16] CL130 output 3.3-V LVCMOS
HDMI_TX_D[17] CK125 output 3.3-V LVCMOS
HDMI_TX_D[18] CK128 output 3.3-V LVCMOS
HDMI_TX_D[19] BF111 output 3.3-V LVCMOS
HDMI_TX_D[20] BH109 output 3.3-V LVCMOS
HDMI_TX_D[21] BE115 output 3.3-V LVCMOS
HDMI_TX_D[22] BF115 output 3.3-V LVCMOS
HDMI_TX_D[23] BU109 output 3.3-V LVCMOS
HDMI_TX_DE BK109 output 3.3-V LVCMOS
HDMI_TX_INT BE111 input 3.3-V LVCMOS
HDMI_I2S BK118 inout 3.3-V LVCMOS

Audio
Name Location Direction IO Standard
AUD_BCLK CL97 inout 1.2 V
AUD_XCK CK97 output 1.2 V
AUD_ADCLRCK CK88 inout 1.2 V
AUD_ADCDAT CL91 input 1.2 V
AUD_DACLRCK CK94 inout 1.2 V
AUD_DACDAT CL88 output 1.2 V

ADC
Name Location Direction IO Standard
ADC_SCLK CH4 output 3.3-V LVCMOS
ADC_DOUT CK4 input 3.3-V LVCMOS
ADC_DIN BF32 output 3.3-V LVCMOS
ADC_CONVST BP22 output 3.3-V LVCMOS

I2C for Audio and Video-In
Name Location Direction IO Standard
FPGA_I2C_SCLK BR112 output 3.3-V LVCMOS
FPGA_I2C_SDAT BM109 inout 3.3-V LVCMOS

GPIO
Name Location Direction IO Standard
GPIO[0] BK31 inout 3.3-V LVCMOS
GPIO[1] BE43 inout 3.3-V LVCMOS
GPIO[2] BF29 inout 3.3-V LVCMOS
GPIO[3] BF40 inout 3.3-V LVCMOS
GPIO[4] BK28 inout 3.3-V LVCMOS
GPIO[5] BM31 inout 3.3-V LVCMOS
GPIO[6] BM28 inout 3.3-V LVCMOS
GPIO[7] BP31 inout 3.3-V LVCMOS
GPIO[8] BR31 inout 3.3-V LVCMOS
GPIO[9] BU28 inout 3.3-V LVCMOS
GPIO[10] BU31 inout 3.3-V LVCMOS
GPIO[11] BW28 inout 3.3-V LVCMOS
GPIO[12] BR22 inout 3.3-V LVCMOS
GPIO[13] BU19 inout 3.3-V LVCMOS
GPIO[14] BU22 inout 3.3-V LVCMOS
GPIO[15] BW19 inout 3.3-V LVCMOS
GPIO[16] BH28 inout 3.3-V LVCMOS
GPIO[17] BR28 inout 3.3-V LVCMOS
GPIO[18] BF36 inout 3.3-V LVCMOS
GPIO[19] BE29 inout 3.3-V LVCMOS
GPIO[20] BM22 inout 3.3-V LVCMOS
GPIO[21] BK22 inout 3.3-V LVCMOS
GPIO[22] BR19 inout 3.3-V LVCMOS
GPIO[23] BM19 inout 3.3-V LVCMOS
GPIO[24] BK19 inout 3.3-V LVCMOS
GPIO[25] BH19 inout 3.3-V LVCMOS
GPIO[26] BF25 inout 3.3-V LVCMOS
GPIO[27] CF9 inout 3.3-V LVCMOS
GPIO[28] CH12 inout 3.3-V LVCMOS
GPIO[29] CF12 inout 3.3-V LVCMOS
GPIO[30] CK2 inout 3.3-V LVCMOS
GPIO[31] CJ2 inout 3.3-V LVCMOS
GPIO[32] BE25 inout 3.3-V LVCMOS
GPIO[33] BF21 inout 3.3-V LVCMOS
GPIO[34] BF16 inout 3.3-V LVCMOS
GPIO[35] BE21 inout 3.3-V LVCMOS

HSMC
Name Location Direction IO Standard
HSMC_GTS_TX_P[0] AU129 output HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_TX_P[1] AR129 output HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_TX_P[2] AN129 output HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_TX_P[3] AL129 output HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_TX_N[0] AU126 output HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_TX_N[1] AR126 output HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_TX_N[2] AN126 output HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_TX_N[3] AL126 output HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_RX_P[0] AT135 input HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_RX_P[1] AP135 input HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_RX_P[2] AM135 input HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_RX_P[3] AK135 input HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_RX_N[0] AT133 input HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_RX_N[1] AP133 input HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_RX_N[2] AM133 input HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_RX_N[3] AK133 input HIGH SPEED DIFFERENTIAL I/O
HSMC_GTS_RX_REFCLK_P AT120 input CURRENT MODE LOGIC (CML)
HSMC_CLK_IN[0] V18 input 2.5-V LVCMOS
HSMC_CLK_IN[1] W2 input 2.5-V LVCMOS
HSMC_CLK_IN[2] V37 input 2.5-V LVCMOS
HSMC_GTS_REFCLK_P AP120 input CURRENT MODE LOGIC (CML)
HSMC_B5B_D[0] BF107 inout 3.3-V LVCMOS
HSMC_B5B_D[1] BF104 inout 3.3-V LVCMOS
HSMC_D[0] K34 inout 2.5-V LVCMOS
HSMC_D[1] F34 inout 2.5-V LVCMOS
HSMC_D[2] K37 inout 2.5-V LVCMOS
HSMC_D[3] H37 inout 2.5-V LVCMOS
HSMC_D[4] P34 inout 2.5-V LVCMOS
HSMC_D[5] M37 inout 2.5-V LVCMOS
HSMC_D[6] Y34 inout 2.5-V LVCMOS
HSMC_D[7] Y15 inout 2.5-V LVCMOS
HSMC_D[8] AK32 inout 2.5-V LVCMOS
HSMC_D[9] M34 inout 2.5-V LVCMOS
HSMC_D[10] AL32 inout 2.5-V LVCMOS
HSMC_D[11] AK21 inout 2.5-V LVCMOS
HSMC_D[12] AG29 inout 2.5-V LVCMOS
HSMC_D[13] AL16 inout 2.5-V LVCMOS
HSMC_D[14] AL29 inout 2.5-V LVCMOS
HSMC_D[15] AJ1 inout 2.5-V LVCMOS
HSMC_D[16] AL25 inout 2.5-V LVCMOS
HSMC_D[17] AB8 inout 2.5-V LVCMOS
HSMC_D[18] AK25 inout 2.5-V LVCMOS
HSMC_D[19] Y8 inout 2.5-V LVCMOS
HSMC_D[20] AK16 inout 2.5-V LVCMOS
HSMC_D[21] AF2 inout 2.5-V LVCMOS
HSMC_D[22] AG13 inout 2.5-V LVCMOS
HSMC_D[23] AB4 inout 2.5-V LVCMOS
HSMC_D[24] AH8 inout 2.5-V LVCMOS
HSMC_D[25] AD1 inout 2.5-V LVCMOS
HSMC_D[26] AH4 inout 2.5-V LVCMOS
HSMC_D[27] AD2 inout 2.5-V LVCMOS
HSMC_D[28] AE4 inout 2.5-V LVCMOS
HSMC_D[29] V8 inout 2.5-V LVCMOS
HSMC_D[30] T15 inout 2.5-V LVCMOS
HSMC_D[31] Y4 inout 2.5-V LVCMOS
HSMC_D[32] T34 inout 2.5-V LVCMOS
HSMC_D[33] AA1 inout 2.5-V LVCMOS
HSMC_D[34] T37 inout 2.5-V LVCMOS
HSMC_D[35] AC43 inout 2.5-V LVCMOS
HSMC_D[36] AC36 inout 2.5-V LVCMOS
HSMC_D[37] Y27 inout 2.5-V LVCMOS
HSMC_D[38] AG36 inout 2.5-V LVCMOS
HSMC_D[39] Y24 inout 2.5-V LVCMOS
HSMC_D[40] AB27 inout 2.5-V LVCMOS
HSMC_D[41] AB18 inout 2.5-V LVCMOS
HSMC_D[42] AB24 inout 2.5-V LVCMOS
HSMC_D[43] T8 inout 2.5-V LVCMOS
HSMC_D[44] V27 inout 2.5-V LVCMOS
HSMC_D[45] U1 inout 2.5-V LVCMOS
HSMC_D[46] AG21 inout 2.5-V LVCMOS
HSMC_D[47] T18 inout 2.5-V LVCMOS
HSMC_D[48] T27 inout 2.5-V LVCMOS
HSMC_D[49] T4 inout 2.5-V LVCMOS
HSMC_D[50] AJ2 inout 2.5-V LVCMOS
HSMC_D[51] R2 inout 2.5-V LVCMOS
HSMC_D[52] AB15 inout 2.5-V LVCMOS
HSMC_D[53] P15 inout 2.5-V LVCMOS
HSMC_D[54] Y18 inout 2.5-V LVCMOS
HSMC_D[55] P4 inout 2.5-V LVCMOS
HSMC_D[56] T24 inout 2.5-V LVCMOS
HSMC_D[57] N2 inout 2.5-V LVCMOS
HSMC_D[58] W1 inout 2.5-V LVCMOS
HSMC_D[59] L1 inout 2.5-V LVCMOS
HSMC_D[60] P24 inout 2.5-V LVCMOS
HSMC_D[61] M4 inout 2.5-V LVCMOS
HSMC_D[62] U2 inout 2.5-V LVCMOS
HSMC_D[63] M8 inout 2.5-V LVCMOS
HSMC_D[64] M27 inout 2.5-V LVCMOS
HSMC_D[65] M15 inout 2.5-V LVCMOS
HSMC_D[66] M24 inout 2.5-V LVCMOS
HSMC_D[67] M18 inout 2.5-V LVCMOS
HSMC_D[68] N1 inout 2.5-V LVCMOS
HSMC_D[69] K15 inout 2.5-V LVCMOS
HSMC_D[70] K27 inout 2.5-V LVCMOS
HSMC_D[71] K18 inout 2.5-V LVCMOS
HSMC_D[72] F37 inout 2.5-V LVCMOS
HSMC_D[73] Y37 inout 2.5-V LVCMOS
HSMC_D[74] AC46 inout 2.5-V LVCMOS
HSMC_D[75] AG40 inout 2.5-V LVCMOS
HSMC_D[76] K24 inout 2.5-V LVCMOS

CAM
Name Location Direction IO Standard
CAM_CLK_P BW69 input DPHY
CAM_CLK_N CA69 input DPHY
CAM_D_P[0] BR69 input DPHY
CAM_D_P[1] BR71 input DPHY
CAM_D_N[0] BU69 input DPHY
CAM_D_N[1] BU71 input DPHY
CAM_I2C_SCL BF120 inout 3.3-V LVCMOS
CAM_I2C_SDA BH118 inout 3.3-V LVCMOS
CAM_GPIO BK112 inout 3.3-V LVCMOS
CAM_RZQ1 BH69 input 1.2 V

HPS
Name Location Direction IO Standard
HPS_CLK_25 AG123 input 1.8 V
HPS_ENET_MDC D124 output 1.8 V
HPS_ENET_MDIO F124 inout 1.8 V
HPS_ENET_RX_CLK J135 input 1.8 V
HPS_ENET_RX_CTL AD135 input 1.8 V
HPS_ENET_RX_DATA[0] K132 input 1.8 V
HPS_ENET_RX_DATA[1] AG129 input 1.8 V
HPS_ENET_RX_DATA[2] G134 input 1.8 V
HPS_ENET_RX_DATA[3] G135 input 1.8 V
HPS_ENET_TX_CLK P132 output 1.8 V
HPS_ENET_TX_CTL L135 output 1.8 V
HPS_ENET_TX_DATA[0] M132 output 1.8 V
HPS_ENET_TX_DATA[1] AD134 output 1.8 V
HPS_ENET_TX_DATA[2] J134 output 1.8 V
HPS_ENET_TX_DATA[3] AG120 output 1.8 V
HPS_GPIO[0] T127 inout 1.8 V
HPS_GPIO[1] Y132 inout 1.8 V
HPS_GSENSOR_INT B134 inout 1.8 V
HPS_I2C_SCL K127 inout 1.8 V
HPS_I2C_SDA M127 inout 1.8 V
HPS_KEY K124 inout 1.8 V
HPS_LCM_BK H127 inout 1.8 V
HPS_LCM_D_C P124 inout 1.8 V
HPS_LCM_RST_N T124 inout 1.8 V
HPS_LCM_SPIM_CLK F127 output 1.8 V
HPS_LCM_SPIM_MOSI Y124 output 1.8 V
HPS_LCM_SPIM_SS AB124 output 1.8 V
HPS_LED Y127 inout 1.8 V
HPS_SD_CLK D132 output 1.8 V
HPS_SD_CMD AB132 inout 1.8 V
HPS_SD_DATA[0] E135 inout 1.8 V
HPS_SD_DATA[1] F132 inout 1.8 V
HPS_SD_DATA[2] AA135 inout 1.8 V
HPS_SD_DATA[3] V127 inout 1.8 V
HPS_UART_RX AB127 input 1.8 V
HPS_UART_TX M124 output 1.8 V
HPS_USB_CLK W135 input 1.8 V
HPS_USB_DATA[0] AK115 inout 1.8 V
HPS_USB_DATA[1] U134 inout 1.8 V
HPS_USB_DATA[2] R134 inout 1.8 V
HPS_USB_DATA[3] AG115 inout 1.8 V
HPS_USB_DATA[4] N135 inout 1.8 V
HPS_USB_DATA[5] AK120 inout 1.8 V
HPS_USB_DATA[6] N134 inout 1.8 V
HPS_USB_DATA[7] T132 inout 1.8 V
HPS_USB_DIR W134 input 1.8 V
HPS_USB_NXT AL120 input 1.8 V
HPS_USB_STP U135 output 1.8 V

IR
Name Location Direction IO Standard
IRDA_TXD BK78 output 1.2 V
IRDA_RXD BH81 input 1.2 V