golden top Board Configuration

golden top Board Configuration

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Pin Assignments:

CLOCK
Name Location Direction IO Standard
CLOCK0_50 DJ35 input 1.1-V
CLOCK1_50 V16 input 3.3-V LVCMOS
CLOCK2_50 BF23 input 3.3-V LVCMOS

KEY
Name Location Direction IO Standard
KEY[0] C8 input 3.3-V LVCMOS
KEY[1] C11 input 3.3-V LVCMOS

SW
Name Location Direction IO Standard
SW[0] DK24 input 1.1-V
SW[1] DD24 input 1.1-V
SW[2] DD27 input 1.1-V
SW[3] DF27 input 1.1-V

LED
Name Location Direction IO Standard
LED[0] DF35 output 1.1-V
LED[1] DJ32 output 1.1-V
LED[2] DN22 output 1.1-V
LED[3] DP23 output 1.1-V
LED[4] DN25 output 1.1-V
LED[5] DP25 output 1.1-V
LED[6] DJ27 output 1.1-V
LED[7] DP30 output 1.1-V

SDRAM
Name Location Direction IO Standard
DRAM_CLK R11 output 1.8-V LVCMOS
DRAM_CKE AE8 output 1.8-V LVCMOS
DRAM_ADDR[0] AC1 output 1.8-V LVCMOS
DRAM_ADDR[1] AH6 output 1.8-V LVCMOS
DRAM_ADDR[2] AC2 output 1.8-V LVCMOS
DRAM_ADDR[3] R8 output 1.8-V LVCMOS
DRAM_ADDR[4] AE11 output 1.8-V LVCMOS
DRAM_ADDR[5] AH14 output 1.8-V LVCMOS
DRAM_ADDR[6] V4 output 1.8-V LVCMOS
DRAM_ADDR[7] AG26 output 1.8-V LVCMOS
DRAM_ADDR[8] AG23 output 1.8-V LVCMOS
DRAM_ADDR[9] V11 output 1.8-V LVCMOS
DRAM_ADDR[10] BE8 output 1.8-V LVCMOS
DRAM_ADDR[11] R6 output 1.8-V LVCMOS
DRAM_ADDR[12] AH11 output 1.8-V LVCMOS
DRAM_BA[0] AT6 output 1.8-V LVCMOS
DRAM_BA[1] AV4 output 1.8-V LVCMOS
DRAM_DQ[0] AU1 inout 1.8-V LVCMOS
DRAM_DQ[1] AJ1 inout 1.8-V LVCMOS
DRAM_DQ[2] BA1 inout 1.8-V LVCMOS
DRAM_DQ[3] AP1 inout 1.8-V LVCMOS
DRAM_DQ[4] AM2 inout 1.8-V LVCMOS
DRAM_DQ[5] BL1 inout 1.8-V LVCMOS
DRAM_DQ[6] AJ2 inout 1.8-V LVCMOS
DRAM_DQ[7] AP2 inout 1.8-V LVCMOS
DRAM_DQ[8] BH4 inout 1.8-V LVCMOS
DRAM_DQ[9] AH4 inout 1.8-V LVCMOS
DRAM_DQ[10] BH6 inout 1.8-V LVCMOS
DRAM_DQ[11] AU2 inout 1.8-V LVCMOS
DRAM_DQ[12] BE6 inout 1.8-V LVCMOS
DRAM_DQ[13] BD2 inout 1.8-V LVCMOS
DRAM_DQ[14] BG2 inout 1.8-V LVCMOS
DRAM_DQ[15] BL2 inout 1.8-V LVCMOS
DRAM_LDQM BD1 output 1.8-V LVCMOS
DRAM_UDQM AT8 output 1.8-V LVCMOS
DRAM_CS_n[0] AF1 output 1.8-V LVCMOS
DRAM_CS_n[1] AE14 output 1.8-V LVCMOS
DRAM_WE_n AV6 output 1.8-V LVCMOS
DRAM_CAS_n AE6 output 1.8-V LVCMOS
DRAM_RAS_n V6 output 1.8-V LVCMOS

LPDDR4A
Name Location Direction IO Standard
LPDDR4A_REFCLK_p B55 input 1.1-V TRUE DIFFERENTIAL SIGNALING
LPDDR4A_CS_n B58 output 1.1-V LVSTL
LPDDR4A_CA[0] B66 output 1.1-V LVSTL
LPDDR4A_CA[1] A68 output 1.1-V LVSTL
LPDDR4A_CA[2] B68 output 1.1-V LVSTL
LPDDR4A_CA[3] A70 output 1.1-V LVSTL
LPDDR4A_CA[4] B63 output 1.1-V LVSTL
LPDDR4A_CA[5] A66 output 1.1-V LVSTL
LPDDR4A_CK J42 output DIFFERENTIAL 1.1-V LVSTL
LPDDR4A_CKE A61 output 1.1-V LVSTL
LPDDR4A_CK_n G42 output DIFFERENTIAL 1.1-V LVSTL
LPDDR4A_DM[0] J59 inout 1.1-V LVSTL
LPDDR4A_DM[1] T59 inout 1.1-V LVSTL
LPDDR4A_DM[2] J27 inout 1.1-V LVSTL
LPDDR4A_DM[3] A25 inout 1.1-V LVSTL
LPDDR4A_DQ[0] T62 inout 1.1-V LVSTL
LPDDR4A_DQ[1] T56 inout 1.1-V LVSTL
LPDDR4A_DQ[2] G56 inout 1.1-V LVSTL
LPDDR4A_DQ[3] E56 inout 1.1-V LVSTL
LPDDR4A_DQ[4] G65 inout 1.1-V LVSTL
LPDDR4A_DQ[5] J65 inout 1.1-V LVSTL
LPDDR4A_DQ[6] M56 inout 1.1-V LVSTL
LPDDR4A_DQ[7] M62 inout 1.1-V LVSTL
LPDDR4A_DQ[8] W62 inout 1.1-V LVSTL
LPDDR4A_DQ[9] M65 inout 1.1-V LVSTL
LPDDR4A_DQ[10] M51 inout 1.1-V LVSTL
LPDDR4A_DQ[11] T51 inout 1.1-V LVSTL
LPDDR4A_DQ[12] AB48 inout 1.1-V LVSTL
LPDDR4A_DQ[13] W48 inout 1.1-V LVSTL
LPDDR4A_DQ[14] T65 inout 1.1-V LVSTL
LPDDR4A_DQ[15] AB62 inout 1.1-V LVSTL
LPDDR4A_DQ[16] G24 inout 1.1-V LVSTL
LPDDR4A_DQ[17] E24 inout 1.1-V LVSTL
LPDDR4A_DQ[18] J35 inout 1.1-V LVSTL
LPDDR4A_DQ[19] T32 inout 1.1-V LVSTL
LPDDR4A_DQ[20] M32 inout 1.1-V LVSTL
LPDDR4A_DQ[21] T24 inout 1.1-V LVSTL
LPDDR4A_DQ[22] G35 inout 1.1-V LVSTL
LPDDR4A_DQ[23] M24 inout 1.1-V LVSTL
LPDDR4A_DQ[24] A22 inout 1.1-V LVSTL
LPDDR4A_DQ[25] A23 inout 1.1-V LVSTL
LPDDR4A_DQ[26] A33 inout 1.1-V LVSTL
LPDDR4A_DQ[27] B33 inout 1.1-V LVSTL
LPDDR4A_DQ[28] B30 inout 1.1-V LVSTL
LPDDR4A_DQ[29] A36 inout 1.1-V LVSTL
LPDDR4A_DQ[30] A20 inout 1.1-V LVSTL
LPDDR4A_DQ[31] B22 inout 1.1-V LVSTL
LPDDR4A_DQS[0] G62 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4A_DQS[1] AB56 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4A_DQS[2] G32 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4A_DQS[3] B28 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4A_DQS_n[0] E62 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4A_DQS_n[1] W56 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4A_DQS_n[2] E32 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4A_DQS_n[3] A30 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4A_RESET_n M48 output 1.1-V LVSTL
LPDDR4A_RZQ T48 input 1.1-V

LPDDR4B
Name Location Direction IO Standard
LPDDR4B_REFCLK_p DK39 input 1.1-V TRUE DIFFERENTIAL SIGNALING
LPDDR4B_CS_n DD42 output 1.1-V LVSTL
LPDDR4B_CA[0] DJ51 output 1.1-V LVSTL
LPDDR4B_CA[1] DF51 output 1.1-V LVSTL
LPDDR4B_CA[2] DD51 output 1.1-V LVSTL
LPDDR4B_CA[3] DD48 output 1.1-V LVSTL
LPDDR4B_CA[4] DK48 output 1.1-V LVSTL
LPDDR4B_CA[5] DJ48 output 1.1-V LVSTL
LPDDR4B_CK DP47 output DIFFERENTIAL 1.1-V LVSTL
LPDDR4B_CKE DJ42 output 1.1-V LVSTL
LPDDR4B_CK_n DN45 output DIFFERENTIAL 1.1-V LVSTL
LPDDR4B_DM[0] DJ59 inout 1.1-V LVSTL
LPDDR4B_DM[1] DP66 inout 1.1-V LVSTL
LPDDR4B_DM[2] DP10 inout 1.1-V LVSTL
LPDDR4B_DM[3] DJ12 inout 1.1-V LVSTL
LPDDR4B_DQ[0] DJ65 inout 1.1-V LVSTL
LPDDR4B_DQ[1] DF65 inout 1.1-V LVSTL
LPDDR4B_DQ[2] DD59 inout 1.1-V LVSTL
LPDDR4B_DQ[3] DJ56 inout 1.1-V LVSTL
LPDDR4B_DQ[4] DD56 inout 1.1-V LVSTL
LPDDR4B_DQ[5] DK56 inout 1.1-V LVSTL
LPDDR4B_DQ[6] DD65 inout 1.1-V LVSTL
LPDDR4B_DQ[7] DD62 inout 1.1-V LVSTL
LPDDR4B_DQ[8] DN73 inout 1.1-V LVSTL
LPDDR4B_DQ[9] DN74 inout 1.1-V LVSTL
LPDDR4B_DQ[10] DP60 inout 1.1-V LVSTL
LPDDR4B_DQ[11] DN58 inout 1.1-V LVSTL
LPDDR4B_DQ[12] DN61 inout 1.1-V LVSTL
LPDDR4B_DQ[13] DP61 inout 1.1-V LVSTL
LPDDR4B_DQ[14] DN68 inout 1.1-V LVSTL
LPDDR4B_DQ[15] DP70 inout 1.1-V LVSTL
LPDDR4B_DQ[16] DN10 inout 1.1-V LVSTL
LPDDR4B_DQ[17] DN17 inout 1.1-V LVSTL
LPDDR4B_DQ[18] DP20 inout 1.1-V LVSTL
LPDDR4B_DQ[19] DN20 inout 1.1-V LVSTL
LPDDR4B_DQ[20] DP7 inout 1.1-V LVSTL
LPDDR4B_DQ[21] DP22 inout 1.1-V LVSTL
LPDDR4B_DQ[22] DN3 inout 1.1-V LVSTL
LPDDR4B_DQ[23] DN7 inout 1.1-V LVSTL
LPDDR4B_DQ[24] DD9 inout 1.1-V LVSTL
LPDDR4B_DQ[25] DD12 inout 1.1-V LVSTL
LPDDR4B_DQ[26] DJ21 inout 1.1-V LVSTL
LPDDR4B_DQ[27] DD21 inout 1.1-V LVSTL
LPDDR4B_DQ[28] DF21 inout 1.1-V LVSTL
LPDDR4B_DQ[29] DD18 inout 1.1-V LVSTL
LPDDR4B_DQ[30] DJ9 inout 1.1-V LVSTL
LPDDR4B_DQ[31] DK9 inout 1.1-V LVSTL
LPDDR4B_DQS[0] DK62 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4B_DQS[1] DP68 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4B_DQS[2] DP15 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4B_DQS[3] DK18 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4B_DQS_n[0] DJ62 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4B_DQS_n[1] DN66 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4B_DQS_n[2] DN15 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4B_DQS_n[3] DJ18 inout DIFFERENTIAL 1.1-V LVSTL
LPDDR4B_RESET_n DN55 output 1.1-V LVSTL
LPDDR4B_RZQ DP58 input 1.1-V

HDMI
Name Location Direction IO Standard
HDMI_LRCLK BR6 inout 3.3-V LVCMOS
HDMI_MCLK CF1 inout 3.3-V LVCMOS
HDMI_SCLK BW1 inout 3.3-V LVCMOS
HDMI_TX_CLK DJ24 output 1.1-V
HDMI_TX_HS BR11 output 3.3-V LVCMOS
HDMI_TX_VS BR14 output 3.3-V LVCMOS
HDMI_TX_D[0] AV19 output 3.3-V LVCMOS
HDMI_TX_D[1] AT11 output 3.3-V LVCMOS
HDMI_TX_D[2] BE11 output 3.3-V LVCMOS
HDMI_TX_D[3] AV14 output 3.3-V LVCMOS
HDMI_TX_D[4] AT19 output 3.3-V LVCMOS
HDMI_TX_D[5] AT14 output 3.3-V LVCMOS
HDMI_TX_D[6] AV16 output 3.3-V LVCMOS
HDMI_TX_D[7] AV11 output 3.3-V LVCMOS
HDMI_TX_D[8] BH11 output 3.3-V LVCMOS
HDMI_TX_D[9] BE14 output 3.3-V LVCMOS
HDMI_TX_D[10] BE19 output 3.3-V LVCMOS
HDMI_TX_D[11] BH14 output 3.3-V LVCMOS
HDMI_TX_D[12] BV6 output 3.3-V LVCMOS
HDMI_TX_D[13] BJ23 output 3.3-V LVCMOS
HDMI_TX_D[14] BV4 output 3.3-V LVCMOS
HDMI_TX_D[15] BU23 output 3.3-V LVCMOS
HDMI_TX_D[16] BH16 output 3.3-V LVCMOS
HDMI_TX_D[17] DA1 output 3.3-V LVCMOS
HDMI_TX_D[18] BH19 output 3.3-V LVCMOS
HDMI_TX_D[19] CP2 output 3.3-V LVCMOS
HDMI_TX_D[20] CM1 output 3.3-V LVCMOS
HDMI_TX_D[21] DA2 output 3.3-V LVCMOS
HDMI_TX_D[22] CP1 output 3.3-V LVCMOS
HDMI_TX_D[23] CU2 output 3.3-V LVCMOS
HDMI_TX_DE CJ2 output 3.3-V LVCMOS
HDMI_I2C_SCL BT1 inout 3.3-V LVCMOS
HDMI_I2C_SDA BW2 inout 3.3-V LVCMOS
HDMI_TX_INT CF2 input 3.3-V LVCMOS
HDMI_I2S CB2 inout 3.3-V LVCMOS

CAM
Name Location Direction IO Standard
CAM_CLK_p DP33 input DPHY
CAM_CLK_n DN30 input DPHY
CAM_D_p[0] DP36 input DPHY
CAM_D_p[1] DP38 input DPHY
CAM_D_n[0] DN33 input DPHY
CAM_D_n[1] DN38 input DPHY
CAM_I2C_SCL BP2 inout 3.3-V LVCMOS
CAM_I2C_SDA BP1 inout 3.3-V LVCMOS
CAM_GPIO BR8 inout 3.3-V LVCMOS
CAM_RZQ1 DD35 input 1.1-V

FPGA UART
Name Location Direction IO Standard
FPGA_UART_TX CJ1 output 3.3-V LVCMOS
FPGA_UART_RX BR19 input 3.3-V LVCMOS

ADC
Name Location Direction IO Standard
ADC_SCK CH6 output 3.3-V LVCMOS
ADC_SDO CH19 input 3.3-V LVCMOS
ADC_SDI CR8 output 3.3-V LVCMOS
ADC_CS_n CE19 output 3.3-V LVCMOS

GPIO
Name Location Direction IO Standard
GPIO0_D[0] H16 inout 3.3-V LVCMOS
GPIO0_D[1] Y1 inout 3.3-V LVCMOS
GPIO0_D[2] C2 inout 3.3-V LVCMOS
GPIO0_D[3] P1 inout 3.3-V LVCMOS
GPIO0_D[4] Y2 inout 3.3-V LVCMOS
GPIO0_D[5] U2 inout 3.3-V LVCMOS
GPIO0_D[6] L1 inout 3.3-V LVCMOS
GPIO0_D[7] F2 inout 3.3-V LVCMOS
GPIO0_D[8] P2 inout 3.3-V LVCMOS
GPIO0_D[9] B3 inout 3.3-V LVCMOS
GPIO0_D[10] H4 inout 3.3-V LVCMOS
GPIO0_D[11] H14 inout 3.3-V LVCMOS
GPIO0_D[12] C6 inout 3.3-V LVCMOS
GPIO0_D[13] H6 inout 3.3-V LVCMOS
GPIO0_D[14] B5 inout 3.3-V LVCMOS
GPIO0_D[15] H11 inout 3.3-V LVCMOS
GPIO0_D[16] C14 inout 3.3-V LVCMOS
GPIO0_D[17] B10 inout 3.3-V LVCMOS
GPIO0_D[18] A15 inout 3.3-V LVCMOS
GPIO0_D[19] A10 inout 3.3-V LVCMOS
GPIO0_D[20] B17 inout 3.3-V LVCMOS
GPIO0_D[21] B15 inout 3.3-V LVCMOS
GPIO0_D[22] AH16 inout 3.3-V LVCMOS
GPIO0_D[23] A13 inout 3.3-V LVCMOS
GPIO0_D[24] AE19 inout 3.3-V LVCMOS
GPIO0_D[25] C19 inout 3.3-V LVCMOS
GPIO0_D[26] H19 inout 3.3-V LVCMOS
GPIO0_D[27] AH19 inout 3.3-V LVCMOS
GPIO0_D[28] R19 inout 3.3-V LVCMOS
GPIO0_D[29] R14 inout 3.3-V LVCMOS
GPIO0_D[30] V19 inout 3.3-V LVCMOS
GPIO0_D[31] V14 inout 3.3-V LVCMOS
GPIO0_D[32] AG31 inout 3.3-V LVCMOS
GPIO0_D[33] AL31 inout 3.3-V LVCMOS
GPIO0_D[34] AL37 inout 3.3-V LVCMOS
GPIO0_D[35] AL34 inout 3.3-V LVCMOS
GPIO1_D[0] BV14 inout 3.3-V LVCMOS
GPIO1_D[1] CG26 inout 3.3-V LVCMOS
GPIO1_D[2] DM2 inout 3.3-V LVCMOS
GPIO1_D[3] CD23 inout 3.3-V LVCMOS
GPIO1_D[4] CG23 inout 3.3-V LVCMOS
GPIO1_D[5] CE14 inout 3.3-V LVCMOS
GPIO1_D[6] CA23 inout 3.3-V LVCMOS
GPIO1_D[7] CH16 inout 3.3-V LVCMOS
GPIO1_D[8] CV16 inout 3.3-V LVCMOS
GPIO1_D[9] CH14 inout 3.3-V LVCMOS
GPIO1_D[10] CR6 inout 3.3-V LVCMOS
GPIO1_D[11] CH11 inout 3.3-V LVCMOS
GPIO1_D[12] CV6 inout 3.3-V LVCMOS
GPIO1_D[13] CR14 inout 3.3-V LVCMOS
GPIO1_D[14] CR19 inout 3.3-V LVCMOS
GPIO1_D[15] CR11 inout 3.3-V LVCMOS
GPIO1_D[16] CV19 inout 3.3-V LVCMOS
GPIO1_D[17] CV11 inout 3.3-V LVCMOS
GPIO1_D[18] CV14 inout 3.3-V LVCMOS
GPIO1_D[19] DJ3 inout 3.3-V LVCMOS
GPIO1_D[20] DF3 inout 3.3-V LVCMOS
GPIO1_D[21] DN2 inout 3.3-V LVCMOS
GPIO1_D[22] CV4 inout 3.3-V LVCMOS
GPIO1_D[23] DD3 inout 3.3-V LVCMOS
GPIO1_D[24] CE11 inout 3.3-V LVCMOS
GPIO1_D[25] CE8 inout 3.3-V LVCMOS
GPIO1_D[26] DE1 inout 3.3-V LVCMOS
GPIO1_D[27] DH1 inout 3.3-V LVCMOS
GPIO1_D[28] DH2 inout 3.3-V LVCMOS
GPIO1_D[29] CH4 inout 3.3-V LVCMOS
GPIO1_D[30] DC2 inout 3.3-V LVCMOS
GPIO1_D[31] DC1 inout 3.3-V LVCMOS
GPIO1_D[32] BV19 inout 3.3-V LVCMOS
GPIO1_D[33] CE6 inout 3.3-V LVCMOS
GPIO1_D[34] BV11 inout 3.3-V LVCMOS
GPIO1_D[35] BV16 inout 3.3-V LVCMOS

HPS
Name Location Direction IO Standard
HPS_CLK_25 AN67 input 1.8-V
HPS_ENET_MDC D71 output 1.8-V
HPS_ENET_MDIO C74 inout 1.8-V
HPS_ENET_RX_CLK BL75 input 1.8-V
HPS_ENET_RX_CTL AP74 input 1.8-V
HPS_ENET_RX_DATA[0] BD74 input 1.8-V
HPS_ENET_RX_DATA[1] AN71 input 1.8-V
HPS_ENET_RX_DATA[2] AJ74 input 1.8-V
HPS_ENET_RX_DATA[3] AJ75 input 1.8-V
HPS_ENET_TX_CLK BP75 output 1.8-V
HPS_ENET_TX_CTL BL74 output 1.8-V
HPS_ENET_TX_DATA[0] BG74 output 1.8-V
HPS_ENET_TX_DATA[1] AP75 output 1.8-V
HPS_ENET_TX_DATA[2] BD75 output 1.8-V
HPS_ENET_TX_DATA[3] AM74 output 1.8-V
HPS_GSENSOR_I2C_EN P75 inout 1.8-V
HPS_GSENSOR_INT Y75 inout 1.8-V
HPS_I2C_SCL N72 inout 1.8-V
HPS_I2C_SDA L75 inout 1.8-V
HPS_KEY F75 inout 1.8-V
HPS_LED AD71 inout 1.8-V
HPS_SD_CLK AC74 output 1.8-V
HPS_SD_CMD AK69 inout 1.8-V
HPS_SD_DATA[0] AF75 inout 1.8-V
HPS_SD_DATA[1] AC75 inout 1.8-V
HPS_SD_DATA[2] AN64 inout 1.8-V
HPS_SD_DATA[3] Y74 inout 1.8-V
HPS_UART_RX AD72 input 1.8-V
HPS_UART_TX N71 output 1.8-V
HPS_USB_CLK BC64 input 1.8-V
HPS_USB_DATA[0] AN72 inout 1.8-V
HPS_USB_DATA[1] AY69 inout 1.8-V
HPS_USB_DATA[2] BC71 inout 1.8-V
HPS_USB_DATA[3] AU74 inout 1.8-V
HPS_USB_DATA[4] AY71 inout 1.8-V
HPS_USB_DATA[5] AU75 inout 1.8-V
HPS_USB_DATA[6] BC72 inout 1.8-V
HPS_USB_DATA[7] BP74 inout 1.8-V
HPS_USB_DIR AY67 input 1.8-V
HPS_USB_NXT BA75 input 1.8-V
HPS_USB_STP BC67 output 1.8-V

FAN
Name Location Direction IO Standard
FAN_ALERT_n DK32 input 1.1-V