nios_system_spi_0 |

2025.06.17.17:34:45 | Datasheet

Overview

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spi_0 altera_avalon_spi 19.2.6
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spi_0
spi_control_port

## spi_0

altera_avalon_spi v19.2.6

## Parameters
clockPhase | 0
clockPolarity | 0
dataWidth | 8
insertDelayBetweenSlaveSelectAndSClk | false
insertSync | false
lsbOrderedFirst | false
masterSPI | true
numberOfSlaves | 1
syncRegDepth | 2
targetClockRate | 250000
targetSlaveSelectToSClkDelay | 0.0
actualClockRate | 250000.0
actualSlaveSelectToSClkDelay | 0.0
deviceFamily | UNKNOWN
generateLegacySim | false

## Software Assignments
CLOCKMULT | 1
CLOCKPHASE | 0
CLOCKPOLARITY | 0
CLOCKUNITS | "Hz"
DATABITS | 8
DATAWIDTH | 16
DELAYMULT | "1.0E-9"
DELAYUNITS | "ns"
EXTRADELAY | 0
INSERT_SYNC | 0
ISMASTER | 1
LSBFIRST | 0
NUMSLAVES | 1
PREFIX | "spi_"
SYNC_REG_DEPTH | 2
TARGETCLOCK | 250000u
TARGETSSDELAY | "0.0"

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