EMIF_LPDDR4_clock_bridge_0
2025.10.08.15:32:16
Datasheet
Overview
Memory Map
clock_bridge_0
altera_clock_bridge v19.2.0
Parameters
DERIVED_CLOCK_RATE
310000000
EXPLICIT_CLOCK_RATE
310000000
NUM_CLOCK_OUTPUTS
1
deviceFamily
UNKNOWN
generateLegacySim
false
Software Assignments
(none)
generation took 0.00 seconds
rendering took 0.03 seconds