Qsys

2026.01.28.10:16:13 Datasheet
Overview
Processor
   intel_niosv_m Abbotts Lake 26.0.0
All Components
   board_temperature altera_avalon_pio 19.2.4
   fpga_temperature altera_avalon_pio 19.2.4
   intel_niosv_m intel_niosv_m 26.0.0
   intel_onchip_memory intel_onchip_memory 1.4.10
   jtag_uart altera_avalon_jtag_uart 19.3.1
   key altera_avalon_pio 19.2.4
   led altera_avalon_pio 19.2.4
   pio_fan altera_avalon_pio 19.2.4
   power_current altera_avalon_pio 19.2.4
   power_voltage altera_avalon_pio 19.2.4
   sw altera_avalon_pio 19.2.4
   sysid_qsys altera_avalon_sysid_qsys 20.0.0
Memory Map
intel_niosv_m
 instruction_manager  data_manager
  board_temperature
s1  0x0009_0060 - 0x0009_006f
  fpga_temperature
s1  0x0009_0070 - 0x0009_007f
  intel_niosv_m
timer_sw_agent  0x0009_0000 - 0x0009_003f
dm_agent  0x0008_0000 - 0x0008_ffff 0x0008_0000 - 0x0008_ffff
  intel_onchip_memory
s1  0x0000_0000 - 0x0007_ffff 0x0000_0000 - 0x0007_ffff
  jtag_uart
avalon_jtag_slave  0x0009_0100 - 0x0009_0107
  key
s1  0x0009_00a0 - 0x0009_00af
  led
s1  0x0009_0090 - 0x0009_009f
  pio_fan
s1  0x0009_0080 - 0x0009_008f
  power_current
s1  0x0009_0040 - 0x0009_004f
  power_voltage
s1  0x0009_0050 - 0x0009_005f
  sw
s1  0x0009_00b0 - 0x0009_00bf
  sysid_qsys
control_slave  0x0009_00f8 - 0x0009_00ff

board_temperature

altera_avalon_pio v19.2.4
intel_niosv_m data_manager   board_temperature
  s1
clock_in out_clk  
  clk
reset_controller_clock_in reset_out  
  reset


Parameters

generateLegacySim false
  

Software Assignments

BIT_CLEARING_EDGE_REGISTER 0
BIT_MODIFYING_OUTPUT_REGISTER 0
CAPTURE 0
DATA_WIDTH 16
DO_TEST_BENCH_WIRING 0
DRIVEN_SIM_VALUE 0
EDGE_TYPE NONE
FREQ 50000000
HAS_IN 1
HAS_OUT 0
HAS_TRI 0
IRQ_TYPE NONE
RESET_VALUE 0

clock_in

altera_clock_bridge v19.2.0


Parameters

generateLegacySim false
  

Software Assignments

(none)

fpga_temperature

altera_avalon_pio v19.2.4
intel_niosv_m data_manager   fpga_temperature
  s1
clock_in out_clk  
  clk
reset_controller_clock_in reset_out  
  reset


Parameters

generateLegacySim false
  

Software Assignments

BIT_CLEARING_EDGE_REGISTER 0
BIT_MODIFYING_OUTPUT_REGISTER 0
CAPTURE 0
DATA_WIDTH 16
DO_TEST_BENCH_WIRING 0
DRIVEN_SIM_VALUE 0
EDGE_TYPE NONE
FREQ 50000000
HAS_IN 1
HAS_OUT 0
HAS_TRI 0
IRQ_TYPE NONE
RESET_VALUE 0

intel_niosv_m

intel_niosv_m v26.0.0
clock_in out_clk   intel_niosv_m
  clk
reset_controller_clock_in reset_out  
  reset
data_manager   jtag_uart
  avalon_jtag_slave
platform_irq_rx  
  irq
data_manager   sysid_qsys
  control_slave
data_manager   intel_onchip_memory
  s1
instruction_manager  
  s1
data_manager   sw
  s1
platform_irq_rx  
  irq
data_manager   key
  s1
platform_irq_rx  
  irq
data_manager   led
  s1
data_manager   pio_fan
  s1
data_manager   fpga_temperature
  s1
data_manager   board_temperature
  s1
data_manager   power_voltage
  s1
data_manager   power_current
  s1


Parameters

generateLegacySim false
  

Software Assignments

CPU_FREQ 50000000u
DATA_ADDR_WIDTH 32
DCACHE_LINE_SIZE 0
DCACHE_LINE_SIZE_LOG2 0
DCACHE_SIZE 0
HAS_CSR_SUPPORT 1
HAS_DEBUG_STUB
ICACHE_LINE_SIZE 0
ICACHE_LINE_SIZE_LOG2 0
ICACHE_SIZE 0
INST_ADDR_WIDTH 32
INT_MODE 0
MTIME_OFFSET 0x00090000
NIOSV_CORE_VARIANT 1
NUM_GPR 32
RESET_ADDR 0x00000000
TICKS_PER_SEC no_quote(NIOSV_INTERNAL_TIMER_TICKS_PER_SECOND)
TIMER_DEVICE_TYPE 2

intel_onchip_memory

intel_onchip_memory v1.4.10
intel_niosv_m data_manager   intel_onchip_memory
  s1
instruction_manager  
  s1
clock_in out_clk  
  clk1
reset_controller_clock_in reset_out  
  reset1


Parameters

generateLegacySim false
  

Software Assignments

ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR 0
CONTENTS_INFO ""
DUAL_PORT 0
GUI_RAM_BLOCK_TYPE AUTO
INIT_CONTENTS_FILE Qsys_intel_onchip_memory_0_intel_onchip_memory_0
INIT_MEM_CONTENT 1
INSTANCE_ID NONE
NON_DEFAULT_INIT_FILE_ENABLED 0
RAM_BLOCK_TYPE AUTO
READ_DURING_WRITE_MODE DONT_CARE
SINGLE_CLOCK_OP 0
SIZE_MULTIPLE 1
SIZE_VALUE 524288
WRITABLE 1

jtag_uart

altera_avalon_jtag_uart v19.3.1
intel_niosv_m data_manager   jtag_uart
  avalon_jtag_slave
platform_irq_rx  
  irq
clock_in out_clk  
  clk
reset_controller_clock_in reset_out  
  reset


Parameters

generateLegacySim false
  

Software Assignments

READ_DEPTH 64
READ_THRESHOLD 8
WRITE_DEPTH 64
WRITE_THRESHOLD 8

key

altera_avalon_pio v19.2.4
intel_niosv_m data_manager   key
  s1
platform_irq_rx  
  irq
clock_in out_clk  
  clk
reset_controller_clock_in reset_out  
  reset


Parameters

generateLegacySim false
  

Software Assignments

BIT_CLEARING_EDGE_REGISTER 0
BIT_MODIFYING_OUTPUT_REGISTER 0
CAPTURE 1
DATA_WIDTH 1
DO_TEST_BENCH_WIRING 0
DRIVEN_SIM_VALUE 0
EDGE_TYPE ANY
FREQ 50000000
HAS_IN 1
HAS_OUT 0
HAS_TRI 0
IRQ_TYPE EDGE
RESET_VALUE 0

led

altera_avalon_pio v19.2.4
intel_niosv_m data_manager   led
  s1
clock_in out_clk  
  clk
reset_controller_clock_in reset_out  
  reset


Parameters

generateLegacySim false
  

Software Assignments

BIT_CLEARING_EDGE_REGISTER 0
BIT_MODIFYING_OUTPUT_REGISTER 0
CAPTURE 0
DATA_WIDTH 1
DO_TEST_BENCH_WIRING 0
DRIVEN_SIM_VALUE 0
EDGE_TYPE NONE
FREQ 50000000
HAS_IN 0
HAS_OUT 1
HAS_TRI 0
IRQ_TYPE NONE
RESET_VALUE 0

pio_fan

altera_avalon_pio v19.2.4
intel_niosv_m data_manager   pio_fan
  s1
clock_in out_clk  
  clk
reset_controller_clock_in reset_out  
  reset


Parameters

generateLegacySim false
  

Software Assignments

BIT_CLEARING_EDGE_REGISTER 0
BIT_MODIFYING_OUTPUT_REGISTER 0
CAPTURE 0
DATA_WIDTH 32
DO_TEST_BENCH_WIRING 0
DRIVEN_SIM_VALUE 0
EDGE_TYPE NONE
FREQ 50000000
HAS_IN 1
HAS_OUT 1
HAS_TRI 0
IRQ_TYPE NONE
RESET_VALUE 75036

power_current

altera_avalon_pio v19.2.4
intel_niosv_m data_manager   power_current
  s1
clock_in out_clk  
  clk
reset_controller_clock_in reset_out  
  reset


Parameters

generateLegacySim false
  

Software Assignments

BIT_CLEARING_EDGE_REGISTER 0
BIT_MODIFYING_OUTPUT_REGISTER 0
CAPTURE 0
DATA_WIDTH 16
DO_TEST_BENCH_WIRING 0
DRIVEN_SIM_VALUE 0
EDGE_TYPE NONE
FREQ 50000000
HAS_IN 1
HAS_OUT 0
HAS_TRI 0
IRQ_TYPE NONE
RESET_VALUE 0

power_voltage

altera_avalon_pio v19.2.4
intel_niosv_m data_manager   power_voltage
  s1
clock_in out_clk  
  clk
reset_controller_clock_in reset_out  
  reset


Parameters

generateLegacySim false
  

Software Assignments

BIT_CLEARING_EDGE_REGISTER 0
BIT_MODIFYING_OUTPUT_REGISTER 0
CAPTURE 0
DATA_WIDTH 16
DO_TEST_BENCH_WIRING 0
DRIVEN_SIM_VALUE 0
EDGE_TYPE NONE
FREQ 50000000
HAS_IN 1
HAS_OUT 0
HAS_TRI 0
IRQ_TYPE NONE
RESET_VALUE 0

reset_controller_clock_in

altera_reset_controller v19.2.4
clock_in out_clk   reset_controller_clock_in
  clk
reset_in out_reset  
  reset_in0
reset_out   intel_niosv_m
  reset
reset_out   jtag_uart
  reset
reset_out   sysid_qsys
  reset
reset_out   key
  reset
reset_out   sw
  reset
reset_out   led
  reset
reset_out   pio_fan
  reset
reset_out   fpga_temperature
  reset
reset_out   power_current
  reset
reset_out   power_voltage
  reset
reset_out   board_temperature
  reset
reset_out   intel_onchip_memory
  reset1


Parameters

generateLegacySim false
  

Software Assignments

(none)

reset_in

altera_reset_bridge v19.2.0


Parameters

generateLegacySim false
  

Software Assignments

(none)

sw

altera_avalon_pio v19.2.4
intel_niosv_m data_manager   sw
  s1
platform_irq_rx  
  irq
clock_in out_clk  
  clk
reset_controller_clock_in reset_out  
  reset


Parameters

generateLegacySim false
  

Software Assignments

BIT_CLEARING_EDGE_REGISTER 0
BIT_MODIFYING_OUTPUT_REGISTER 0
CAPTURE 1
DATA_WIDTH 3
DO_TEST_BENCH_WIRING 0
DRIVEN_SIM_VALUE 0
EDGE_TYPE ANY
FREQ 50000000
HAS_IN 1
HAS_OUT 0
HAS_TRI 0
IRQ_TYPE EDGE
RESET_VALUE 0

sysid_qsys

altera_avalon_sysid_qsys v20.0.0
intel_niosv_m data_manager   sysid_qsys
  control_slave
clock_in out_clk  
  clk
reset_controller_clock_in reset_out  
  reset


Parameters

generateLegacySim false
  

Software Assignments

ID 0
generation took 0.01 seconds rendering took 0.08 seconds