# TCL File Generated by Component Editor 24.3
# Tue Apr 08 18:49:52 CST 2025
# DO NOT MODIFY


# 
# terasic_sdio "terasic_sdio" v1.0
#  2025.04.08.18:49:52
# 
# 

# 
# request TCL package from ACDS 24.3
# 
package require -exact qsys 24.3


# 
# module terasic_sdio
# 
set_module_property DESCRIPTION ""
set_module_property NAME terasic_sdio
set_module_property VERSION 1.0
set_module_property INTERNAL false
set_module_property OPAQUE_ADDRESS_MAP true
set_module_property BSP_CPU false
set_module_property GROUP Terasic/sdio
set_module_property AUTHOR ""
set_module_property DISPLAY_NAME terasic_sdio
set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
set_module_property EDITABLE true
set_module_property REPORT_TO_TALKBACK false
set_module_property ALLOW_GREYBOX_GENERATION false
set_module_property REPORT_HIERARCHY false
set_module_property LOAD_ELABORATION_LIMIT 0
set_module_property PRE_COMP_MODULE_ENABLED false


# 
# file sets
# 
add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
set_fileset_property QUARTUS_SYNTH TOP_LEVEL terasic_sdio
set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
add_fileset_file terasic_sdio.v VERILOG PATH ip/terasic_sdcard/terasic_sdio.v TOP_LEVEL_FILE
add_fileset_file crc16_serial.v VERILOG PATH ip/terasic_sdcard/crc16_serial.v
add_fileset_file crc7_serial.v VERILOG PATH ip/terasic_sdcard/crc7_serial.v
add_fileset_file sdio.v VERILOG PATH ip/terasic_sdcard/sdio.v


# 
# parameters
# 
add_parameter CLK_FREQ INTEGER 50000000 ""
set_parameter_property CLK_FREQ DEFAULT_VALUE 50000000
set_parameter_property CLK_FREQ DISPLAY_NAME CLK_FREQ
set_parameter_property CLK_FREQ UNITS None
set_parameter_property CLK_FREQ ALLOWED_RANGES -2147483648:2147483647
set_parameter_property CLK_FREQ DESCRIPTION ""
set_parameter_property CLK_FREQ AFFECTS_GENERATION false
set_parameter_property CLK_FREQ HDL_PARAMETER true
set_parameter_property CLK_FREQ EXPORT true


# 
# display items
# 


# 
# connection point clock
# 
add_interface clock clock end
set_interface_property clock ENABLED true
set_interface_property clock EXPORT_OF ""
set_interface_property clock PORT_NAME_MAP ""
set_interface_property clock CMSIS_SVD_VARIABLES ""
set_interface_property clock SVD_ADDRESS_GROUP ""
set_interface_property clock IPXACT_REGISTER_MAP_VARIABLES ""
set_interface_property clock SV_INTERFACE_TYPE ""
set_interface_property clock SV_INTERFACE_MODPORT_TYPE ""

add_interface_port clock clk clk Input 1


# 
# connection point reset
# 
add_interface reset reset end
set_interface_property reset associatedClock clock
set_interface_property reset synchronousEdges DEASSERT
set_interface_property reset ENABLED true
set_interface_property reset EXPORT_OF ""
set_interface_property reset PORT_NAME_MAP ""
set_interface_property reset CMSIS_SVD_VARIABLES ""
set_interface_property reset SVD_ADDRESS_GROUP ""
set_interface_property reset IPXACT_REGISTER_MAP_VARIABLES ""
set_interface_property reset SV_INTERFACE_TYPE ""
set_interface_property reset SV_INTERFACE_MODPORT_TYPE ""

add_interface_port reset reset_n reset_n Input 1


# 
# connection point avalon_slave
# 
add_interface avalon_slave avalon end
set_interface_property avalon_slave addressGroup 0
set_interface_property avalon_slave addressUnits WORDS
set_interface_property avalon_slave associatedClock clock
set_interface_property avalon_slave associatedReset reset
set_interface_property avalon_slave bitsPerSymbol 8
set_interface_property avalon_slave bridgedAddressOffset ""
set_interface_property avalon_slave bridgesToMaster ""
set_interface_property avalon_slave burstOnBurstBoundariesOnly false
set_interface_property avalon_slave burstcountUnits WORDS
set_interface_property avalon_slave explicitAddressSpan 0
set_interface_property avalon_slave holdTime 0
set_interface_property avalon_slave linewrapBursts false
set_interface_property avalon_slave maximumPendingReadTransactions 0
set_interface_property avalon_slave maximumPendingWriteTransactions 0
set_interface_property avalon_slave minimumResponseLatency 1
set_interface_property avalon_slave readLatency 0
set_interface_property avalon_slave readWaitTime 1
set_interface_property avalon_slave setupTime 0
set_interface_property avalon_slave timingUnits Cycles
set_interface_property avalon_slave transparentBridge false
set_interface_property avalon_slave waitrequestAllowance 0
set_interface_property avalon_slave writeWaitTime 0
set_interface_property avalon_slave dfhFeatureGuid 0
set_interface_property avalon_slave dfhGroupId 0
set_interface_property avalon_slave dfhParameterId ""
set_interface_property avalon_slave dfhParameterName ""
set_interface_property avalon_slave dfhParameterVersion ""
set_interface_property avalon_slave dfhParameterData ""
set_interface_property avalon_slave dfhParameterDataLength ""
set_interface_property avalon_slave dfhFeatureMajorVersion 0
set_interface_property avalon_slave dfhFeatureMinorVersion 0
set_interface_property avalon_slave dfhFeatureId 35
set_interface_property avalon_slave dfhFeatureType 3
set_interface_property avalon_slave ENABLED true
set_interface_property avalon_slave EXPORT_OF ""
set_interface_property avalon_slave PORT_NAME_MAP ""
set_interface_property avalon_slave CMSIS_SVD_VARIABLES ""
set_interface_property avalon_slave SVD_ADDRESS_GROUP ""
set_interface_property avalon_slave IPXACT_REGISTER_MAP_VARIABLES ""
set_interface_property avalon_slave SV_INTERFACE_TYPE ""
set_interface_property avalon_slave SV_INTERFACE_MODPORT_TYPE ""

add_interface_port avalon_slave avs_address address Input 12
add_interface_port avalon_slave avs_write write Input 1
add_interface_port avalon_slave avs_read read Input 1
add_interface_port avalon_slave avs_writedata writedata Input 8
add_interface_port avalon_slave avs_readdata readdata Output 8
set_interface_assignment avalon_slave embeddedsw.configuration.isFlash 0
set_interface_assignment avalon_slave embeddedsw.configuration.isMemoryDevice 0
set_interface_assignment avalon_slave embeddedsw.configuration.isNonVolatileStorage 0
set_interface_assignment avalon_slave embeddedsw.configuration.isPrintableDevice 0


# 
# connection point conduit_end
# 
add_interface conduit_end conduit end
set_interface_property conduit_end associatedClock clock
set_interface_property conduit_end associatedReset ""
set_interface_property conduit_end ENABLED true
set_interface_property conduit_end EXPORT_OF ""
set_interface_property conduit_end PORT_NAME_MAP ""
set_interface_property conduit_end CMSIS_SVD_VARIABLES ""
set_interface_property conduit_end SVD_ADDRESS_GROUP ""
set_interface_property conduit_end IPXACT_REGISTER_MAP_VARIABLES ""
set_interface_property conduit_end SV_INTERFACE_TYPE ""
set_interface_property conduit_end SV_INTERFACE_MODPORT_TYPE ""

add_interface_port conduit_end sd_clk sd_clk Output 1
add_interface_port conduit_end sd_cmd sd_cmd Bidir 1
add_interface_port conduit_end sd_data sd_data Bidir 4

