// nios_system_intel_vvp_scaler_1_intel_vvp_scaler_h_macro_2450_y7uvv7a.v

// This file was auto-generated from intel_vvp_scaler_h_macro_hw.tcl.  If you edit it your changes
// will probably be lost.
// 
// Generated using ACDS version 25.1 129

`timescale 1 ps / 1 ps
module nios_system_intel_vvp_scaler_1_intel_vvp_scaler_h_macro_2450_y7uvv7a (
		input  wire         main_clock_clk,         //      main_clock.clk,   Clock Input
		input  wire         main_reset_reset,       //      main_reset.reset
		input  wire [127:0] axi_st_cmd_tdata,       //      axi_st_cmd.tdata
		input  wire         axi_st_cmd_tvalid,      //                .tvalid
		output wire         axi_st_cmd_tready,      //                .tready
		input  wire [31:0]  axi_st_data_in_tdata,   //  axi_st_data_in.tdata
		input  wire         axi_st_data_in_tvalid,  //                .tvalid
		output wire         axi_st_data_in_tready,  //                .tready
		input  wire         axi_st_data_in_tlast,   //                .tlast
		input  wire [3:0]   axi_st_data_in_tuser,   //                .tuser
		output wire [23:0]  axi_st_data_out_tdata,  // axi_st_data_out.tdata
		output wire         axi_st_data_out_tvalid, //                .tvalid
		input  wire         axi_st_data_out_tready, //                .tready
		output wire         axi_st_data_out_tlast,  //                .tlast
		output wire [2:0]   axi_st_data_out_tuser   //                .tuser
	);

	wire          main_rst_bridge_out_reset_reset;    // main_rst_bridge:out_rst -> [in_cmd:rst, luma_algo_comp:rst]
	wire          in_cmd_axi_st_cmd_luma_core_tvalid; // in_cmd:axi_st_cmd_luma_core_tvalid -> luma_algo_comp:axi_st_cmd_tvalid
	wire          in_cmd_axi_st_cmd_luma_core_tready; // luma_algo_comp:axi_st_cmd_tready -> in_cmd:axi_st_cmd_luma_core_tready
	wire  [119:0] in_cmd_axi_st_cmd_luma_core_tdata;  // in_cmd:axi_st_cmd_luma_core_tdata -> luma_algo_comp:axi_st_cmd_tdata

	intel_vvp_reset_bridge main_rst_bridge (
		.clk     (main_clock_clk),                  //   input,  width = 1,       clk.clk
		.in_rst  (main_reset_reset),                //   input,  width = 1,  in_reset.reset
		.out_rst (main_rst_bridge_out_reset_reset)  //  output,  width = 1, out_reset.reset
	);

	intel_vvp_horiz_scaler_cmd #(
		.ENABLE_444    (1),
		.ENABLE_422    (0),
		.ENABLE_420    (0),
		.HALF_RATE_420 (0)
	) in_cmd (
		.clk                                   (main_clock_clk),                     //   input,    width = 1,           main_clock.clk
		.rst                                   (main_rst_bridge_out_reset_reset),    //   input,    width = 1,           main_reset.reset
		.axi_st_cmd_in_tdata                   (axi_st_cmd_tdata),                   //   input,  width = 128,        axi_st_cmd_in.tdata
		.axi_st_cmd_in_tvalid                  (axi_st_cmd_tvalid),                  //   input,    width = 1,                     .tvalid
		.axi_st_cmd_in_tready                  (axi_st_cmd_tready),                  //  output,    width = 1,                     .tready
		.axi_st_cmd_luma_core_tdata            (in_cmd_axi_st_cmd_luma_core_tdata),  //  output,  width = 120, axi_st_cmd_luma_core.tdata
		.axi_st_cmd_luma_core_tvalid           (in_cmd_axi_st_cmd_luma_core_tvalid), //  output,    width = 1,                     .tvalid
		.axi_st_cmd_luma_core_tready           (in_cmd_axi_st_cmd_luma_core_tready), //   input,    width = 1,                     .tready
		.axi_st_cmd_chroma_core_tdata          (),                                   // (terminated),                                    
		.axi_st_cmd_chroma_core_tvalid         (),                                   // (terminated),                                    
		.axi_st_cmd_chroma_core_tready         (1'b0),                               // (terminated),                                    
		.axi_st_cmd_luma_split_tdata           (),                                   // (terminated),                                    
		.axi_st_cmd_luma_split_tvalid          (),                                   // (terminated),                                    
		.axi_st_cmd_luma_split_tready          (1'b0),                               // (terminated),                                    
		.axi_st_cmd_luma_seq_par_up_tdata      (),                                   // (terminated),                                    
		.axi_st_cmd_luma_seq_par_up_tvalid     (),                                   // (terminated),                                    
		.axi_st_cmd_luma_seq_par_up_tready     (1'b0),                               // (terminated),                                    
		.axi_st_cmd_luma_seq_par_down_tdata    (),                                   // (terminated),                                    
		.axi_st_cmd_luma_seq_par_down_tvalid   (),                                   // (terminated),                                    
		.axi_st_cmd_luma_seq_par_down_tready   (1'b0),                               // (terminated),                                    
		.axi_st_cmd_luma_pkt_clp_tdata         (),                                   // (terminated),                                    
		.axi_st_cmd_luma_pkt_clp_tvalid        (),                                   // (terminated),                                    
		.axi_st_cmd_luma_pkt_clp_tready        (1'b0),                               // (terminated),                                    
		.axi_st_cmd_chroma_seq_par_up_tdata    (),                                   // (terminated),                                    
		.axi_st_cmd_chroma_seq_par_up_tvalid   (),                                   // (terminated),                                    
		.axi_st_cmd_chroma_seq_par_up_tready   (1'b0),                               // (terminated),                                    
		.axi_st_cmd_chroma_seq_par_down_tdata  (),                                   // (terminated),                                    
		.axi_st_cmd_chroma_seq_par_down_tvalid (),                                   // (terminated),                                    
		.axi_st_cmd_chroma_seq_par_down_tready (1'b0),                               // (terminated),                                    
		.axi_st_cmd_output_switch_tdata        (),                                   // (terminated),                                    
		.axi_st_cmd_output_switch_tvalid       (),                                   // (terminated),                                    
		.axi_st_cmd_output_switch_tready       (1'b0)                                // (terminated),                                    
	);

	nios_system_intel_vvp_scaler_1_intel_vvp_horiz_scaler_algo_comp_2450_aqk7afq luma_algo_comp (
		.clk                    (main_clock_clk),                     //   input,    width = 1,      main_clock.clk
		.rst                    (main_rst_bridge_out_reset_reset),    //   input,    width = 1,      main_reset.reset
		.axi_st_cmd_tdata       (in_cmd_axi_st_cmd_luma_core_tdata),  //   input,  width = 120,      axi_st_cmd.tdata
		.axi_st_cmd_tvalid      (in_cmd_axi_st_cmd_luma_core_tvalid), //   input,    width = 1,                .tvalid
		.axi_st_cmd_tready      (in_cmd_axi_st_cmd_luma_core_tready), //  output,    width = 1,                .tready
		.axi_st_data_in_tdata   (axi_st_data_in_tdata),               //   input,   width = 32,  axi_st_data_in.tdata
		.axi_st_data_in_tvalid  (axi_st_data_in_tvalid),              //   input,    width = 1,                .tvalid
		.axi_st_data_in_tready  (axi_st_data_in_tready),              //  output,    width = 1,                .tready
		.axi_st_data_in_tlast   (axi_st_data_in_tlast),               //   input,    width = 1,                .tlast
		.axi_st_data_in_tuser   (axi_st_data_in_tuser),               //   input,    width = 4,                .tuser
		.axi_st_data_out_tdata  (axi_st_data_out_tdata),              //  output,   width = 24, axi_st_data_out.tdata
		.axi_st_data_out_tvalid (axi_st_data_out_tvalid),             //  output,    width = 1,                .tvalid
		.axi_st_data_out_tready (axi_st_data_out_tready),             //   input,    width = 1,                .tready
		.axi_st_data_out_tlast  (axi_st_data_out_tlast),              //  output,    width = 1,                .tlast
		.axi_st_data_out_tuser  (axi_st_data_out_tuser)               //  output,    width = 3,                .tuser
	);

endmodule
