// reset_release.v

// Generated using ACDS version 25.1 129

`timescale 1 ps / 1 ps
module reset_release (
		output wire  ninit_done  // ninit_done.ninit_done, You can use the nINIT_DONE signal in one of the following ways: To gate an external or internal reset; To gate the reset input to the transceiver and I/O PLLs; To gate the write enable of design blocks such as embedded memory blocks, state machine, and shift registers; To synchronously drive register reset input ports in your design.
	);

	altera_s10_user_rst_clkgate s10_user_rst_clkgate_0 (
		.ninit_done (ninit_done)  //  output,  width = 1, ninit_done.ninit_done
	);

endmodule
