Qsys_XCVR_CLK |
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2024.11.29.15:41:48 | Datasheet |
xcvr_fmcp_x4_refclk0 |
intel_directphy_gts_x4_reconfig |
xcvr_fmcp_x4_refclk0_intel_directphy_gts_x4 |
reconfig |
xcvr_fmcp_x4_refclk1 |
intel_directphy_gts_x4_reconfig |
xcvr_fmcp_x4_refclk1_intel_directphy_gts_x4 |
reconfig |
xcvr_fmcp_x4_refclk2 |
intel_directphy_gts_x4_reconfig |
xcvr_fmcp_x4_refclk2_intel_directphy_gts_x4 |
reconfig |
xcvr_pcie_x4 |
intel_directphy_gts_x4_reconfig |
xcvr_pcie_x4_intel_directphy_gts_x4 |
reconfig |
xcvr_qsfp |
intel_directphy_gts_x4_reconfig |
xcvr_qsfp_intel_directphy_gts_x4 |
reconfig |
xcvr_usb3_x2_refclk |
intel_directphy_gts_x4_reconfig |
xcvr_usb3_x2_refclk_intel_directphy_gts_x4 |
reconfig |
Parameters
|
Software Assignments(none) |
Parameters
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Software Assignments(none) |
Parameters
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Software Assignments(none) |
clock_in | out_clk | reset_in | |
clk | |||
out_reset | xcvr_qsfp_intel_directphy_gts_x4 | ||
i_reconfig_reset | |||
out_reset | xcvr_pcie_x4_intel_directphy_gts_x4 | ||
i_reconfig_reset | |||
out_reset | xcvr_fmcp_x4_refclk0_intel_directphy_gts_x4 | ||
i_reconfig_reset | |||
out_reset | xcvr_fmcp_x4_refclk1_intel_directphy_gts_x4 | ||
i_reconfig_reset | |||
out_reset | xcvr_fmcp_x4_refclk2_intel_directphy_gts_x4 | ||
i_reconfig_reset | |||
out_reset | xcvr_usb3_x2_refclk_intel_directphy_gts_x4 | ||
i_reconfig_reset |
Parameters
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Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
xcvr_fmcp_x4_refclk0_intel_systemclk_gts | o_syspll_c0 | xcvr_fmcp_x4_refclk0_intel_directphy_gts_x4 |
i_system_pll_clk | ||
xcvr_fmcp_x4_refclk0_clock_bridge_xcvr_pma_rx_refclk | out_clk | |
i_rx_cdr_refclk_p | ||
xcvr_fmcp_x4_refclk0_clock_bridge_xcvr_pma_tx_refclk | out_clk | |
i_tx_pll_refclk_p | ||
clock_in | out_clk | |
i_reconfig_clk | ||
reset_in | out_reset | |
i_reconfig_reset |
Parameters
|
Software Assignments(none) |
xcvr_fmcp_x4_refclk0_clock_bridge_xcvr_pma_tx_refclk | out_clk | xcvr_fmcp_x4_refclk0_intel_systemclk_gts | |
refclk_xcvr | |||
o_syspll_c0 | xcvr_fmcp_x4_refclk0_intel_directphy_gts_x4 | ||
i_system_pll_clk |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
xcvr_fmcp_x4_refclk1_intel_systemclk_gts | o_syspll_c0 | xcvr_fmcp_x4_refclk1_intel_directphy_gts_x4 |
i_system_pll_clk | ||
xcvr_fmcp_x4_refclk1_clock_bridge_xcvr_pma_rx_refclk | out_clk | |
i_rx_cdr_refclk_p | ||
xcvr_fmcp_x4_refclk1_clock_bridge_xcvr_pma_tx_refclk | out_clk | |
i_tx_pll_refclk_p | ||
clock_in | out_clk | |
i_reconfig_clk | ||
reset_in | out_reset | |
i_reconfig_reset |
Parameters
|
Software Assignments(none) |
xcvr_fmcp_x4_refclk1_clock_bridge_xcvr_pma_tx_refclk | out_clk | xcvr_fmcp_x4_refclk1_intel_systemclk_gts | |
refclk_xcvr | |||
o_syspll_c0 | xcvr_fmcp_x4_refclk1_intel_directphy_gts_x4 | ||
i_system_pll_clk |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
xcvr_fmcp_x4_refclk2_intel_systemclk_gts | o_syspll_c0 | xcvr_fmcp_x4_refclk2_intel_directphy_gts_x4 |
i_system_pll_clk | ||
xcvr_fmcp_x4_refclk2_clock_bridge_xcvr_pma_rx_refclk | out_clk | |
i_rx_cdr_refclk_p | ||
xcvr_fmcp_x4_refclk2_clock_bridge_xcvr_pma_tx_refclk | out_clk | |
i_tx_pll_refclk_p | ||
clock_in | out_clk | |
i_reconfig_clk | ||
reset_in | out_reset | |
i_reconfig_reset |
Parameters
|
Software Assignments(none) |
xcvr_fmcp_x4_refclk2_clock_bridge_xcvr_pma_tx_refclk | out_clk | xcvr_fmcp_x4_refclk2_intel_systemclk_gts | |
refclk_xcvr | |||
o_syspll_c0 | xcvr_fmcp_x4_refclk2_intel_directphy_gts_x4 | ||
i_system_pll_clk |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
xcvr_pcie_x4_intel_systemclk_gts | o_syspll_c0 | xcvr_pcie_x4_intel_directphy_gts_x4 |
i_system_pll_clk | ||
xcvr_pcie_x4_clock_bridge_xcvr_pma_rx_refclk | out_clk | |
i_rx_cdr_refclk_p | ||
xcvr_pcie_x4_clock_bridge_xcvr_pma_tx_refclk | out_clk | |
i_tx_pll_refclk_p | ||
clock_in | out_clk | |
i_reconfig_clk | ||
reset_in | out_reset | |
i_reconfig_reset |
Parameters
|
Software Assignments(none) |
xcvr_pcie_x4_clock_bridge_xcvr_pma_tx_refclk | out_clk | xcvr_pcie_x4_intel_systemclk_gts | |
refclk_xcvr | |||
o_syspll_c0 | xcvr_pcie_x4_intel_directphy_gts_x4 | ||
i_system_pll_clk |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
xcvr_qsfp_intel_systemclk_gts | o_syspll_c0 | xcvr_qsfp_intel_directphy_gts_x4 |
i_system_pll_clk | ||
xcvr_qsfp_clock_bridge_xcvr_syspll_ref | out_clk | |
i_rx_cdr_refclk_p | ||
out_clk | ||
i_tx_pll_refclk_p | ||
clock_in | out_clk | |
i_reconfig_clk | ||
reset_in | out_reset | |
i_reconfig_reset |
Parameters
|
Software Assignments(none) |
xcvr_qsfp_clock_bridge_xcvr_syspll_ref | out_clk | xcvr_qsfp_intel_systemclk_gts | |
refclk_xcvr | |||
o_syspll_c0 | xcvr_qsfp_intel_directphy_gts_x4 | ||
i_system_pll_clk |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
xcvr_usb3_x2_refclk_intel_systemclk_gts | o_syspll_c0 | xcvr_usb3_x2_refclk_intel_directphy_gts_x4 |
i_system_pll_clk | ||
xcvr_usb3_x2_refclk_clock_bridge_xcvr_pma_rx_refclk | out_clk | |
i_rx_cdr_refclk_p | ||
xcvr_usb3_x2_refclk_clock_bridge_xcvr_pma_tx_refclk | out_clk | |
i_tx_pll_refclk_p | ||
clock_in | out_clk | |
i_reconfig_clk | ||
reset_in | out_reset | |
i_reconfig_reset |
Parameters
|
Software Assignments(none) |
xcvr_usb3_x2_refclk_clock_bridge_xcvr_pma_tx_refclk | out_clk | xcvr_usb3_x2_refclk_intel_systemclk_gts | |
refclk_xcvr | |||
o_syspll_c0 | xcvr_usb3_x2_refclk_intel_directphy_gts_x4 | ||
i_system_pll_clk |
Parameters
|
Software Assignments(none) |
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