Qsys |
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2025.02.20.16:23:41 | Datasheet |
address_span_extender | axi_bridge_pipe | intel_niosv_m_0 | mm_ccb | mm_ccb_ddr4a | ||
expanded_master | m0 | instruction_manager | data_manager | m0 | m0 | |
address_span_extender | ||||||
windowed_slave | 0x4000_0000 - 0x7fff_ffff | |||||
cntl | 0x0001_0040 - 0x0001_0047 | |||||
axi_bridge_pipe | ||||||
s0 | 0x0008_0000 - 0x000f_ffff | 0x0008_0000 - 0x000f_ffff | ||||
emif_ddr4a | ||||||
s0_axi4 | 0x0000_0000_0000_0000 - 0x0000_0000_ffff_ffff | 0x0000_0000_0000_0000 - 0x0000_0000_ffff_ffff | ||||
s0_axi4lite | ||||||
emif_ddr4b | ||||||
s0_axi4 | 0x0000_0001_0000_0000 - 0x0000_0001_ffff_ffff | 0x0000_0001_0000_0000 - 0x0000_0001_ffff_ffff | ||||
s0_axi4lite | ||||||
intel_niosv_m_0 | ||||||
timer_sw_agent | 0x0001_0000 - 0x0001_003f | |||||
dm_agent | 0x0000_0000 - 0x0000_ffff | 0x0000_0000 - 0x0000_ffff | ||||
intel_onchip_memory | ||||||
axi_s1 | 0x0000_0000 - 0x0007_ffff | 0x0008_0000 - 0x000f_ffff | 0x0008_0000 - 0x000f_ffff | |||
jtag_uart | ||||||
avalon_jtag_slave | 0xf000_0048 - 0xf000_004f | 0x0048 - 0x004f | ||||
mm_ccb | ||||||
s0 | 0xf000_0000 - 0xf000_007f | |||||
mm_ccb_ddr4a | ||||||
s0 | 0x0000_0000_0000_0000 - 0x0000_0001_ffff_ffff | |||||
pio_key | ||||||
s1 | 0xf000_0030 - 0xf000_003f | 0x0030 - 0x003f | ||||
pio_led | ||||||
s1 | 0xf000_0020 - 0xf000_002f | 0x0020 - 0x002f | ||||
sysid_qsys | ||||||
control_slave | 0xf000_0040 - 0xf000_0047 | 0x0040 - 0x0047 | ||||
timer | ||||||
s1 | 0xf000_0000 - 0xf000_001f | 0x0000 - 0x001f |
intel_niosv_m_0 | data_manager | address_span_extender | |
cntl | |||
data_manager | |||
windowed_slave | |||
iopll | outclk0 | ||
clock | |||
reset_in | out_reset | ||
reset | |||
expanded_master | mm_ccb_ddr4a | ||
s0 |
Parameters
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Software Assignments
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intel_niosv_m_0 | data_manager | axi_bridge_pipe | |
s0 | |||
instruction_manager | |||
s0 | |||
iopll | outclk0 | ||
clk | |||
reset_in | out_reset | ||
clk_reset | |||
m0 | intel_onchip_memory | ||
axi_s1 |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
mm_ccb_ddr4a | m0 | emif_ddr4a |
s0_axi4 | ||
iopll | outclk0 | |
s0_axi4_clock_in |
Parameters
|
Software Assignments(none) |
mm_ccb_ddr4a | m0 | emif_ddr4b |
s0_axi4 | ||
iopll | outclk0 | |
s0_axi4_clock_in |
Parameters
|
Software Assignments(none) |
iopll | outclk0 | intel_niosv_m_0 | |
clk | |||
reset_in | out_reset | ||
reset | |||
data_manager | address_span_extender | ||
cntl | |||
data_manager | |||
windowed_slave | |||
data_manager | mm_ccb | ||
s0 | |||
data_manager | axi_bridge_pipe | ||
s0 | |||
instruction_manager | |||
s0 | |||
platform_irq_rx | timer | ||
irq | |||
platform_irq_rx | jtag_uart | ||
irq |
Parameters
|
Software Assignments
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axi_bridge_pipe | m0 | intel_onchip_memory |
axi_s1 | ||
iopll | outclk0 | |
clk1 | ||
reset_in | out_reset | |
reset1 |
Parameters
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Software Assignments
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clock_in | out_clk | iopll | |
refclk | |||
reset_in | out_reset | ||
reset | |||
outclk0 | intel_niosv_m_0 | ||
clk | |||
outclk0 | axi_bridge_pipe | ||
clk | |||
outclk0 | intel_onchip_memory | ||
clk1 | |||
outclk0 | address_span_extender | ||
clock | |||
outclk0 | mm_ccb_ddr4a | ||
m0_clk | |||
outclk0 | |||
s0_clk | |||
outclk0 | emif_ddr4a | ||
s0_axi4_clock_in | |||
outclk0 | emif_ddr4b | ||
s0_axi4_clock_in | |||
outclk0 | mm_ccb | ||
s0_clk | |||
outclk2 | |||
m0_clk | |||
outclk2 | timer | ||
clk | |||
outclk2 | sysid_qsys | ||
clk | |||
outclk2 | jtag_uart | ||
clk | |||
outclk2 | pio_key | ||
clk | |||
outclk2 | pio_led | ||
clk |
Parameters
|
Software Assignments(none) |
mm_ccb | m0 | jtag_uart |
avalon_jtag_slave | ||
iopll | outclk2 | |
clk | ||
intel_niosv_m_0 | platform_irq_rx | |
irq | ||
reset_in | out_reset | |
reset |
Parameters
|
Software Assignments
|
intel_niosv_m_0 | data_manager | mm_ccb | |
s0 | |||
iopll | outclk0 | ||
s0_clk | |||
outclk2 | |||
m0_clk | |||
reset_in | out_reset | ||
m0_reset | |||
out_reset | |||
s0_reset | |||
m0 | jtag_uart | ||
avalon_jtag_slave | |||
m0 | sysid_qsys | ||
control_slave | |||
m0 | timer | ||
s1 | |||
m0 | pio_key | ||
s1 | |||
m0 | pio_led | ||
s1 |
Parameters
|
Software Assignments(none) |
address_span_extender | expanded_master | mm_ccb_ddr4a | |
s0 | |||
iopll | outclk0 | ||
m0_clk | |||
outclk0 | |||
s0_clk | |||
reset_in | out_reset | ||
m0_reset | |||
out_reset | |||
s0_reset | |||
m0 | emif_ddr4a | ||
s0_axi4 | |||
m0 | emif_ddr4b | ||
s0_axi4 |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments
|
Parameters
|
Software Assignments
|
clock_in | out_clk | reset_in | |
clk | |||
out_reset | axi_bridge_pipe | ||
clk_reset | |||
out_reset | mm_ccb | ||
m0_reset | |||
out_reset | |||
s0_reset | |||
out_reset | mm_ccb_ddr4a | ||
m0_reset | |||
out_reset | |||
s0_reset | |||
out_reset | iopll | ||
reset | |||
out_reset | jtag_uart | ||
reset | |||
out_reset | sysid_qsys | ||
reset | |||
out_reset | timer | ||
reset | |||
out_reset | address_span_extender | ||
reset | |||
out_reset | pio_key | ||
reset | |||
out_reset | pio_led | ||
reset | |||
out_reset | intel_niosv_m_0 | ||
reset | |||
out_reset | intel_onchip_memory | ||
reset1 |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments
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mm_ccb | m0 | timer |
s1 | ||
iopll | outclk2 | |
clk | ||
intel_niosv_m_0 | platform_irq_rx | |
irq | ||
reset_in | out_reset | |
reset |
Parameters
|
Software Assignments
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