golden top Board Configuration

golden top Board Configuration

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Pin Assignments:

CLOCK
Name Location Direction IO Standard
CLK_100_B2B_p BF68 input 1.2V TRUE DIFFERENTIAL SIGNALING
CLK_50_B5A CH128 input 3.3-V LVCMOS
CLK_50_B6A BP22 input 3.3-V LVCMOS
CLK_50_B6C D8 input 3.3-V LVCMOS

Buttons
Name Location Direction IO Standard
CPU_RESET_n BF104 input 3.3-V LVCMOS
BUTTON[0] H8 input 3.3-V LVCMOS
BUTTON[1] C2 input 3.3-V LVCMOS
BUTTON[2] D4 input 3.3-V LVCMOS
BUTTON[3] F4 input 3.3-V LVCMOS

Swtiches
Name Location Direction IO Standard
SW[0] CK4 input 3.3-V LVCMOS
SW[1] CH4 input 3.3-V LVCMOS
SW[2] K8 input 3.3-V LVCMOS
SW[3] F8 input 3.3-V LVCMOS

LED
Name Location Direction IO Standard
LED[0] BF120 output 3.3-V LVCMOS
LED[1] B39 output 3.3-V LVCMOS
LED[2] B4 output 3.3-V LVCMOS
LED[3] A11 output 3.3-V LVCMOS

DDR4A
Name Location Direction IO Standard
DDR4A_REFCLK_p AB117 input 1.2V TRUE DIFFERENTIAL SIGNALING
DDR4A_A[0] T114 output SSTL-12
DDR4A_A[1] P114 output SSTL-12
DDR4A_A[2] V117 output SSTL-12
DDR4A_A[3] T117 output SSTL-12
DDR4A_A[4] M114 output SSTL-12
DDR4A_A[5] K114 output SSTL-12
DDR4A_A[6] V108 output SSTL-12
DDR4A_A[7] T108 output SSTL-12
DDR4A_A[8] T105 output SSTL-12
DDR4A_A[9] P105 output SSTL-12
DDR4A_A[10] M105 output SSTL-12
DDR4A_A[11] K105 output SSTL-12
DDR4A_A[12] AG111 output SSTL-12
DDR4A_A[13] Y114 output SSTL-12
DDR4A_A[14] AB114 output SSTL-12
DDR4A_A[15] AK107 output SSTL-12
DDR4A_A[16] AK104 output SSTL-12
DDR4A_BA[0] AB108 output SSTL-12
DDR4A_BA[1] Y105 output SSTL-12
DDR4A_BG[0] AB105 output SSTL-12
DDR4A_BG[1] F117 output SSTL-12
DDR4A_CK H108 output DIFFERENTIAL 1.2-V SSTL
DDR4A_CK_n F108 output DIFFERENTIAL 1.2-V SSTL
DDR4A_CKE F105 output SSTL-12
DDR4A_DQS[0] B122 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS[1] AG90 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS[2] K95 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS[3] F95 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS_n[0] A125 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS_n[1] AG93 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS_n[2] M95 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQS_n[3] D95 inout DIFFERENTIAL 1.2-V POD
DDR4A_DQ[0] B128 inout 1.2-V POD
DDR4A_DQ[1] A116 inout 1.2-V POD
DDR4A_DQ[2] B130 inout 1.2-V POD
DDR4A_DQ[3] B116 inout 1.2-V POD
DDR4A_DQ[4] A130 inout 1.2-V POD
DDR4A_DQ[5] B113 inout 1.2-V POD
DDR4A_DQ[6] A128 inout 1.2-V POD
DDR4A_DQ[7] A113 inout 1.2-V POD
DDR4A_DQ[8] AG100 inout 1.2-V POD
DDR4A_DQ[9] Y98 inout 1.2-V POD
DDR4A_DQ[10] AC100 inout 1.2-V POD
DDR4A_DQ[11] AG104 inout 1.2-V POD
DDR4A_DQ[12] AC96 inout 1.2-V POD
DDR4A_DQ[13] Y95 inout 1.2-V POD
DDR4A_DQ[14] Y87 inout 1.2-V POD
DDR4A_DQ[15] Y84 inout 1.2-V POD
DDR4A_DQ[16] V98 inout 1.2-V POD
DDR4A_DQ[17] T98 inout 1.2-V POD
DDR4A_DQ[18] P95 inout 1.2-V POD
DDR4A_DQ[19] T95 inout 1.2-V POD
DDR4A_DQ[20] K84 inout 1.2-V POD
DDR4A_DQ[21] M84 inout 1.2-V POD
DDR4A_DQ[22] T84 inout 1.2-V POD
DDR4A_DQ[23] P84 inout 1.2-V POD
DDR4A_DQ[24] H98 inout 1.2-V POD
DDR4A_DQ[25] M98 inout 1.2-V POD
DDR4A_DQ[26] K87 inout 1.2-V POD
DDR4A_DQ[27] K98 inout 1.2-V POD
DDR4A_DQ[28] F98 inout 1.2-V POD
DDR4A_DQ[29] F84 inout 1.2-V POD
DDR4A_DQ[30] M87 inout 1.2-V POD
DDR4A_DQ[31] D84 inout 1.2-V POD
DDR4A_DBI_n[0] B119 inout 1.2-V POD
DDR4A_DBI_n[1] AC90 inout 1.2-V POD
DDR4A_DBI_n[2] V87 inout 1.2-V POD
DDR4A_DBI_n[3] H87 inout 1.2-V POD
DDR4A_CS_n K117 output SSTL-12
DDR4A_RESET_n H117 output SSTL-12
DDR4A_ODT F114 output SSTL-12
DDR4A_PAR K108 output SSTL-12
DDR4A_ALERT_n Y108 input 1.2 V
DDR4A_ACT_n M117 output SSTL-12
DDR4A_RZQ AK111 input 1.2 V

DDR4B
Name Location Direction IO Standard
DDR4B_REFCLK_p AC68 input 1.2V TRUE DIFFERENTIAL SIGNALING
DDR4B_A[0] P74 output SSTL-12
DDR4B_A[1] T74 output SSTL-12
DDR4B_A[2] V77 output SSTL-12
DDR4B_A[3] T77 output SSTL-12
DDR4B_A[4] M74 output SSTL-12
DDR4B_A[5] K74 output SSTL-12
DDR4B_A[6] V67 output SSTL-12
DDR4B_A[7] T67 output SSTL-12
DDR4B_A[8] M65 output SSTL-12
DDR4B_A[9] K65 output SSTL-12
DDR4B_A[10] T65 output SSTL-12
DDR4B_A[11] P65 output SSTL-12
DDR4B_A[12] AG79 output SSTL-12
DDR4B_A[13] AG72 output SSTL-12
DDR4B_A[14] AG75 output SSTL-12
DDR4B_A[15] AG83 output SSTL-12
DDR4B_A[16] AC83 output SSTL-12
DDR4B_BA[0] Y74 output SSTL-12
DDR4B_BA[1] Y67 output SSTL-12
DDR4B_BG[0] Y65 output SSTL-12
DDR4B_BG[1] K77 output SSTL-12
DDR4B_CK H67 output DIFFERENTIAL 1.2-V SSTL
DDR4B_CK_n F67 output DIFFERENTIAL 1.2-V SSTL
DDR4B_CKE M67 output SSTL-12
DDR4B_DQS[0] A80 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS[1] AG57 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS[2] K55 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS[3] F55 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS_n[0] B76 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS_n[1] AG53 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS_n[2] M55 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQS_n[3] D55 inout DIFFERENTIAL 1.2-V POD
DDR4B_DQ[0] A82 inout 1.2-V POD
DDR4B_DQ[1] B70 inout 1.2-V POD
DDR4B_DQ[2] A85 inout 1.2-V POD
DDR4B_DQ[3] A70 inout 1.2-V POD
DDR4B_DQ[4] B82 inout 1.2-V POD
DDR4B_DQ[5] B66 inout 1.2-V POD
DDR4B_DQ[6] B85 inout 1.2-V POD
DDR4B_DQ[7] A66 inout 1.2-V POD
DDR4B_DQ[8] Y58 inout 1.2-V POD
DDR4B_DQ[9] AG64 inout 1.2-V POD
DDR4B_DQ[10] Y47 inout 1.2-V POD
DDR4B_DQ[11] Y44 inout 1.2-V POD
DDR4B_DQ[12] AC61 inout 1.2-V POD
DDR4B_DQ[13] AC64 inout 1.2-V POD
DDR4B_DQ[14] AG61 inout 1.2-V POD
DDR4B_DQ[15] Y55 inout 1.2-V POD
DDR4B_DQ[16] P55 inout 1.2-V POD
DDR4B_DQ[17] T55 inout 1.2-V POD
DDR4B_DQ[18] V58 inout 1.2-V POD
DDR4B_DQ[19] T58 inout 1.2-V POD
DDR4B_DQ[20] P44 inout 1.2-V POD
DDR4B_DQ[21] T44 inout 1.2-V POD
DDR4B_DQ[22] K44 inout 1.2-V POD
DDR4B_DQ[23] M44 inout 1.2-V POD
DDR4B_DQ[24] H47 inout 1.2-V POD
DDR4B_DQ[25] D44 inout 1.2-V POD
DDR4B_DQ[26] H58 inout 1.2-V POD
DDR4B_DQ[27] F47 inout 1.2-V POD
DDR4B_DQ[28] M58 inout 1.2-V POD
DDR4B_DQ[29] F44 inout 1.2-V POD
DDR4B_DQ[30] F58 inout 1.2-V POD
DDR4B_DQ[31] K58 inout 1.2-V POD
DDR4B_DBI_n[0] B73 inout 1.2-V POD
DDR4B_DBI_n[1] AC53 inout 1.2-V POD
DDR4B_DBI_n[2] V47 inout 1.2-V POD
DDR4B_DBI_n[3] M47 inout 1.2-V POD
DDR4B_CS_n F77 output SSTL-12
DDR4B_RESET_n M77 output SSTL-12
DDR4B_ODT D74 output SSTL-12
DDR4B_PAR D65 output SSTL-12
DDR4B_ALERT_n Y77 input 1.2 V
DDR4B_ACT_n H77 output SSTL-12
DDR4B_RZQ AC79 input 1.2 V

HDMI
Name Location Direction IO Standard
HDMI_LRCLK BP112 inout 3.3-V LVCMOS
HDMI_MCLK BM118 inout 3.3-V LVCMOS
HDMI_SCLK BM112 inout 3.3-V LVCMOS
HDMI_TX_CLK BU52 output 1.2 V
HDMI_TX_HS BR109 output 3.3-V LVCMOS
HDMI_TX_VS BE107 output 3.3-V LVCMOS
HDMI_TX_D[0] CD134 output 3.3-V LVCMOS
HDMI_TX_D[1] CD135 output 3.3-V LVCMOS
HDMI_TX_D[2] CG134 output 3.3-V LVCMOS
HDMI_TX_D[3] CG135 output 3.3-V LVCMOS
HDMI_TX_D[4] CH132 output 3.3-V LVCMOS
HDMI_TX_D[5] CF132 output 3.3-V LVCMOS
HDMI_TX_D[6] CF128 output 3.3-V LVCMOS
HDMI_TX_D[7] CK134 output 3.3-V LVCMOS
HDMI_TX_D[8] CL125 output 3.3-V LVCMOS
HDMI_TX_D[9] CF121 output 3.3-V LVCMOS
HDMI_TX_D[10] CF118 output 3.3-V LVCMOS
HDMI_TX_D[11] BU118 output 3.3-V LVCMOS
HDMI_TX_D[12] BR118 output 3.3-V LVCMOS
HDMI_TX_D[13] CA118 output 3.3-V LVCMOS
HDMI_TX_D[14] BW118 output 3.3-V LVCMOS
HDMI_TX_D[15] CL128 output 3.3-V LVCMOS
HDMI_TX_D[16] CL130 output 3.3-V LVCMOS
HDMI_TX_D[17] CK125 output 3.3-V LVCMOS
HDMI_TX_D[18] CK128 output 3.3-V LVCMOS
HDMI_TX_D[19] BF111 output 3.3-V LVCMOS
HDMI_TX_D[20] BH109 output 3.3-V LVCMOS
HDMI_TX_D[21] BE115 output 3.3-V LVCMOS
HDMI_TX_D[22] BF115 output 3.3-V LVCMOS
HDMI_TX_D[23] BU109 output 3.3-V LVCMOS
HDMI_TX_DE BK109 output 3.3-V LVCMOS
HDMI_I2C_SCL BR112 inout 3.3-V LVCMOS
HDMI_I2C_SDA BM109 inout 3.3-V LVCMOS
HDMI_TX_INT BE111 input 3.3-V LVCMOS
HDMI_I2S BK118 inout 3.3-V LVCMOS

ENET
Name Location Direction IO Standard
ENET_88E2110_TX_p AL129 output HIGH SPEED DIFFERENTIAL I/O
ENET_88E2110_TX_n AL126 output HIGH SPEED DIFFERENTIAL I/O
ENET_88E2110_RX_p AK135 input HIGH SPEED DIFFERENTIAL I/O
ENET_88E2110_RX_n AK133 input HIGH SPEED DIFFERENTIAL I/O
ENET_88E2110_REFCLK_125M_p AT120 input CURRENT MODE LOGIC (CML)
ENET_88E2110_INT_n A20 input 3.3-V LVCMOS
ENET_88E2110_MDC B14 output 3.3-V LVCMOS
ENET_88E2110_MDIO A14 inout 3.3-V LVCMOS
ENET_88E2110_RESET_n B11 output 3.3-V LVCMOS

SI5340B
Name Location Direction IO Standard
SI5340B_I2C_SCL A51 inout 1.2 V
SI5340B_I2C_SDA B51 inout 1.2 V
SI5340B_OE_n A54 output 1.2 V
SI5340B_RST_n B54 output 1.2 V

SI5391B
Name Location Direction IO Standard
SI5391B_I2C_SCL B42 inout 1.2 V
SI5391B_I2C_SDA A45 inout 1.2 V
SI5391B_OE_n B45 output 1.2 V
SI5391B_RST_n A48 output 1.2 V

GPIO
Name Location Direction IO Standard
GPIO[0] BK31 inout 3.3-V LVCMOS
GPIO[1] BU31 inout 3.3-V LVCMOS
GPIO[2] BF25 inout 3.3-V LVCMOS
GPIO[3] BU28 inout 3.3-V LVCMOS
GPIO[4] BR31 inout 3.3-V LVCMOS
GPIO[5] BU19 inout 3.3-V LVCMOS
GPIO[6] BR19 inout 3.3-V LVCMOS
GPIO[7] CJ2 inout 3.3-V LVCMOS
GPIO[8] BW28 inout 3.3-V LVCMOS
GPIO[9] BW19 inout 3.3-V LVCMOS
GPIO[10] BU22 inout 3.3-V LVCMOS
GPIO[11] BR22 inout 3.3-V LVCMOS
GPIO[12] BM19 inout 3.3-V LVCMOS
GPIO[13] BM22 inout 3.3-V LVCMOS
GPIO[14] BK19 inout 3.3-V LVCMOS
GPIO[15] BK22 inout 3.3-V LVCMOS
GPIO[16] BH19 inout 3.3-V LVCMOS
GPIO[17] BR28 inout 3.3-V LVCMOS
GPIO[18] BM28 inout 3.3-V LVCMOS
GPIO[19] BM31 inout 3.3-V LVCMOS
GPIO[20] BK28 inout 3.3-V LVCMOS
GPIO[21] BH28 inout 3.3-V LVCMOS
GPIO[22] BF36 inout 3.3-V LVCMOS
GPIO[23] BF40 inout 3.3-V LVCMOS
GPIO[24] BE43 inout 3.3-V LVCMOS
GPIO[25] BP31 inout 3.3-V LVCMOS
GPIO[26] CK2 inout 3.3-V LVCMOS
GPIO[27] CF9 inout 3.3-V LVCMOS
GPIO[28] CH12 inout 3.3-V LVCMOS
GPIO[29] CF12 inout 3.3-V LVCMOS
GPIO[30] BF21 inout 3.3-V LVCMOS
GPIO[31] BF16 inout 3.3-V LVCMOS
GPIO[32] BE21 inout 3.3-V LVCMOS
GPIO[33] BE25 inout 3.3-V LVCMOS
GPIO[34] BF29 inout 3.3-V LVCMOS
GPIO[35] BE29 inout 3.3-V LVCMOS

TMD
Name Location Direction IO Standard
TMD_D[0] F18 inout 3.3-V LVCMOS
TMD_D[1] F15 inout 3.3-V LVCMOS
TMD_D[2] F27 inout 3.3-V LVCMOS
TMD_D[3] F24 inout 3.3-V LVCMOS
TMD_D[4] H27 inout 3.3-V LVCMOS
TMD_D[5] D24 inout 3.3-V LVCMOS
TMD_D[6] H18 inout 3.3-V LVCMOS
TMD_D[7] D15 inout 3.3-V LVCMOS

FMCP
Name Location Direction IO Standard
FMCP_CLK2_BIDIR_p CF49 inout 1.2 V
FMCP_CLK2_BIDIR_n CH49 inout 1.2 V
FMCP_CLK3_BIDIR_p BW49 inout 1.2 V
FMCP_CLK3_BIDIR_n CA49 inout 1.2 V
FMCP_DP_C2M_p[0] AU7 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_p[1] AR7 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_p[2] AN7 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_p[3] AL7 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_p[4] BE7 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_p[5] BC7 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_p[6] BA7 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_p[7] AW7 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_p[8] BY7 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_p[9] BT7 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_p[10] BL7 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_p[11] BG7 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_n[0] AU10 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_n[1] AR10 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_n[2] AN10 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_n[3] AL10 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_n[4] BE10 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_n[5] BC10 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_n[6] BA10 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_n[7] AW10 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_n[8] BY10 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_n[9] BT10 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_n[10] BL10 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_C2M_n[11] BG10 output HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_p[0] AV1 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_p[1] AT1 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_p[2] AP1 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_p[3] AM1 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_p[4] BF1 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_p[5] BD1 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_p[6] BB1 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_p[7] AY1 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_p[8] CB1 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_p[9] BV1 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_p[10] BN1 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_p[11] BJ1 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_n[0] AV3 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_n[1] AT3 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_n[2] AP3 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_n[3] AM3 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_n[4] BF3 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_n[5] BD3 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_n[6] BB3 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_n[7] AY3 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_n[8] CB3 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_n[9] BV3 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_n[10] BN3 input HIGH SPEED DIFFERENTIAL I/O
FMCP_DP_M2C_n[11] BJ3 input HIGH SPEED DIFFERENTIAL I/O
FMCP_HA_p[0] BM69 inout 1.2 V
FMCP_HA_p[1] BM71 inout 1.2 V
FMCP_HA_p[2] BH62 inout 1.2 V
FMCP_HA_p[3] BR69 inout 1.2 V
FMCP_HA_p[4] BW69 inout 1.2 V
FMCP_HA_p[5] BU59 inout 1.2 V
FMCP_HA_p[6] BH69 inout 1.2 V
FMCP_HA_p[7] CH69 inout 1.2 V
FMCP_HA_p[8] CF59 inout 1.2 V
FMCP_HA_p[9] BW59 inout 1.2 V
FMCP_HA_p[10] CA62 inout 1.2 V
FMCP_HA_p[11] BM59 inout 1.2 V
FMCP_HA_p[12] BM62 inout 1.2 V
FMCP_HA_p[13] CF62 inout 1.2 V
FMCP_HA_p[14] CC71 inout 1.2 V
FMCP_HA_p[15] CF71 inout 1.2 V
FMCP_HA_p[16] BU62 inout 1.2 V
FMCP_HA_p[17] BF75 inout 1.2 V
FMCP_HA_p[18] BE83 inout 1.2 V
FMCP_HA_p[19] BE79 inout 1.2 V
FMCP_HA_p[20] BR71 inout 1.2 V
FMCP_HA_p[21] BF93 inout 1.2 V
FMCP_HA_p[22] BF86 inout 1.2 V
FMCP_HA_p[23] BE96 inout 1.2 V
FMCP_HA_n[0] BK69 inout 1.2 V
FMCP_HA_n[1] BP71 inout 1.2 V
FMCP_HA_n[2] BH59 inout 1.2 V
FMCP_HA_n[3] BU69 inout 1.2 V
FMCP_HA_n[4] CA69 inout 1.2 V
FMCP_HA_n[5] BR59 inout 1.2 V
FMCP_HA_n[6] BH71 inout 1.2 V
FMCP_HA_n[7] CF69 inout 1.2 V
FMCP_HA_n[8] CH59 inout 1.2 V
FMCP_HA_n[9] CA59 inout 1.2 V
FMCP_HA_n[10] CC62 inout 1.2 V
FMCP_HA_n[11] BK59 inout 1.2 V
FMCP_HA_n[12] BP62 inout 1.2 V
FMCP_HA_n[13] CH62 inout 1.2 V
FMCP_HA_n[14] CA71 inout 1.2 V
FMCP_HA_n[15] CH71 inout 1.2 V
FMCP_HA_n[16] BR62 inout 1.2 V
FMCP_HA_n[17] BF72 inout 1.2 V
FMCP_HA_n[18] BF83 inout 1.2 V
FMCP_HA_n[19] BE75 inout 1.2 V
FMCP_HA_n[20] BU71 inout 1.2 V
FMCP_HA_n[21] BF90 inout 1.2 V
FMCP_HA_n[22] BE86 inout 1.2 V
FMCP_HA_n[23] BE93 inout 1.2 V
FMCP_HB_p[0] BR81 inout 1.2 V
FMCP_HB_p[1] BW78 inout 1.2 V
FMCP_HB_p[2] CL91 inout 1.2 V
FMCP_HB_p[3] BM81 inout 1.2 V
FMCP_HB_p[4] BK89 inout 1.2 V
FMCP_HB_p[5] CF81 inout 1.2 V
FMCP_HB_p[6] BR92 inout 1.2 V
FMCP_HB_p[7] BH89 inout 1.2 V
FMCP_HB_p[8] CH89 inout 1.2 V
FMCP_HB_p[9] CK97 inout 1.2 V
FMCP_HB_p[10] CL88 inout 1.2 V
FMCP_HB_p[11] BR89 inout 1.2 V
FMCP_HB_p[12] CH78 inout 1.2 V
FMCP_HB_p[13] BR78 inout 1.2 V
FMCP_HB_p[14] CK76 inout 1.2 V
FMCP_HB_p[15] CK85 inout 1.2 V
FMCP_HB_p[16] CA81 inout 1.2 V
FMCP_HB_p[17] BM78 inout 1.2 V
FMCP_HB_p[18] BH81 inout 1.2 V
FMCP_HB_p[19] CK80 inout 1.2 V
FMCP_HB_p[20] CC92 inout 1.2 V
FMCP_HB_p[21] CF92 inout 1.2 V
FMCP_HB_n[0] BU81 inout 1.2 V
FMCP_HB_n[1] CA78 inout 1.2 V
FMCP_HB_n[2] CK94 inout 1.2 V
FMCP_HB_n[3] BP81 inout 1.2 V
FMCP_HB_n[4] BM89 inout 1.2 V
FMCP_HB_n[5] CH81 inout 1.2 V
FMCP_HB_n[6] BU92 inout 1.2 V
FMCP_HB_n[7] BH92 inout 1.2 V
FMCP_HB_n[8] CF89 inout 1.2 V
FMCP_HB_n[9] CL97 inout 1.2 V
FMCP_HB_n[10] CK88 inout 1.2 V
FMCP_HB_n[11] BU89 inout 1.2 V
FMCP_HB_n[12] CF78 inout 1.2 V
FMCP_HB_n[13] BU78 inout 1.2 V
FMCP_HB_n[14] CL76 inout 1.2 V
FMCP_HB_n[15] CL85 inout 1.2 V
FMCP_HB_n[16] CC81 inout 1.2 V
FMCP_HB_n[17] BK78 inout 1.2 V
FMCP_HB_n[18] BH78 inout 1.2 V
FMCP_HB_n[19] CL82 inout 1.2 V
FMCP_HB_n[20] CA92 inout 1.2 V
FMCP_HB_n[21] CH92 inout 1.2 V
FMCP_LA_p[0] BK38 inout 1.2 V
FMCP_LA_p[1] BE61 inout 1.2 V
FMCP_LA_p[2] BF57 inout 1.2 V
FMCP_LA_p[3] CK8 inout 1.2 V
FMCP_LA_p[4] BF50 inout 1.2 V
FMCP_LA_p[5] CK48 inout 1.2 V
FMCP_LA_p[6] CK11 inout 1.2 V
FMCP_LA_p[7] BE64 inout 1.2 V
FMCP_LA_p[8] BE46 inout 1.2 V
FMCP_LA_p[9] CF19 inout 1.2 V
FMCP_LA_p[10] CF22 inout 1.2 V
FMCP_LA_p[11] BM52 inout 1.2 V
FMCP_LA_p[12] BP41 inout 1.2 V
FMCP_LA_p[13] CL42 inout 1.2 V
FMCP_LA_p[14] BH38 inout 1.2 V
FMCP_LA_p[15] BH49 inout 1.2 V
FMCP_LA_p[16] BK49 inout 1.2 V
FMCP_LA_p[17] BR49 inout 1.2 V
FMCP_LA_p[18] CK30 inout 1.2 V
FMCP_LA_p[19] CK66 inout 1.2 V
FMCP_LA_p[20] CK63 inout 1.2 V
FMCP_LA_p[21] CK33 inout 1.2 V
FMCP_LA_p[22] CA38 inout 1.2 V
FMCP_LA_p[23] BR38 inout 1.2 V
FMCP_LA_p[24] CC41 inout 1.2 V
FMCP_LA_p[25] CH41 inout 1.2 V
FMCP_LA_p[26] CK39 inout 1.2 V
FMCP_LA_p[27] CK35 inout 1.2 V
FMCP_LA_p[28] CC52 inout 1.2 V
FMCP_LA_p[29] CF52 inout 1.2 V
FMCP_LA_p[30] CL56 inout 1.2 V
FMCP_LA_p[31] CL51 inout 1.2 V
FMCP_LA_p[32] CK73 inout 1.2 V
FMCP_LA_p[33] CK56 inout 1.2 V
FMCP_LA_n[0] BM38 inout 1.2 V
FMCP_LA_n[1] BE57 inout 1.2 V
FMCP_LA_n[2] BF53 inout 1.2 V
FMCP_LA_n[3] CL6 inout 1.2 V
FMCP_LA_n[4] BE50 inout 1.2 V
FMCP_LA_n[5] CL45 inout 1.2 V
FMCP_LA_n[6] CL8 inout 1.2 V
FMCP_LA_n[7] BF64 inout 1.2 V
FMCP_LA_n[8] BF46 inout 1.2 V
FMCP_LA_n[9] CC19 inout 1.2 V
FMCP_LA_n[10] CH22 inout 1.2 V
FMCP_LA_n[11] BP52 inout 1.2 V
FMCP_LA_n[12] BM41 inout 1.2 V
FMCP_LA_n[13] CK45 inout 1.2 V
FMCP_LA_n[14] BH41 inout 1.2 V
FMCP_LA_n[15] BH52 inout 1.2 V
FMCP_LA_n[16] BM49 inout 1.2 V
FMCP_LA_n[17] BU49 inout 1.2 V
FMCP_LA_n[18] CL26 inout 1.2 V
FMCP_LA_n[19] CL70 inout 1.2 V
FMCP_LA_n[20] CL66 inout 1.2 V
FMCP_LA_n[21] CL30 inout 1.2 V
FMCP_LA_n[22] BW38 inout 1.2 V
FMCP_LA_n[23] BU38 inout 1.2 V
FMCP_LA_n[24] CA41 inout 1.2 V
FMCP_LA_n[25] CF41 inout 1.2 V
FMCP_LA_n[26] CL39 inout 1.2 V
FMCP_LA_n[27] CL35 inout 1.2 V
FMCP_LA_n[28] CA52 inout 1.2 V
FMCP_LA_n[29] CH52 inout 1.2 V
FMCP_LA_n[30] CL60 inout 1.2 V
FMCP_LA_n[31] CK54 inout 1.2 V
FMCP_LA_n[32] CL73 inout 1.2 V
FMCP_LA_n[33] CL54 inout 1.2 V
FMCP_CLK_M2C_p[0] CH38 input 1.2V TRUE DIFFERENTIAL SIGNALING
FMCP_CLK_M2C_p[1] BP92 input 1.2V TRUE DIFFERENTIAL SIGNALING
FMCP_GBTCLK_M2C_p[0] AP16 input CURRENT MODE LOGIC (CML)
FMCP_GBTCLK_M2C_p[1] AV16 input CURRENT MODE LOGIC (CML)
FMCP_GBTCLK_M2C_p[2] BB16 input CURRENT MODE LOGIC (CML)
FMCP_REFCLK_C2M_p BR41 output DIFFERENTIAL 1.2-V SSTL
FMCP_REFCLK_M2C_p CC22 input 1.2V TRUE DIFFERENTIAL SIGNALING
FMCP_REFCLK_p[0] AT16 input CURRENT MODE LOGIC (CML)
FMCP_REFCLK_p[1] AY16 input CURRENT MODE LOGIC (CML)
FMCP_REFCLK_p[2] BC29 input CURRENT MODE LOGIC (CML)
FMCP_RES0 BF32 input 3.3-V LVCMOS
FMCP_SCL BH118 inout 3.3-V LVCMOS
FMCP_SDA BK112 inout 3.3-V LVCMOS
FMCP_SYNC_C2M_p CL14 output DIFFERENTIAL 1.2-V SSTL
FMCP_SYNC_M2C_p BW89 input 1.2V TRUE DIFFERENTIAL SIGNALING

PCIE
Name Location Direction IO Standard
PCIE_TX_p[0] BY129 output HIGH SPEED DIFFERENTIAL I/O
PCIE_TX_p[1] BT129 output HIGH SPEED DIFFERENTIAL I/O
PCIE_TX_p[2] BL129 output HIGH SPEED DIFFERENTIAL I/O
PCIE_TX_p[3] BG129 output HIGH SPEED DIFFERENTIAL I/O
PCIE_TX_n[0] BY126 output HIGH SPEED DIFFERENTIAL I/O
PCIE_TX_n[1] BT126 output HIGH SPEED DIFFERENTIAL I/O
PCIE_TX_n[2] BL126 output HIGH SPEED DIFFERENTIAL I/O
PCIE_TX_n[3] BG126 output HIGH SPEED DIFFERENTIAL I/O
PCIE_RX_p[0] BV135 input HIGH SPEED DIFFERENTIAL I/O
PCIE_RX_p[1] BN135 input HIGH SPEED DIFFERENTIAL I/O
PCIE_RX_p[2] BJ135 input HIGH SPEED DIFFERENTIAL I/O
PCIE_RX_p[3] BF135 input HIGH SPEED DIFFERENTIAL I/O
PCIE_RX_n[0] BV133 input HIGH SPEED DIFFERENTIAL I/O
PCIE_RX_n[1] BN133 input HIGH SPEED DIFFERENTIAL I/O
PCIE_RX_n[2] BJ133 input HIGH SPEED DIFFERENTIAL I/O
PCIE_RX_n[3] BF133 input HIGH SPEED DIFFERENTIAL I/O
PCIE_OB_REFCLK_p BC111 input CURRENT MODE LOGIC (CML)
PCIE_REFCLK_p BB120 input CURRENT MODE LOGIC (CML)
PCIE_PERST_n BF107 input 3.3-V LVCMOS
PCIE_WAKE_n D34 output 3.3-V LVCMOS

QSFP
Name Location Direction IO Standard
QSFP_TX_p[0] BE129 output HIGH SPEED DIFFERENTIAL I/O
QSFP_TX_p[1] BC129 output HIGH SPEED DIFFERENTIAL I/O
QSFP_TX_p[2] BA129 output HIGH SPEED DIFFERENTIAL I/O
QSFP_TX_p[3] AW129 output HIGH SPEED DIFFERENTIAL I/O
QSFP_TX_n[0] BE126 output HIGH SPEED DIFFERENTIAL I/O
QSFP_TX_n[1] BC126 output HIGH SPEED DIFFERENTIAL I/O
QSFP_TX_n[2] BA126 output HIGH SPEED DIFFERENTIAL I/O
QSFP_TX_n[3] AW126 output HIGH SPEED DIFFERENTIAL I/O
QSFP_RX_p[0] BD135 input HIGH SPEED DIFFERENTIAL I/O
QSFP_RX_p[1] BB135 input HIGH SPEED DIFFERENTIAL I/O
QSFP_RX_p[2] AY135 input HIGH SPEED DIFFERENTIAL I/O
QSFP_RX_p[3] AV135 input HIGH SPEED DIFFERENTIAL I/O
QSFP_RX_n[0] BD133 input HIGH SPEED DIFFERENTIAL I/O
QSFP_RX_n[1] BB133 input HIGH SPEED DIFFERENTIAL I/O
QSFP_RX_n[2] AY133 input HIGH SPEED DIFFERENTIAL I/O
QSFP_RX_n[3] AV133 input HIGH SPEED DIFFERENTIAL I/O
CIPRI_REFCLK_p AY120 input CURRENT MODE LOGIC (CML)
QSFP_REFCLK_p AV120 input CURRENT MODE LOGIC (CML)
QSFP_INTERRUPT_n A39 input 3.3-V LVCMOS
QSFP_LP_MODE A33 output 3.3-V LVCMOS
QSFP_MOD_PRS_n B35 input 3.3-V LVCMOS
QSFP_MOD_SEL_n B26 output 3.3-V LVCMOS
QSFP_RST_n B30 output 3.3-V LVCMOS
QSFP_SCL A30 inout 3.3-V LVCMOS
QSFP_SDA A35 inout 3.3-V LVCMOS

CAM
Name Location Direction IO Standard
CAM_RZQ0 BR52 input 1.2 V

CAM1
Name Location Direction IO Standard
CAM1_CLK_p CK17 input DPHY
CAM1_CLK_n CL17 input DPHY
CAM1_D_p[0] CL23 input DPHY
CAM1_D_p[1] CL20 input DPHY
CAM1_D_n[0] CK26 input DPHY
CAM1_D_n[1] CK20 input DPHY
CAM1_I2C_SCL J2 inout 3.3-V LVCMOS
CAM1_I2C_SDA G2 inout 3.3-V LVCMOS
CAM1_GPIO K4 inout 3.3-V LVCMOS

CAM2
Name Location Direction IO Standard
CAM2_CLK_p CF28 input DPHY
CAM2_CLK_n CC28 input DPHY
CAM2_D_p[0] CH31 input DPHY
CAM2_D_p[1] CA31 input DPHY
CAM2_D_n[0] CF31 input DPHY
CAM2_D_n[1] CC31 input DPHY
CAM2_I2C_SCL A8 inout 3.3-V LVCMOS
CAM2_I2C_SDA G1 inout 3.3-V LVCMOS
CAM2_GPIO J1 inout 3.3-V LVCMOS

HPS
Name Location Direction IO Standard
HPS_ENET_MDC AG115 output 1.8 V
HPS_ENET_MDIO R134 inout 1.8 V
HPS_ENET_RX_CLK M124 input 1.8 V
HPS_ENET_RX_CTL AB127 input 1.8 V
HPS_ENET_RX_DATA[0] H127 input 1.8 V
HPS_ENET_RX_DATA[1] AB124 input 1.8 V
HPS_ENET_RX_DATA[2] F124 input 1.8 V
HPS_ENET_RX_DATA[3] D124 input 1.8 V
HPS_ENET_TX_CLK M127 output 1.8 V
HPS_ENET_TX_CTL K127 output 1.8 V
HPS_ENET_TX_DATA[0] K124 output 1.8 V
HPS_ENET_TX_DATA[1] Y127 output 1.8 V
HPS_ENET_TX_DATA[2] F127 output 1.8 V
HPS_ENET_TX_DATA[3] Y124 output 1.8 V
HPS_GPIO[0] U135 inout 1.8 V
HPS_GPIO[1] N134 inout 1.8 V
HPS_GPIO[2] N135 inout 1.8 V
HPS_GPIO[3] AK120 inout 1.8 V
HPS_GPIO[4] T132 inout 1.8 V
HPS_I2C_SCL AL120 inout 1.8 V
HPS_I2C_SDA U134 inout 1.8 V
HPS_KEY B134 inout 1.8 V
HPS_LED W135 inout 1.8 V
HPS_OSC_CLK AG123 input 1.8 V
HPS_SDMMC_CLK D132 output 1.8 V
HPS_SDMMC_CMD AB132 inout 1.8 V
HPS_SDMMC_DATA[0] E135 inout 1.8 V
HPS_SDMMC_DATA[1] F132 inout 1.8 V
HPS_SDMMC_DATA[2] AA135 inout 1.8 V
HPS_SDMMC_DATA[3] V127 inout 1.8 V
HPS_SDMMC_DATA[4] T127 inout 1.8 V
HPS_SDMMC_DATA[5] Y132 inout 1.8 V
HPS_SDMMC_DATA[6] T124 inout 1.8 V
HPS_SDMMC_DATA[7] P124 inout 1.8 V
HPS_UART_RX AK115 input 1.8 V
HPS_UART_TX W134 output 1.8 V
HPS_USB3_REFCLK_100M_p AP120 input CURRENT MODE LOGIC (CML)
HPS_USB3_SS_RX_n AM133 input HIGH SPEED DIFFERENTIAL I/O
HPS_USB3_SS_RX_p AM135 input HIGH SPEED DIFFERENTIAL I/O
HPS_USB3_SS_TX_n AN126 output HIGH SPEED DIFFERENTIAL I/O
HPS_USB3_SS_TX_p AN129 output HIGH SPEED DIFFERENTIAL I/O
HPS_USB_CLK P132 input 1.8 V
HPS_USB_DATA[0] AD135 inout 1.8 V
HPS_USB_DATA[1] M132 inout 1.8 V
HPS_USB_DATA[2] K132 inout 1.8 V
HPS_USB_DATA[3] AG129 inout 1.8 V
HPS_USB_DATA[4] J134 inout 1.8 V
HPS_USB_DATA[5] AG120 inout 1.8 V
HPS_USB_DATA[6] G134 inout 1.8 V
HPS_USB_DATA[7] G135 inout 1.8 V
HPS_USB_DIR J135 input 1.8 V
HPS_USB_ID A60 input 1.2 V
HPS_USB_NXT AD134 input 1.8 V
HPS_USB_STP L135 output 1.8 V
HPS_USB_VBUS_CTRL A63 output 1.2 V
HPS_USB_VBUS_DET B60 input 1.2 V
HPS_USB_VBUS_FLT_n B56 input 1.2 V

INFO
Name Location Direction IO Standard
INFO_SPI_SCLK A17 output 3.3-V LVCMOS
INFO_SPI_MISO B23 input 3.3-V LVCMOS
INFO_SPI_MOSI B20 output 3.3-V LVCMOS
INFO_SPI_CS_n A23 output 3.3-V LVCMOS