jtag_subsys

2024.05.17.11:03:21 Datasheet
Overview
Memory Map
fpga_m hps_f2sdram
 master  master

fpga_m

altera_jtag_avalon_master v19.1
jtag_clk out_clk   fpga_m
  clk
jtag_rst_in out_reset  
  clk_reset


Parameters

generateLegacySim false
  

Software Assignments

(none)

hps_f2sdram

altera_jtag_avalon_master v19.1
jtag_clk out_clk   hps_f2sdram
  clk
jtag_rst_in out_reset  
  clk_reset


Parameters

generateLegacySim false
  

Software Assignments

(none)

jtag_clk

altera_clock_bridge v19.2.0


Parameters

generateLegacySim false
  

Software Assignments

(none)

jtag_rst_in

altera_reset_bridge v19.2.0
jtag_clk out_clk   jtag_rst_in
  clk
out_reset   fpga_m
  clk_reset
out_reset   hps_f2sdram
  clk_reset


Parameters

generateLegacySim false
  

Software Assignments

(none)
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