	component system is
		port (
			core_current_export       : in std_logic_vector(15 downto 0) := (others => 'X'); -- export
			core_voltage_export       : in std_logic_vector(15 downto 0) := (others => 'X'); -- export
			fan_speed_export          : in std_logic_vector(15 downto 0) := (others => 'X'); -- export
			pin_status_export         : in std_logic_vector(15 downto 0) := (others => 'X'); -- export
			power_in_voltage_export   : in std_logic_vector(15 downto 0) := (others => 'X'); -- export
			temperature_board1_export : in std_logic_vector(15 downto 0) := (others => 'X'); -- export
			temperature_board2_export : in std_logic_vector(15 downto 0) := (others => 'X'); -- export
			temperature_fpga_export   : in std_logic_vector(15 downto 0) := (others => 'X'); -- export
			temperature_power_export  : in std_logic_vector(15 downto 0) := (others => 'X'); -- export
			vcc1p2_current_export     : in std_logic_vector(15 downto 0) := (others => 'X'); -- export
			vcc1p2_voltage_export     : in std_logic_vector(15 downto 0) := (others => 'X'); -- export
			clock_in_clk              : in std_logic                     := 'X';             -- clk
			reset_in0_reset           : in std_logic                     := 'X';             -- reset
			reset_in1_reset           : in std_logic                     := 'X'              -- reset
		);
	end component system;

	u0 : component system
		port map (
			core_current_export       => CONNECTED_TO_core_current_export,       --       core_current.export
			core_voltage_export       => CONNECTED_TO_core_voltage_export,       --       core_voltage.export
			fan_speed_export          => CONNECTED_TO_fan_speed_export,          --          fan_speed.export
			pin_status_export         => CONNECTED_TO_pin_status_export,         --         pin_status.export
			power_in_voltage_export   => CONNECTED_TO_power_in_voltage_export,   --   power_in_voltage.export
			temperature_board1_export => CONNECTED_TO_temperature_board1_export, -- temperature_board1.export
			temperature_board2_export => CONNECTED_TO_temperature_board2_export, -- temperature_board2.export
			temperature_fpga_export   => CONNECTED_TO_temperature_fpga_export,   --   temperature_fpga.export
			temperature_power_export  => CONNECTED_TO_temperature_power_export,  --  temperature_power.export
			vcc1p2_current_export     => CONNECTED_TO_vcc1p2_current_export,     --     vcc1p2_current.export
			vcc1p2_voltage_export     => CONNECTED_TO_vcc1p2_voltage_export,     --     vcc1p2_voltage.export
			clock_in_clk              => CONNECTED_TO_clock_in_clk,              --           clock_in.clk
			reset_in0_reset           => CONNECTED_TO_reset_in0_reset,           --          reset_in0.reset
			reset_in1_reset           => CONNECTED_TO_reset_in1_reset            --          reset_in1.reset
		);

