// (C) 2001-2024 Intel Corporation. All rights reserved.
// Your use of Intel Corporation's design tools, logic functions and other 
// software and tools, and its AMPP partner logic functions, and any output 
// files from any of the foregoing (including device programming or simulation 
// files), and any associated documentation or information are expressly subject 
// to the terms and conditions of the Intel Program License Subscription 
// Agreement, Intel FPGA IP License Agreement, or other applicable 
// license agreement, including, without limitation, that your use is for the 
// sole purpose of programming logic devices manufactured by Intel and sold by 
// Intel or its authorized distributors.  Please refer to the applicable 
// agreement for further details.


module ff_macro_p2c # (
 parameter DATA_WIDTH = 256,
 parameter NUM_FLOPS = 1 // based on number of flops you need in 1 dir 
 ) (
 input logic clk,

 input [DATA_WIDTH -1:0] in_data ,

 output [DATA_WIDTH -1:0] out_data

);


 (* altera_attribute = {"-name FORCE_HYPER_REGISTER_FOR_PERIPHERY_CORE_TRANSFER ON; -name HYPER_REGISTER_DELAY_CHAIN 350"} *)
    reg [DATA_WIDTH-1:0] in_data_reg [NUM_FLOPS:0];    

    assign in_data_reg[0] = in_data;


    genvar i;
    
    generate 
    for (i=0 ; i<NUM_FLOPS ; i=i+1 ) begin
      always @(posedge clk) begin
          in_data_reg[i+1] <= in_data_reg[i];
      end
    end
    endgenerate

    assign out_data = in_data_reg[NUM_FLOPS];



    
endmodule
`ifdef QUESTA_INTEL_OEM
`pragma questa_oem_00 "Vd3tEFjpZj96rI/+F/VvE60mTEymAEQpoSTBEGkPZDn8vLE37C5u3t6a/YuDWdcpDICg4yaS41BVZL43rgMWoo/ODQa6HJ+98xz96XdaxZoH7knVWHHmdjwNoot126KwBXxYxMAyWcKq2a9b9HntBfzAKtQF4cCehbSzlUccpMg8lYZJJ73s4nMHdujybKqOU3uA0uLLaEuflzNF5/A5MXI1hPhdpBgL5/hYcV95h9N3pHp1biKpL3oh8lQ77aCOLgjZPLm/FRN0tbk79AWZXEkc1PX262Va68q/PcoEwm1qrAPdscxXLAyh2SFvZQ+Qv3mdSEr24+IkByhHPV7FGLQTGVIbmEm49YEDLfbhYXpoKYZUbljOqPlsYFt4E6pimuzA6PCCFGgtRnd9Wk4G2hKIEESIw5TiB7wMA72ZeJJCvbMT0dF/QJnFIUgr+7majrJhMnTzjGo0YkoPFsgzKLDQtjW0anzMrG0McKjQ/a2mmkdnF/trG0xz3683Vy23CYNZd3UdFsWqNj/YuLASqYEP/JnD+/38b/ymeBfaU/lM3GEs841JAT31y5+aSdGWYJJ4+lb8mVXc/zbVmi0LOcDxoPn40Un+8++kY3Jj6WZDu6JW1j6Gf4+ovOwmbnF7NaR9Hbz5oczDz5e2Q3YTa6TU6X0e5PajOSu++zE370+HTsAq/XDy63c5+ivXS4m3nwjRQJuLIcEWrZwH6fl12zZ6jXPEryPITwQMc3xiFBN97QeuyYfoFuk9Ina6XLpNSsZbJcdTOopYB7HucgaexlHrgOlMbJ0mNUmwU2fDXwOJ3rLoCmhLvorKo0ErvtxE7JJ1vFokDPh2f7Ca8HX9apGzAD/cfVFkzWRdP+sbU//ZMfdO6XQjmINbfYv2kZrJgexhHiOzS9XQj9yheMYlUWEuUnAS9qnrp+uA6ZANiTievEIg3+PBfMrGVJjJU67JEQywWNx4n3ffzmGtzshJBpX4f5GuH06cDIQqgtHz0GYOV4VJRgXfFBENd7ceBVjs"
`endif