// system_altera_mm_interconnect_1920_mh2lfeq.v

// This file was auto-generated from altera_mm_interconnect_hw.tcl.  If you edit it your changes
// will probably be lost.
// 
// Generated using ACDS version 23.4 79

`timescale 1 ps / 1 ps
module system_altera_mm_interconnect_1920_mh2lfeq (
		input  wire [20:0] nios2_gen2_data_master_address,               //                 nios2_gen2_data_master.address
		output wire        nios2_gen2_data_master_waitrequest,           //                                       .waitrequest
		input  wire [3:0]  nios2_gen2_data_master_byteenable,            //                                       .byteenable
		input  wire        nios2_gen2_data_master_read,                  //                                       .read
		output wire [31:0] nios2_gen2_data_master_readdata,              //                                       .readdata
		output wire        nios2_gen2_data_master_readdatavalid,         //                                       .readdatavalid
		input  wire        nios2_gen2_data_master_write,                 //                                       .write
		input  wire [31:0] nios2_gen2_data_master_writedata,             //                                       .writedata
		input  wire        nios2_gen2_data_master_debugaccess,           //                                       .debugaccess
		input  wire [20:0] nios2_gen2_instruction_master_address,        //          nios2_gen2_instruction_master.address
		output wire        nios2_gen2_instruction_master_waitrequest,    //                                       .waitrequest
		input  wire        nios2_gen2_instruction_master_read,           //                                       .read
		output wire [31:0] nios2_gen2_instruction_master_readdata,       //                                       .readdata
		output wire        nios2_gen2_instruction_master_readdatavalid,  //                                       .readdatavalid
		output wire [0:0]  jtag_uart_avalon_jtag_slave_address,          //            jtag_uart_avalon_jtag_slave.address
		output wire        jtag_uart_avalon_jtag_slave_write,            //                                       .write
		output wire        jtag_uart_avalon_jtag_slave_read,             //                                       .read
		input  wire [31:0] jtag_uart_avalon_jtag_slave_readdata,         //                                       .readdata
		output wire [31:0] jtag_uart_avalon_jtag_slave_writedata,        //                                       .writedata
		input  wire        jtag_uart_avalon_jtag_slave_waitrequest,      //                                       .waitrequest
		output wire        jtag_uart_avalon_jtag_slave_chipselect,       //                                       .chipselect
		output wire [0:0]  sysid_qsys_control_slave_address,             //               sysid_qsys_control_slave.address
		input  wire [31:0] sysid_qsys_control_slave_readdata,            //                                       .readdata
		output wire [8:0]  nios2_gen2_debug_mem_slave_address,           //             nios2_gen2_debug_mem_slave.address
		output wire        nios2_gen2_debug_mem_slave_write,             //                                       .write
		output wire        nios2_gen2_debug_mem_slave_read,              //                                       .read
		input  wire [31:0] nios2_gen2_debug_mem_slave_readdata,          //                                       .readdata
		output wire [31:0] nios2_gen2_debug_mem_slave_writedata,         //                                       .writedata
		output wire [3:0]  nios2_gen2_debug_mem_slave_byteenable,        //                                       .byteenable
		input  wire        nios2_gen2_debug_mem_slave_waitrequest,       //                                       .waitrequest
		output wire        nios2_gen2_debug_mem_slave_debugaccess,       //                                       .debugaccess
		output wire [16:0] onchip_memory2_s1_address,                    //                      onchip_memory2_s1.address
		output wire        onchip_memory2_s1_write,                      //                                       .write
		input  wire [31:0] onchip_memory2_s1_readdata,                   //                                       .readdata
		output wire [31:0] onchip_memory2_s1_writedata,                  //                                       .writedata
		output wire [3:0]  onchip_memory2_s1_byteenable,                 //                                       .byteenable
		output wire        onchip_memory2_s1_chipselect,                 //                                       .chipselect
		output wire        onchip_memory2_s1_clken,                      //                                       .clken
		output wire [1:0]  board_info_temperature_fpga_s1_address,       //         board_info_temperature_fpga_s1.address
		input  wire [31:0] board_info_temperature_fpga_s1_readdata,      //                                       .readdata
		output wire [1:0]  board_info_temperature_board1_s1_address,     //       board_info_temperature_board1_s1.address
		input  wire [31:0] board_info_temperature_board1_s1_readdata,    //                                       .readdata
		output wire [1:0]  board_info_fan_speed1_s1_address,             //               board_info_fan_speed1_s1.address
		input  wire [31:0] board_info_fan_speed1_s1_readdata,            //                                       .readdata
		output wire [1:0]  board_info_fan_speed2_s1_address,             //               board_info_fan_speed2_s1.address
		input  wire [31:0] board_info_fan_speed2_s1_readdata,            //                                       .readdata
		output wire [1:0]  board_info_core_current_s1_address,           //             board_info_core_current_s1.address
		input  wire [31:0] board_info_core_current_s1_readdata,          //                                       .readdata
		output wire [1:0]  board_info_core_voltage_s1_address,           //             board_info_core_voltage_s1.address
		input  wire [31:0] board_info_core_voltage_s1_readdata,          //                                       .readdata
		output wire [1:0]  board_info_power_in_current_s1_address,       //         board_info_power_in_current_s1.address
		input  wire [31:0] board_info_power_in_current_s1_readdata,      //                                       .readdata
		output wire [1:0]  board_info_power_in_voltage_s1_address,       //         board_info_power_in_voltage_s1.address
		input  wire [31:0] board_info_power_in_voltage_s1_readdata,      //                                       .readdata
		output wire [1:0]  board_info_pin_status_s1_address,             //               board_info_pin_status_s1.address
		input  wire [31:0] board_info_pin_status_s1_readdata,            //                                       .readdata
		output wire [1:0]  board_info_temperature_sdm_s1_address,        //          board_info_temperature_sdm_s1.address
		input  wire [31:0] board_info_temperature_sdm_s1_readdata,       //                                       .readdata
		output wire [1:0]  board_info_temperature_xcvr1_s1_address,      //        board_info_temperature_xcvr1_s1.address
		input  wire [31:0] board_info_temperature_xcvr1_s1_readdata,     //                                       .readdata
		output wire [1:0]  board_info_temperature_board2_s1_address,     //       board_info_temperature_board2_s1.address
		input  wire [31:0] board_info_temperature_board2_s1_readdata,    //                                       .readdata
		output wire [1:0]  board_info_temperature_xcvr2_s1_address,      //        board_info_temperature_xcvr2_s1.address
		input  wire [31:0] board_info_temperature_xcvr2_s1_readdata,     //                                       .readdata
		output wire [2:0]  timer_s1_address,                             //                               timer_s1.address
		output wire        timer_s1_write,                               //                                       .write
		input  wire [15:0] timer_s1_readdata,                            //                                       .readdata
		output wire [15:0] timer_s1_writedata,                           //                                       .writedata
		output wire        timer_s1_chipselect,                          //                                       .chipselect
		output wire [1:0]  board_info_temperature_power_s1_address,      //        board_info_temperature_power_s1.address
		input  wire [31:0] board_info_temperature_power_s1_readdata,     //                                       .readdata
		output wire [1:0]  board_info_temperature_board3_s1_address,     //       board_info_temperature_board3_s1.address
		input  wire [31:0] board_info_temperature_board3_s1_readdata,    //                                       .readdata
		output wire [1:0]  board_info_temperature_xcvr3_s1_address,      //        board_info_temperature_xcvr3_s1.address
		input  wire [31:0] board_info_temperature_xcvr3_s1_readdata,     //                                       .readdata
		input  wire        nios2_gen2_reset_reset_bridge_in_reset_reset, // nios2_gen2_reset_reset_bridge_in_reset.reset
		input  wire        jtag_uart_reset_reset_bridge_in_reset_reset,  //  jtag_uart_reset_reset_bridge_in_reset.reset
		input  wire        clock_in_out_clk_clk                          //                       clock_in_out_clk.clk
	);

	wire          nios2_gen2_data_master_translator_avalon_universal_master_0_waitrequest;          // nios2_gen2_data_master_agent:av_waitrequest -> nios2_gen2_data_master_translator:uav_waitrequest
	wire   [31:0] nios2_gen2_data_master_translator_avalon_universal_master_0_readdata;             // nios2_gen2_data_master_agent:av_readdata -> nios2_gen2_data_master_translator:uav_readdata
	wire          nios2_gen2_data_master_translator_avalon_universal_master_0_debugaccess;          // nios2_gen2_data_master_translator:uav_debugaccess -> nios2_gen2_data_master_agent:av_debugaccess
	wire   [20:0] nios2_gen2_data_master_translator_avalon_universal_master_0_address;              // nios2_gen2_data_master_translator:uav_address -> nios2_gen2_data_master_agent:av_address
	wire          nios2_gen2_data_master_translator_avalon_universal_master_0_read;                 // nios2_gen2_data_master_translator:uav_read -> nios2_gen2_data_master_agent:av_read
	wire    [3:0] nios2_gen2_data_master_translator_avalon_universal_master_0_byteenable;           // nios2_gen2_data_master_translator:uav_byteenable -> nios2_gen2_data_master_agent:av_byteenable
	wire          nios2_gen2_data_master_translator_avalon_universal_master_0_readdatavalid;        // nios2_gen2_data_master_agent:av_readdatavalid -> nios2_gen2_data_master_translator:uav_readdatavalid
	wire          nios2_gen2_data_master_translator_avalon_universal_master_0_lock;                 // nios2_gen2_data_master_translator:uav_lock -> nios2_gen2_data_master_agent:av_lock
	wire          nios2_gen2_data_master_translator_avalon_universal_master_0_write;                // nios2_gen2_data_master_translator:uav_write -> nios2_gen2_data_master_agent:av_write
	wire   [31:0] nios2_gen2_data_master_translator_avalon_universal_master_0_writedata;            // nios2_gen2_data_master_translator:uav_writedata -> nios2_gen2_data_master_agent:av_writedata
	wire    [2:0] nios2_gen2_data_master_translator_avalon_universal_master_0_burstcount;           // nios2_gen2_data_master_translator:uav_burstcount -> nios2_gen2_data_master_agent:av_burstcount
	wire          nios2_gen2_instruction_master_translator_avalon_universal_master_0_waitrequest;   // nios2_gen2_instruction_master_agent:av_waitrequest -> nios2_gen2_instruction_master_translator:uav_waitrequest
	wire   [31:0] nios2_gen2_instruction_master_translator_avalon_universal_master_0_readdata;      // nios2_gen2_instruction_master_agent:av_readdata -> nios2_gen2_instruction_master_translator:uav_readdata
	wire          nios2_gen2_instruction_master_translator_avalon_universal_master_0_debugaccess;   // nios2_gen2_instruction_master_translator:uav_debugaccess -> nios2_gen2_instruction_master_agent:av_debugaccess
	wire   [20:0] nios2_gen2_instruction_master_translator_avalon_universal_master_0_address;       // nios2_gen2_instruction_master_translator:uav_address -> nios2_gen2_instruction_master_agent:av_address
	wire          nios2_gen2_instruction_master_translator_avalon_universal_master_0_read;          // nios2_gen2_instruction_master_translator:uav_read -> nios2_gen2_instruction_master_agent:av_read
	wire    [3:0] nios2_gen2_instruction_master_translator_avalon_universal_master_0_byteenable;    // nios2_gen2_instruction_master_translator:uav_byteenable -> nios2_gen2_instruction_master_agent:av_byteenable
	wire          nios2_gen2_instruction_master_translator_avalon_universal_master_0_readdatavalid; // nios2_gen2_instruction_master_agent:av_readdatavalid -> nios2_gen2_instruction_master_translator:uav_readdatavalid
	wire          nios2_gen2_instruction_master_translator_avalon_universal_master_0_lock;          // nios2_gen2_instruction_master_translator:uav_lock -> nios2_gen2_instruction_master_agent:av_lock
	wire          nios2_gen2_instruction_master_translator_avalon_universal_master_0_write;         // nios2_gen2_instruction_master_translator:uav_write -> nios2_gen2_instruction_master_agent:av_write
	wire   [31:0] nios2_gen2_instruction_master_translator_avalon_universal_master_0_writedata;     // nios2_gen2_instruction_master_translator:uav_writedata -> nios2_gen2_instruction_master_agent:av_writedata
	wire    [2:0] nios2_gen2_instruction_master_translator_avalon_universal_master_0_burstcount;    // nios2_gen2_instruction_master_translator:uav_burstcount -> nios2_gen2_instruction_master_agent:av_burstcount
	wire   [31:0] jtag_uart_avalon_jtag_slave_agent_m0_readdata;                                    // jtag_uart_avalon_jtag_slave_translator:uav_readdata -> jtag_uart_avalon_jtag_slave_agent:m0_readdata
	wire          jtag_uart_avalon_jtag_slave_agent_m0_waitrequest;                                 // jtag_uart_avalon_jtag_slave_translator:uav_waitrequest -> jtag_uart_avalon_jtag_slave_agent:m0_waitrequest
	wire          jtag_uart_avalon_jtag_slave_agent_m0_debugaccess;                                 // jtag_uart_avalon_jtag_slave_agent:m0_debugaccess -> jtag_uart_avalon_jtag_slave_translator:uav_debugaccess
	wire   [20:0] jtag_uart_avalon_jtag_slave_agent_m0_address;                                     // jtag_uart_avalon_jtag_slave_agent:m0_address -> jtag_uart_avalon_jtag_slave_translator:uav_address
	wire    [3:0] jtag_uart_avalon_jtag_slave_agent_m0_byteenable;                                  // jtag_uart_avalon_jtag_slave_agent:m0_byteenable -> jtag_uart_avalon_jtag_slave_translator:uav_byteenable
	wire          jtag_uart_avalon_jtag_slave_agent_m0_read;                                        // jtag_uart_avalon_jtag_slave_agent:m0_read -> jtag_uart_avalon_jtag_slave_translator:uav_read
	wire          jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid;                               // jtag_uart_avalon_jtag_slave_translator:uav_readdatavalid -> jtag_uart_avalon_jtag_slave_agent:m0_readdatavalid
	wire          jtag_uart_avalon_jtag_slave_agent_m0_lock;                                        // jtag_uart_avalon_jtag_slave_agent:m0_lock -> jtag_uart_avalon_jtag_slave_translator:uav_lock
	wire   [31:0] jtag_uart_avalon_jtag_slave_agent_m0_writedata;                                   // jtag_uart_avalon_jtag_slave_agent:m0_writedata -> jtag_uart_avalon_jtag_slave_translator:uav_writedata
	wire          jtag_uart_avalon_jtag_slave_agent_m0_write;                                       // jtag_uart_avalon_jtag_slave_agent:m0_write -> jtag_uart_avalon_jtag_slave_translator:uav_write
	wire    [2:0] jtag_uart_avalon_jtag_slave_agent_m0_burstcount;                                  // jtag_uart_avalon_jtag_slave_agent:m0_burstcount -> jtag_uart_avalon_jtag_slave_translator:uav_burstcount
	wire          jtag_uart_avalon_jtag_slave_agent_rf_source_valid;                                // jtag_uart_avalon_jtag_slave_agent:rf_source_valid -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_valid
	wire  [123:0] jtag_uart_avalon_jtag_slave_agent_rf_source_data;                                 // jtag_uart_avalon_jtag_slave_agent:rf_source_data -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_data
	wire          jtag_uart_avalon_jtag_slave_agent_rf_source_ready;                                // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_ready -> jtag_uart_avalon_jtag_slave_agent:rf_source_ready
	wire          jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket;                        // jtag_uart_avalon_jtag_slave_agent:rf_source_startofpacket -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_startofpacket
	wire          jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket;                          // jtag_uart_avalon_jtag_slave_agent:rf_source_endofpacket -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_endofpacket
	wire          jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid;                             // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_valid -> jtag_uart_avalon_jtag_slave_agent:rf_sink_valid
	wire  [123:0] jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data;                              // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_data -> jtag_uart_avalon_jtag_slave_agent:rf_sink_data
	wire          jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready;                             // jtag_uart_avalon_jtag_slave_agent:rf_sink_ready -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_ready
	wire          jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket;                     // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_startofpacket -> jtag_uart_avalon_jtag_slave_agent:rf_sink_startofpacket
	wire          jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket;                       // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_endofpacket -> jtag_uart_avalon_jtag_slave_agent:rf_sink_endofpacket
	wire          jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid;                           // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_valid -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_valid
	wire   [33:0] jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data;                            // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_data -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_data
	wire          jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready;                           // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_ready -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_ready
	wire          cmd_mux_src_valid;                                                                // cmd_mux:src_valid -> jtag_uart_avalon_jtag_slave_agent:cp_valid
	wire  [122:0] cmd_mux_src_data;                                                                 // cmd_mux:src_data -> jtag_uart_avalon_jtag_slave_agent:cp_data
	wire          cmd_mux_src_ready;                                                                // jtag_uart_avalon_jtag_slave_agent:cp_ready -> cmd_mux:src_ready
	wire   [20:0] cmd_mux_src_channel;                                                              // cmd_mux:src_channel -> jtag_uart_avalon_jtag_slave_agent:cp_channel
	wire          cmd_mux_src_startofpacket;                                                        // cmd_mux:src_startofpacket -> jtag_uart_avalon_jtag_slave_agent:cp_startofpacket
	wire          cmd_mux_src_endofpacket;                                                          // cmd_mux:src_endofpacket -> jtag_uart_avalon_jtag_slave_agent:cp_endofpacket
	wire   [31:0] sysid_qsys_control_slave_agent_m0_readdata;                                       // sysid_qsys_control_slave_translator:uav_readdata -> sysid_qsys_control_slave_agent:m0_readdata
	wire          sysid_qsys_control_slave_agent_m0_waitrequest;                                    // sysid_qsys_control_slave_translator:uav_waitrequest -> sysid_qsys_control_slave_agent:m0_waitrequest
	wire          sysid_qsys_control_slave_agent_m0_debugaccess;                                    // sysid_qsys_control_slave_agent:m0_debugaccess -> sysid_qsys_control_slave_translator:uav_debugaccess
	wire   [20:0] sysid_qsys_control_slave_agent_m0_address;                                        // sysid_qsys_control_slave_agent:m0_address -> sysid_qsys_control_slave_translator:uav_address
	wire    [3:0] sysid_qsys_control_slave_agent_m0_byteenable;                                     // sysid_qsys_control_slave_agent:m0_byteenable -> sysid_qsys_control_slave_translator:uav_byteenable
	wire          sysid_qsys_control_slave_agent_m0_read;                                           // sysid_qsys_control_slave_agent:m0_read -> sysid_qsys_control_slave_translator:uav_read
	wire          sysid_qsys_control_slave_agent_m0_readdatavalid;                                  // sysid_qsys_control_slave_translator:uav_readdatavalid -> sysid_qsys_control_slave_agent:m0_readdatavalid
	wire          sysid_qsys_control_slave_agent_m0_lock;                                           // sysid_qsys_control_slave_agent:m0_lock -> sysid_qsys_control_slave_translator:uav_lock
	wire   [31:0] sysid_qsys_control_slave_agent_m0_writedata;                                      // sysid_qsys_control_slave_agent:m0_writedata -> sysid_qsys_control_slave_translator:uav_writedata
	wire          sysid_qsys_control_slave_agent_m0_write;                                          // sysid_qsys_control_slave_agent:m0_write -> sysid_qsys_control_slave_translator:uav_write
	wire    [2:0] sysid_qsys_control_slave_agent_m0_burstcount;                                     // sysid_qsys_control_slave_agent:m0_burstcount -> sysid_qsys_control_slave_translator:uav_burstcount
	wire          sysid_qsys_control_slave_agent_rf_source_valid;                                   // sysid_qsys_control_slave_agent:rf_source_valid -> sysid_qsys_control_slave_agent_rsp_fifo:in_valid
	wire  [123:0] sysid_qsys_control_slave_agent_rf_source_data;                                    // sysid_qsys_control_slave_agent:rf_source_data -> sysid_qsys_control_slave_agent_rsp_fifo:in_data
	wire          sysid_qsys_control_slave_agent_rf_source_ready;                                   // sysid_qsys_control_slave_agent_rsp_fifo:in_ready -> sysid_qsys_control_slave_agent:rf_source_ready
	wire          sysid_qsys_control_slave_agent_rf_source_startofpacket;                           // sysid_qsys_control_slave_agent:rf_source_startofpacket -> sysid_qsys_control_slave_agent_rsp_fifo:in_startofpacket
	wire          sysid_qsys_control_slave_agent_rf_source_endofpacket;                             // sysid_qsys_control_slave_agent:rf_source_endofpacket -> sysid_qsys_control_slave_agent_rsp_fifo:in_endofpacket
	wire          sysid_qsys_control_slave_agent_rsp_fifo_out_valid;                                // sysid_qsys_control_slave_agent_rsp_fifo:out_valid -> sysid_qsys_control_slave_agent:rf_sink_valid
	wire  [123:0] sysid_qsys_control_slave_agent_rsp_fifo_out_data;                                 // sysid_qsys_control_slave_agent_rsp_fifo:out_data -> sysid_qsys_control_slave_agent:rf_sink_data
	wire          sysid_qsys_control_slave_agent_rsp_fifo_out_ready;                                // sysid_qsys_control_slave_agent:rf_sink_ready -> sysid_qsys_control_slave_agent_rsp_fifo:out_ready
	wire          sysid_qsys_control_slave_agent_rsp_fifo_out_startofpacket;                        // sysid_qsys_control_slave_agent_rsp_fifo:out_startofpacket -> sysid_qsys_control_slave_agent:rf_sink_startofpacket
	wire          sysid_qsys_control_slave_agent_rsp_fifo_out_endofpacket;                          // sysid_qsys_control_slave_agent_rsp_fifo:out_endofpacket -> sysid_qsys_control_slave_agent:rf_sink_endofpacket
	wire          sysid_qsys_control_slave_agent_rdata_fifo_src_valid;                              // sysid_qsys_control_slave_agent:rdata_fifo_src_valid -> sysid_qsys_control_slave_agent:rdata_fifo_sink_valid
	wire   [33:0] sysid_qsys_control_slave_agent_rdata_fifo_src_data;                               // sysid_qsys_control_slave_agent:rdata_fifo_src_data -> sysid_qsys_control_slave_agent:rdata_fifo_sink_data
	wire          sysid_qsys_control_slave_agent_rdata_fifo_src_ready;                              // sysid_qsys_control_slave_agent:rdata_fifo_sink_ready -> sysid_qsys_control_slave_agent:rdata_fifo_src_ready
	wire          cmd_mux_001_src_valid;                                                            // cmd_mux_001:src_valid -> sysid_qsys_control_slave_agent:cp_valid
	wire  [122:0] cmd_mux_001_src_data;                                                             // cmd_mux_001:src_data -> sysid_qsys_control_slave_agent:cp_data
	wire          cmd_mux_001_src_ready;                                                            // sysid_qsys_control_slave_agent:cp_ready -> cmd_mux_001:src_ready
	wire   [20:0] cmd_mux_001_src_channel;                                                          // cmd_mux_001:src_channel -> sysid_qsys_control_slave_agent:cp_channel
	wire          cmd_mux_001_src_startofpacket;                                                    // cmd_mux_001:src_startofpacket -> sysid_qsys_control_slave_agent:cp_startofpacket
	wire          cmd_mux_001_src_endofpacket;                                                      // cmd_mux_001:src_endofpacket -> sysid_qsys_control_slave_agent:cp_endofpacket
	wire   [31:0] nios2_gen2_debug_mem_slave_agent_m0_readdata;                                     // nios2_gen2_debug_mem_slave_translator:uav_readdata -> nios2_gen2_debug_mem_slave_agent:m0_readdata
	wire          nios2_gen2_debug_mem_slave_agent_m0_waitrequest;                                  // nios2_gen2_debug_mem_slave_translator:uav_waitrequest -> nios2_gen2_debug_mem_slave_agent:m0_waitrequest
	wire          nios2_gen2_debug_mem_slave_agent_m0_debugaccess;                                  // nios2_gen2_debug_mem_slave_agent:m0_debugaccess -> nios2_gen2_debug_mem_slave_translator:uav_debugaccess
	wire   [20:0] nios2_gen2_debug_mem_slave_agent_m0_address;                                      // nios2_gen2_debug_mem_slave_agent:m0_address -> nios2_gen2_debug_mem_slave_translator:uav_address
	wire    [3:0] nios2_gen2_debug_mem_slave_agent_m0_byteenable;                                   // nios2_gen2_debug_mem_slave_agent:m0_byteenable -> nios2_gen2_debug_mem_slave_translator:uav_byteenable
	wire          nios2_gen2_debug_mem_slave_agent_m0_read;                                         // nios2_gen2_debug_mem_slave_agent:m0_read -> nios2_gen2_debug_mem_slave_translator:uav_read
	wire          nios2_gen2_debug_mem_slave_agent_m0_readdatavalid;                                // nios2_gen2_debug_mem_slave_translator:uav_readdatavalid -> nios2_gen2_debug_mem_slave_agent:m0_readdatavalid
	wire          nios2_gen2_debug_mem_slave_agent_m0_lock;                                         // nios2_gen2_debug_mem_slave_agent:m0_lock -> nios2_gen2_debug_mem_slave_translator:uav_lock
	wire   [31:0] nios2_gen2_debug_mem_slave_agent_m0_writedata;                                    // nios2_gen2_debug_mem_slave_agent:m0_writedata -> nios2_gen2_debug_mem_slave_translator:uav_writedata
	wire          nios2_gen2_debug_mem_slave_agent_m0_write;                                        // nios2_gen2_debug_mem_slave_agent:m0_write -> nios2_gen2_debug_mem_slave_translator:uav_write
	wire    [2:0] nios2_gen2_debug_mem_slave_agent_m0_burstcount;                                   // nios2_gen2_debug_mem_slave_agent:m0_burstcount -> nios2_gen2_debug_mem_slave_translator:uav_burstcount
	wire          nios2_gen2_debug_mem_slave_agent_rf_source_valid;                                 // nios2_gen2_debug_mem_slave_agent:rf_source_valid -> nios2_gen2_debug_mem_slave_agent_rsp_fifo:in_valid
	wire  [123:0] nios2_gen2_debug_mem_slave_agent_rf_source_data;                                  // nios2_gen2_debug_mem_slave_agent:rf_source_data -> nios2_gen2_debug_mem_slave_agent_rsp_fifo:in_data
	wire          nios2_gen2_debug_mem_slave_agent_rf_source_ready;                                 // nios2_gen2_debug_mem_slave_agent_rsp_fifo:in_ready -> nios2_gen2_debug_mem_slave_agent:rf_source_ready
	wire          nios2_gen2_debug_mem_slave_agent_rf_source_startofpacket;                         // nios2_gen2_debug_mem_slave_agent:rf_source_startofpacket -> nios2_gen2_debug_mem_slave_agent_rsp_fifo:in_startofpacket
	wire          nios2_gen2_debug_mem_slave_agent_rf_source_endofpacket;                           // nios2_gen2_debug_mem_slave_agent:rf_source_endofpacket -> nios2_gen2_debug_mem_slave_agent_rsp_fifo:in_endofpacket
	wire          nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_valid;                              // nios2_gen2_debug_mem_slave_agent_rsp_fifo:out_valid -> nios2_gen2_debug_mem_slave_agent:rf_sink_valid
	wire  [123:0] nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_data;                               // nios2_gen2_debug_mem_slave_agent_rsp_fifo:out_data -> nios2_gen2_debug_mem_slave_agent:rf_sink_data
	wire          nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_ready;                              // nios2_gen2_debug_mem_slave_agent:rf_sink_ready -> nios2_gen2_debug_mem_slave_agent_rsp_fifo:out_ready
	wire          nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_startofpacket;                      // nios2_gen2_debug_mem_slave_agent_rsp_fifo:out_startofpacket -> nios2_gen2_debug_mem_slave_agent:rf_sink_startofpacket
	wire          nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_endofpacket;                        // nios2_gen2_debug_mem_slave_agent_rsp_fifo:out_endofpacket -> nios2_gen2_debug_mem_slave_agent:rf_sink_endofpacket
	wire          nios2_gen2_debug_mem_slave_agent_rdata_fifo_src_valid;                            // nios2_gen2_debug_mem_slave_agent:rdata_fifo_src_valid -> nios2_gen2_debug_mem_slave_agent:rdata_fifo_sink_valid
	wire   [33:0] nios2_gen2_debug_mem_slave_agent_rdata_fifo_src_data;                             // nios2_gen2_debug_mem_slave_agent:rdata_fifo_src_data -> nios2_gen2_debug_mem_slave_agent:rdata_fifo_sink_data
	wire          nios2_gen2_debug_mem_slave_agent_rdata_fifo_src_ready;                            // nios2_gen2_debug_mem_slave_agent:rdata_fifo_sink_ready -> nios2_gen2_debug_mem_slave_agent:rdata_fifo_src_ready
	wire          cmd_mux_002_src_valid;                                                            // cmd_mux_002:src_valid -> nios2_gen2_debug_mem_slave_agent:cp_valid
	wire  [122:0] cmd_mux_002_src_data;                                                             // cmd_mux_002:src_data -> nios2_gen2_debug_mem_slave_agent:cp_data
	wire          cmd_mux_002_src_ready;                                                            // nios2_gen2_debug_mem_slave_agent:cp_ready -> cmd_mux_002:src_ready
	wire   [20:0] cmd_mux_002_src_channel;                                                          // cmd_mux_002:src_channel -> nios2_gen2_debug_mem_slave_agent:cp_channel
	wire          cmd_mux_002_src_startofpacket;                                                    // cmd_mux_002:src_startofpacket -> nios2_gen2_debug_mem_slave_agent:cp_startofpacket
	wire          cmd_mux_002_src_endofpacket;                                                      // cmd_mux_002:src_endofpacket -> nios2_gen2_debug_mem_slave_agent:cp_endofpacket
	wire   [31:0] onchip_memory2_s1_agent_m0_readdata;                                              // onchip_memory2_s1_translator:uav_readdata -> onchip_memory2_s1_agent:m0_readdata
	wire          onchip_memory2_s1_agent_m0_waitrequest;                                           // onchip_memory2_s1_translator:uav_waitrequest -> onchip_memory2_s1_agent:m0_waitrequest
	wire          onchip_memory2_s1_agent_m0_debugaccess;                                           // onchip_memory2_s1_agent:m0_debugaccess -> onchip_memory2_s1_translator:uav_debugaccess
	wire   [20:0] onchip_memory2_s1_agent_m0_address;                                               // onchip_memory2_s1_agent:m0_address -> onchip_memory2_s1_translator:uav_address
	wire    [3:0] onchip_memory2_s1_agent_m0_byteenable;                                            // onchip_memory2_s1_agent:m0_byteenable -> onchip_memory2_s1_translator:uav_byteenable
	wire          onchip_memory2_s1_agent_m0_read;                                                  // onchip_memory2_s1_agent:m0_read -> onchip_memory2_s1_translator:uav_read
	wire          onchip_memory2_s1_agent_m0_readdatavalid;                                         // onchip_memory2_s1_translator:uav_readdatavalid -> onchip_memory2_s1_agent:m0_readdatavalid
	wire          onchip_memory2_s1_agent_m0_lock;                                                  // onchip_memory2_s1_agent:m0_lock -> onchip_memory2_s1_translator:uav_lock
	wire   [31:0] onchip_memory2_s1_agent_m0_writedata;                                             // onchip_memory2_s1_agent:m0_writedata -> onchip_memory2_s1_translator:uav_writedata
	wire          onchip_memory2_s1_agent_m0_write;                                                 // onchip_memory2_s1_agent:m0_write -> onchip_memory2_s1_translator:uav_write
	wire    [2:0] onchip_memory2_s1_agent_m0_burstcount;                                            // onchip_memory2_s1_agent:m0_burstcount -> onchip_memory2_s1_translator:uav_burstcount
	wire          onchip_memory2_s1_agent_rf_source_valid;                                          // onchip_memory2_s1_agent:rf_source_valid -> onchip_memory2_s1_agent_rsp_fifo:in_valid
	wire  [123:0] onchip_memory2_s1_agent_rf_source_data;                                           // onchip_memory2_s1_agent:rf_source_data -> onchip_memory2_s1_agent_rsp_fifo:in_data
	wire          onchip_memory2_s1_agent_rf_source_ready;                                          // onchip_memory2_s1_agent_rsp_fifo:in_ready -> onchip_memory2_s1_agent:rf_source_ready
	wire          onchip_memory2_s1_agent_rf_source_startofpacket;                                  // onchip_memory2_s1_agent:rf_source_startofpacket -> onchip_memory2_s1_agent_rsp_fifo:in_startofpacket
	wire          onchip_memory2_s1_agent_rf_source_endofpacket;                                    // onchip_memory2_s1_agent:rf_source_endofpacket -> onchip_memory2_s1_agent_rsp_fifo:in_endofpacket
	wire          onchip_memory2_s1_agent_rsp_fifo_out_valid;                                       // onchip_memory2_s1_agent_rsp_fifo:out_valid -> onchip_memory2_s1_agent:rf_sink_valid
	wire  [123:0] onchip_memory2_s1_agent_rsp_fifo_out_data;                                        // onchip_memory2_s1_agent_rsp_fifo:out_data -> onchip_memory2_s1_agent:rf_sink_data
	wire          onchip_memory2_s1_agent_rsp_fifo_out_ready;                                       // onchip_memory2_s1_agent:rf_sink_ready -> onchip_memory2_s1_agent_rsp_fifo:out_ready
	wire          onchip_memory2_s1_agent_rsp_fifo_out_startofpacket;                               // onchip_memory2_s1_agent_rsp_fifo:out_startofpacket -> onchip_memory2_s1_agent:rf_sink_startofpacket
	wire          onchip_memory2_s1_agent_rsp_fifo_out_endofpacket;                                 // onchip_memory2_s1_agent_rsp_fifo:out_endofpacket -> onchip_memory2_s1_agent:rf_sink_endofpacket
	wire          onchip_memory2_s1_agent_rdata_fifo_src_valid;                                     // onchip_memory2_s1_agent:rdata_fifo_src_valid -> onchip_memory2_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] onchip_memory2_s1_agent_rdata_fifo_src_data;                                      // onchip_memory2_s1_agent:rdata_fifo_src_data -> onchip_memory2_s1_agent:rdata_fifo_sink_data
	wire          onchip_memory2_s1_agent_rdata_fifo_src_ready;                                     // onchip_memory2_s1_agent:rdata_fifo_sink_ready -> onchip_memory2_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_003_src_valid;                                                            // cmd_mux_003:src_valid -> onchip_memory2_s1_agent:cp_valid
	wire  [122:0] cmd_mux_003_src_data;                                                             // cmd_mux_003:src_data -> onchip_memory2_s1_agent:cp_data
	wire          cmd_mux_003_src_ready;                                                            // onchip_memory2_s1_agent:cp_ready -> cmd_mux_003:src_ready
	wire   [20:0] cmd_mux_003_src_channel;                                                          // cmd_mux_003:src_channel -> onchip_memory2_s1_agent:cp_channel
	wire          cmd_mux_003_src_startofpacket;                                                    // cmd_mux_003:src_startofpacket -> onchip_memory2_s1_agent:cp_startofpacket
	wire          cmd_mux_003_src_endofpacket;                                                      // cmd_mux_003:src_endofpacket -> onchip_memory2_s1_agent:cp_endofpacket
	wire   [31:0] board_info_temperature_fpga_s1_agent_m0_readdata;                                 // board_info_temperature_fpga_s1_translator:uav_readdata -> board_info_temperature_fpga_s1_agent:m0_readdata
	wire          board_info_temperature_fpga_s1_agent_m0_waitrequest;                              // board_info_temperature_fpga_s1_translator:uav_waitrequest -> board_info_temperature_fpga_s1_agent:m0_waitrequest
	wire          board_info_temperature_fpga_s1_agent_m0_debugaccess;                              // board_info_temperature_fpga_s1_agent:m0_debugaccess -> board_info_temperature_fpga_s1_translator:uav_debugaccess
	wire   [20:0] board_info_temperature_fpga_s1_agent_m0_address;                                  // board_info_temperature_fpga_s1_agent:m0_address -> board_info_temperature_fpga_s1_translator:uav_address
	wire    [3:0] board_info_temperature_fpga_s1_agent_m0_byteenable;                               // board_info_temperature_fpga_s1_agent:m0_byteenable -> board_info_temperature_fpga_s1_translator:uav_byteenable
	wire          board_info_temperature_fpga_s1_agent_m0_read;                                     // board_info_temperature_fpga_s1_agent:m0_read -> board_info_temperature_fpga_s1_translator:uav_read
	wire          board_info_temperature_fpga_s1_agent_m0_readdatavalid;                            // board_info_temperature_fpga_s1_translator:uav_readdatavalid -> board_info_temperature_fpga_s1_agent:m0_readdatavalid
	wire          board_info_temperature_fpga_s1_agent_m0_lock;                                     // board_info_temperature_fpga_s1_agent:m0_lock -> board_info_temperature_fpga_s1_translator:uav_lock
	wire   [31:0] board_info_temperature_fpga_s1_agent_m0_writedata;                                // board_info_temperature_fpga_s1_agent:m0_writedata -> board_info_temperature_fpga_s1_translator:uav_writedata
	wire          board_info_temperature_fpga_s1_agent_m0_write;                                    // board_info_temperature_fpga_s1_agent:m0_write -> board_info_temperature_fpga_s1_translator:uav_write
	wire    [2:0] board_info_temperature_fpga_s1_agent_m0_burstcount;                               // board_info_temperature_fpga_s1_agent:m0_burstcount -> board_info_temperature_fpga_s1_translator:uav_burstcount
	wire          board_info_temperature_fpga_s1_agent_rf_source_valid;                             // board_info_temperature_fpga_s1_agent:rf_source_valid -> board_info_temperature_fpga_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_temperature_fpga_s1_agent_rf_source_data;                              // board_info_temperature_fpga_s1_agent:rf_source_data -> board_info_temperature_fpga_s1_agent_rsp_fifo:in_data
	wire          board_info_temperature_fpga_s1_agent_rf_source_ready;                             // board_info_temperature_fpga_s1_agent_rsp_fifo:in_ready -> board_info_temperature_fpga_s1_agent:rf_source_ready
	wire          board_info_temperature_fpga_s1_agent_rf_source_startofpacket;                     // board_info_temperature_fpga_s1_agent:rf_source_startofpacket -> board_info_temperature_fpga_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_temperature_fpga_s1_agent_rf_source_endofpacket;                       // board_info_temperature_fpga_s1_agent:rf_source_endofpacket -> board_info_temperature_fpga_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_temperature_fpga_s1_agent_rsp_fifo_out_valid;                          // board_info_temperature_fpga_s1_agent_rsp_fifo:out_valid -> board_info_temperature_fpga_s1_agent:rf_sink_valid
	wire  [123:0] board_info_temperature_fpga_s1_agent_rsp_fifo_out_data;                           // board_info_temperature_fpga_s1_agent_rsp_fifo:out_data -> board_info_temperature_fpga_s1_agent:rf_sink_data
	wire          board_info_temperature_fpga_s1_agent_rsp_fifo_out_ready;                          // board_info_temperature_fpga_s1_agent:rf_sink_ready -> board_info_temperature_fpga_s1_agent_rsp_fifo:out_ready
	wire          board_info_temperature_fpga_s1_agent_rsp_fifo_out_startofpacket;                  // board_info_temperature_fpga_s1_agent_rsp_fifo:out_startofpacket -> board_info_temperature_fpga_s1_agent:rf_sink_startofpacket
	wire          board_info_temperature_fpga_s1_agent_rsp_fifo_out_endofpacket;                    // board_info_temperature_fpga_s1_agent_rsp_fifo:out_endofpacket -> board_info_temperature_fpga_s1_agent:rf_sink_endofpacket
	wire          board_info_temperature_fpga_s1_agent_rdata_fifo_src_valid;                        // board_info_temperature_fpga_s1_agent:rdata_fifo_src_valid -> board_info_temperature_fpga_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_temperature_fpga_s1_agent_rdata_fifo_src_data;                         // board_info_temperature_fpga_s1_agent:rdata_fifo_src_data -> board_info_temperature_fpga_s1_agent:rdata_fifo_sink_data
	wire          board_info_temperature_fpga_s1_agent_rdata_fifo_src_ready;                        // board_info_temperature_fpga_s1_agent:rdata_fifo_sink_ready -> board_info_temperature_fpga_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_004_src_valid;                                                            // cmd_mux_004:src_valid -> board_info_temperature_fpga_s1_agent:cp_valid
	wire  [122:0] cmd_mux_004_src_data;                                                             // cmd_mux_004:src_data -> board_info_temperature_fpga_s1_agent:cp_data
	wire          cmd_mux_004_src_ready;                                                            // board_info_temperature_fpga_s1_agent:cp_ready -> cmd_mux_004:src_ready
	wire   [20:0] cmd_mux_004_src_channel;                                                          // cmd_mux_004:src_channel -> board_info_temperature_fpga_s1_agent:cp_channel
	wire          cmd_mux_004_src_startofpacket;                                                    // cmd_mux_004:src_startofpacket -> board_info_temperature_fpga_s1_agent:cp_startofpacket
	wire          cmd_mux_004_src_endofpacket;                                                      // cmd_mux_004:src_endofpacket -> board_info_temperature_fpga_s1_agent:cp_endofpacket
	wire   [31:0] board_info_temperature_board1_s1_agent_m0_readdata;                               // board_info_temperature_board1_s1_translator:uav_readdata -> board_info_temperature_board1_s1_agent:m0_readdata
	wire          board_info_temperature_board1_s1_agent_m0_waitrequest;                            // board_info_temperature_board1_s1_translator:uav_waitrequest -> board_info_temperature_board1_s1_agent:m0_waitrequest
	wire          board_info_temperature_board1_s1_agent_m0_debugaccess;                            // board_info_temperature_board1_s1_agent:m0_debugaccess -> board_info_temperature_board1_s1_translator:uav_debugaccess
	wire   [20:0] board_info_temperature_board1_s1_agent_m0_address;                                // board_info_temperature_board1_s1_agent:m0_address -> board_info_temperature_board1_s1_translator:uav_address
	wire    [3:0] board_info_temperature_board1_s1_agent_m0_byteenable;                             // board_info_temperature_board1_s1_agent:m0_byteenable -> board_info_temperature_board1_s1_translator:uav_byteenable
	wire          board_info_temperature_board1_s1_agent_m0_read;                                   // board_info_temperature_board1_s1_agent:m0_read -> board_info_temperature_board1_s1_translator:uav_read
	wire          board_info_temperature_board1_s1_agent_m0_readdatavalid;                          // board_info_temperature_board1_s1_translator:uav_readdatavalid -> board_info_temperature_board1_s1_agent:m0_readdatavalid
	wire          board_info_temperature_board1_s1_agent_m0_lock;                                   // board_info_temperature_board1_s1_agent:m0_lock -> board_info_temperature_board1_s1_translator:uav_lock
	wire   [31:0] board_info_temperature_board1_s1_agent_m0_writedata;                              // board_info_temperature_board1_s1_agent:m0_writedata -> board_info_temperature_board1_s1_translator:uav_writedata
	wire          board_info_temperature_board1_s1_agent_m0_write;                                  // board_info_temperature_board1_s1_agent:m0_write -> board_info_temperature_board1_s1_translator:uav_write
	wire    [2:0] board_info_temperature_board1_s1_agent_m0_burstcount;                             // board_info_temperature_board1_s1_agent:m0_burstcount -> board_info_temperature_board1_s1_translator:uav_burstcount
	wire          board_info_temperature_board1_s1_agent_rf_source_valid;                           // board_info_temperature_board1_s1_agent:rf_source_valid -> board_info_temperature_board1_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_temperature_board1_s1_agent_rf_source_data;                            // board_info_temperature_board1_s1_agent:rf_source_data -> board_info_temperature_board1_s1_agent_rsp_fifo:in_data
	wire          board_info_temperature_board1_s1_agent_rf_source_ready;                           // board_info_temperature_board1_s1_agent_rsp_fifo:in_ready -> board_info_temperature_board1_s1_agent:rf_source_ready
	wire          board_info_temperature_board1_s1_agent_rf_source_startofpacket;                   // board_info_temperature_board1_s1_agent:rf_source_startofpacket -> board_info_temperature_board1_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_temperature_board1_s1_agent_rf_source_endofpacket;                     // board_info_temperature_board1_s1_agent:rf_source_endofpacket -> board_info_temperature_board1_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_temperature_board1_s1_agent_rsp_fifo_out_valid;                        // board_info_temperature_board1_s1_agent_rsp_fifo:out_valid -> board_info_temperature_board1_s1_agent:rf_sink_valid
	wire  [123:0] board_info_temperature_board1_s1_agent_rsp_fifo_out_data;                         // board_info_temperature_board1_s1_agent_rsp_fifo:out_data -> board_info_temperature_board1_s1_agent:rf_sink_data
	wire          board_info_temperature_board1_s1_agent_rsp_fifo_out_ready;                        // board_info_temperature_board1_s1_agent:rf_sink_ready -> board_info_temperature_board1_s1_agent_rsp_fifo:out_ready
	wire          board_info_temperature_board1_s1_agent_rsp_fifo_out_startofpacket;                // board_info_temperature_board1_s1_agent_rsp_fifo:out_startofpacket -> board_info_temperature_board1_s1_agent:rf_sink_startofpacket
	wire          board_info_temperature_board1_s1_agent_rsp_fifo_out_endofpacket;                  // board_info_temperature_board1_s1_agent_rsp_fifo:out_endofpacket -> board_info_temperature_board1_s1_agent:rf_sink_endofpacket
	wire          board_info_temperature_board1_s1_agent_rdata_fifo_src_valid;                      // board_info_temperature_board1_s1_agent:rdata_fifo_src_valid -> board_info_temperature_board1_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_temperature_board1_s1_agent_rdata_fifo_src_data;                       // board_info_temperature_board1_s1_agent:rdata_fifo_src_data -> board_info_temperature_board1_s1_agent:rdata_fifo_sink_data
	wire          board_info_temperature_board1_s1_agent_rdata_fifo_src_ready;                      // board_info_temperature_board1_s1_agent:rdata_fifo_sink_ready -> board_info_temperature_board1_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_005_src_valid;                                                            // cmd_mux_005:src_valid -> board_info_temperature_board1_s1_agent:cp_valid
	wire  [122:0] cmd_mux_005_src_data;                                                             // cmd_mux_005:src_data -> board_info_temperature_board1_s1_agent:cp_data
	wire          cmd_mux_005_src_ready;                                                            // board_info_temperature_board1_s1_agent:cp_ready -> cmd_mux_005:src_ready
	wire   [20:0] cmd_mux_005_src_channel;                                                          // cmd_mux_005:src_channel -> board_info_temperature_board1_s1_agent:cp_channel
	wire          cmd_mux_005_src_startofpacket;                                                    // cmd_mux_005:src_startofpacket -> board_info_temperature_board1_s1_agent:cp_startofpacket
	wire          cmd_mux_005_src_endofpacket;                                                      // cmd_mux_005:src_endofpacket -> board_info_temperature_board1_s1_agent:cp_endofpacket
	wire   [31:0] board_info_fan_speed1_s1_agent_m0_readdata;                                       // board_info_fan_speed1_s1_translator:uav_readdata -> board_info_fan_speed1_s1_agent:m0_readdata
	wire          board_info_fan_speed1_s1_agent_m0_waitrequest;                                    // board_info_fan_speed1_s1_translator:uav_waitrequest -> board_info_fan_speed1_s1_agent:m0_waitrequest
	wire          board_info_fan_speed1_s1_agent_m0_debugaccess;                                    // board_info_fan_speed1_s1_agent:m0_debugaccess -> board_info_fan_speed1_s1_translator:uav_debugaccess
	wire   [20:0] board_info_fan_speed1_s1_agent_m0_address;                                        // board_info_fan_speed1_s1_agent:m0_address -> board_info_fan_speed1_s1_translator:uav_address
	wire    [3:0] board_info_fan_speed1_s1_agent_m0_byteenable;                                     // board_info_fan_speed1_s1_agent:m0_byteenable -> board_info_fan_speed1_s1_translator:uav_byteenable
	wire          board_info_fan_speed1_s1_agent_m0_read;                                           // board_info_fan_speed1_s1_agent:m0_read -> board_info_fan_speed1_s1_translator:uav_read
	wire          board_info_fan_speed1_s1_agent_m0_readdatavalid;                                  // board_info_fan_speed1_s1_translator:uav_readdatavalid -> board_info_fan_speed1_s1_agent:m0_readdatavalid
	wire          board_info_fan_speed1_s1_agent_m0_lock;                                           // board_info_fan_speed1_s1_agent:m0_lock -> board_info_fan_speed1_s1_translator:uav_lock
	wire   [31:0] board_info_fan_speed1_s1_agent_m0_writedata;                                      // board_info_fan_speed1_s1_agent:m0_writedata -> board_info_fan_speed1_s1_translator:uav_writedata
	wire          board_info_fan_speed1_s1_agent_m0_write;                                          // board_info_fan_speed1_s1_agent:m0_write -> board_info_fan_speed1_s1_translator:uav_write
	wire    [2:0] board_info_fan_speed1_s1_agent_m0_burstcount;                                     // board_info_fan_speed1_s1_agent:m0_burstcount -> board_info_fan_speed1_s1_translator:uav_burstcount
	wire          board_info_fan_speed1_s1_agent_rf_source_valid;                                   // board_info_fan_speed1_s1_agent:rf_source_valid -> board_info_fan_speed1_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_fan_speed1_s1_agent_rf_source_data;                                    // board_info_fan_speed1_s1_agent:rf_source_data -> board_info_fan_speed1_s1_agent_rsp_fifo:in_data
	wire          board_info_fan_speed1_s1_agent_rf_source_ready;                                   // board_info_fan_speed1_s1_agent_rsp_fifo:in_ready -> board_info_fan_speed1_s1_agent:rf_source_ready
	wire          board_info_fan_speed1_s1_agent_rf_source_startofpacket;                           // board_info_fan_speed1_s1_agent:rf_source_startofpacket -> board_info_fan_speed1_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_fan_speed1_s1_agent_rf_source_endofpacket;                             // board_info_fan_speed1_s1_agent:rf_source_endofpacket -> board_info_fan_speed1_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_fan_speed1_s1_agent_rsp_fifo_out_valid;                                // board_info_fan_speed1_s1_agent_rsp_fifo:out_valid -> board_info_fan_speed1_s1_agent:rf_sink_valid
	wire  [123:0] board_info_fan_speed1_s1_agent_rsp_fifo_out_data;                                 // board_info_fan_speed1_s1_agent_rsp_fifo:out_data -> board_info_fan_speed1_s1_agent:rf_sink_data
	wire          board_info_fan_speed1_s1_agent_rsp_fifo_out_ready;                                // board_info_fan_speed1_s1_agent:rf_sink_ready -> board_info_fan_speed1_s1_agent_rsp_fifo:out_ready
	wire          board_info_fan_speed1_s1_agent_rsp_fifo_out_startofpacket;                        // board_info_fan_speed1_s1_agent_rsp_fifo:out_startofpacket -> board_info_fan_speed1_s1_agent:rf_sink_startofpacket
	wire          board_info_fan_speed1_s1_agent_rsp_fifo_out_endofpacket;                          // board_info_fan_speed1_s1_agent_rsp_fifo:out_endofpacket -> board_info_fan_speed1_s1_agent:rf_sink_endofpacket
	wire          board_info_fan_speed1_s1_agent_rdata_fifo_src_valid;                              // board_info_fan_speed1_s1_agent:rdata_fifo_src_valid -> board_info_fan_speed1_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_fan_speed1_s1_agent_rdata_fifo_src_data;                               // board_info_fan_speed1_s1_agent:rdata_fifo_src_data -> board_info_fan_speed1_s1_agent:rdata_fifo_sink_data
	wire          board_info_fan_speed1_s1_agent_rdata_fifo_src_ready;                              // board_info_fan_speed1_s1_agent:rdata_fifo_sink_ready -> board_info_fan_speed1_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_006_src_valid;                                                            // cmd_mux_006:src_valid -> board_info_fan_speed1_s1_agent:cp_valid
	wire  [122:0] cmd_mux_006_src_data;                                                             // cmd_mux_006:src_data -> board_info_fan_speed1_s1_agent:cp_data
	wire          cmd_mux_006_src_ready;                                                            // board_info_fan_speed1_s1_agent:cp_ready -> cmd_mux_006:src_ready
	wire   [20:0] cmd_mux_006_src_channel;                                                          // cmd_mux_006:src_channel -> board_info_fan_speed1_s1_agent:cp_channel
	wire          cmd_mux_006_src_startofpacket;                                                    // cmd_mux_006:src_startofpacket -> board_info_fan_speed1_s1_agent:cp_startofpacket
	wire          cmd_mux_006_src_endofpacket;                                                      // cmd_mux_006:src_endofpacket -> board_info_fan_speed1_s1_agent:cp_endofpacket
	wire   [31:0] board_info_fan_speed2_s1_agent_m0_readdata;                                       // board_info_fan_speed2_s1_translator:uav_readdata -> board_info_fan_speed2_s1_agent:m0_readdata
	wire          board_info_fan_speed2_s1_agent_m0_waitrequest;                                    // board_info_fan_speed2_s1_translator:uav_waitrequest -> board_info_fan_speed2_s1_agent:m0_waitrequest
	wire          board_info_fan_speed2_s1_agent_m0_debugaccess;                                    // board_info_fan_speed2_s1_agent:m0_debugaccess -> board_info_fan_speed2_s1_translator:uav_debugaccess
	wire   [20:0] board_info_fan_speed2_s1_agent_m0_address;                                        // board_info_fan_speed2_s1_agent:m0_address -> board_info_fan_speed2_s1_translator:uav_address
	wire    [3:0] board_info_fan_speed2_s1_agent_m0_byteenable;                                     // board_info_fan_speed2_s1_agent:m0_byteenable -> board_info_fan_speed2_s1_translator:uav_byteenable
	wire          board_info_fan_speed2_s1_agent_m0_read;                                           // board_info_fan_speed2_s1_agent:m0_read -> board_info_fan_speed2_s1_translator:uav_read
	wire          board_info_fan_speed2_s1_agent_m0_readdatavalid;                                  // board_info_fan_speed2_s1_translator:uav_readdatavalid -> board_info_fan_speed2_s1_agent:m0_readdatavalid
	wire          board_info_fan_speed2_s1_agent_m0_lock;                                           // board_info_fan_speed2_s1_agent:m0_lock -> board_info_fan_speed2_s1_translator:uav_lock
	wire   [31:0] board_info_fan_speed2_s1_agent_m0_writedata;                                      // board_info_fan_speed2_s1_agent:m0_writedata -> board_info_fan_speed2_s1_translator:uav_writedata
	wire          board_info_fan_speed2_s1_agent_m0_write;                                          // board_info_fan_speed2_s1_agent:m0_write -> board_info_fan_speed2_s1_translator:uav_write
	wire    [2:0] board_info_fan_speed2_s1_agent_m0_burstcount;                                     // board_info_fan_speed2_s1_agent:m0_burstcount -> board_info_fan_speed2_s1_translator:uav_burstcount
	wire          board_info_fan_speed2_s1_agent_rf_source_valid;                                   // board_info_fan_speed2_s1_agent:rf_source_valid -> board_info_fan_speed2_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_fan_speed2_s1_agent_rf_source_data;                                    // board_info_fan_speed2_s1_agent:rf_source_data -> board_info_fan_speed2_s1_agent_rsp_fifo:in_data
	wire          board_info_fan_speed2_s1_agent_rf_source_ready;                                   // board_info_fan_speed2_s1_agent_rsp_fifo:in_ready -> board_info_fan_speed2_s1_agent:rf_source_ready
	wire          board_info_fan_speed2_s1_agent_rf_source_startofpacket;                           // board_info_fan_speed2_s1_agent:rf_source_startofpacket -> board_info_fan_speed2_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_fan_speed2_s1_agent_rf_source_endofpacket;                             // board_info_fan_speed2_s1_agent:rf_source_endofpacket -> board_info_fan_speed2_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_fan_speed2_s1_agent_rsp_fifo_out_valid;                                // board_info_fan_speed2_s1_agent_rsp_fifo:out_valid -> board_info_fan_speed2_s1_agent:rf_sink_valid
	wire  [123:0] board_info_fan_speed2_s1_agent_rsp_fifo_out_data;                                 // board_info_fan_speed2_s1_agent_rsp_fifo:out_data -> board_info_fan_speed2_s1_agent:rf_sink_data
	wire          board_info_fan_speed2_s1_agent_rsp_fifo_out_ready;                                // board_info_fan_speed2_s1_agent:rf_sink_ready -> board_info_fan_speed2_s1_agent_rsp_fifo:out_ready
	wire          board_info_fan_speed2_s1_agent_rsp_fifo_out_startofpacket;                        // board_info_fan_speed2_s1_agent_rsp_fifo:out_startofpacket -> board_info_fan_speed2_s1_agent:rf_sink_startofpacket
	wire          board_info_fan_speed2_s1_agent_rsp_fifo_out_endofpacket;                          // board_info_fan_speed2_s1_agent_rsp_fifo:out_endofpacket -> board_info_fan_speed2_s1_agent:rf_sink_endofpacket
	wire          board_info_fan_speed2_s1_agent_rdata_fifo_src_valid;                              // board_info_fan_speed2_s1_agent:rdata_fifo_src_valid -> board_info_fan_speed2_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_fan_speed2_s1_agent_rdata_fifo_src_data;                               // board_info_fan_speed2_s1_agent:rdata_fifo_src_data -> board_info_fan_speed2_s1_agent:rdata_fifo_sink_data
	wire          board_info_fan_speed2_s1_agent_rdata_fifo_src_ready;                              // board_info_fan_speed2_s1_agent:rdata_fifo_sink_ready -> board_info_fan_speed2_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_007_src_valid;                                                            // cmd_mux_007:src_valid -> board_info_fan_speed2_s1_agent:cp_valid
	wire  [122:0] cmd_mux_007_src_data;                                                             // cmd_mux_007:src_data -> board_info_fan_speed2_s1_agent:cp_data
	wire          cmd_mux_007_src_ready;                                                            // board_info_fan_speed2_s1_agent:cp_ready -> cmd_mux_007:src_ready
	wire   [20:0] cmd_mux_007_src_channel;                                                          // cmd_mux_007:src_channel -> board_info_fan_speed2_s1_agent:cp_channel
	wire          cmd_mux_007_src_startofpacket;                                                    // cmd_mux_007:src_startofpacket -> board_info_fan_speed2_s1_agent:cp_startofpacket
	wire          cmd_mux_007_src_endofpacket;                                                      // cmd_mux_007:src_endofpacket -> board_info_fan_speed2_s1_agent:cp_endofpacket
	wire   [31:0] board_info_core_current_s1_agent_m0_readdata;                                     // board_info_core_current_s1_translator:uav_readdata -> board_info_core_current_s1_agent:m0_readdata
	wire          board_info_core_current_s1_agent_m0_waitrequest;                                  // board_info_core_current_s1_translator:uav_waitrequest -> board_info_core_current_s1_agent:m0_waitrequest
	wire          board_info_core_current_s1_agent_m0_debugaccess;                                  // board_info_core_current_s1_agent:m0_debugaccess -> board_info_core_current_s1_translator:uav_debugaccess
	wire   [20:0] board_info_core_current_s1_agent_m0_address;                                      // board_info_core_current_s1_agent:m0_address -> board_info_core_current_s1_translator:uav_address
	wire    [3:0] board_info_core_current_s1_agent_m0_byteenable;                                   // board_info_core_current_s1_agent:m0_byteenable -> board_info_core_current_s1_translator:uav_byteenable
	wire          board_info_core_current_s1_agent_m0_read;                                         // board_info_core_current_s1_agent:m0_read -> board_info_core_current_s1_translator:uav_read
	wire          board_info_core_current_s1_agent_m0_readdatavalid;                                // board_info_core_current_s1_translator:uav_readdatavalid -> board_info_core_current_s1_agent:m0_readdatavalid
	wire          board_info_core_current_s1_agent_m0_lock;                                         // board_info_core_current_s1_agent:m0_lock -> board_info_core_current_s1_translator:uav_lock
	wire   [31:0] board_info_core_current_s1_agent_m0_writedata;                                    // board_info_core_current_s1_agent:m0_writedata -> board_info_core_current_s1_translator:uav_writedata
	wire          board_info_core_current_s1_agent_m0_write;                                        // board_info_core_current_s1_agent:m0_write -> board_info_core_current_s1_translator:uav_write
	wire    [2:0] board_info_core_current_s1_agent_m0_burstcount;                                   // board_info_core_current_s1_agent:m0_burstcount -> board_info_core_current_s1_translator:uav_burstcount
	wire          board_info_core_current_s1_agent_rf_source_valid;                                 // board_info_core_current_s1_agent:rf_source_valid -> board_info_core_current_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_core_current_s1_agent_rf_source_data;                                  // board_info_core_current_s1_agent:rf_source_data -> board_info_core_current_s1_agent_rsp_fifo:in_data
	wire          board_info_core_current_s1_agent_rf_source_ready;                                 // board_info_core_current_s1_agent_rsp_fifo:in_ready -> board_info_core_current_s1_agent:rf_source_ready
	wire          board_info_core_current_s1_agent_rf_source_startofpacket;                         // board_info_core_current_s1_agent:rf_source_startofpacket -> board_info_core_current_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_core_current_s1_agent_rf_source_endofpacket;                           // board_info_core_current_s1_agent:rf_source_endofpacket -> board_info_core_current_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_core_current_s1_agent_rsp_fifo_out_valid;                              // board_info_core_current_s1_agent_rsp_fifo:out_valid -> board_info_core_current_s1_agent:rf_sink_valid
	wire  [123:0] board_info_core_current_s1_agent_rsp_fifo_out_data;                               // board_info_core_current_s1_agent_rsp_fifo:out_data -> board_info_core_current_s1_agent:rf_sink_data
	wire          board_info_core_current_s1_agent_rsp_fifo_out_ready;                              // board_info_core_current_s1_agent:rf_sink_ready -> board_info_core_current_s1_agent_rsp_fifo:out_ready
	wire          board_info_core_current_s1_agent_rsp_fifo_out_startofpacket;                      // board_info_core_current_s1_agent_rsp_fifo:out_startofpacket -> board_info_core_current_s1_agent:rf_sink_startofpacket
	wire          board_info_core_current_s1_agent_rsp_fifo_out_endofpacket;                        // board_info_core_current_s1_agent_rsp_fifo:out_endofpacket -> board_info_core_current_s1_agent:rf_sink_endofpacket
	wire          board_info_core_current_s1_agent_rdata_fifo_src_valid;                            // board_info_core_current_s1_agent:rdata_fifo_src_valid -> board_info_core_current_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_core_current_s1_agent_rdata_fifo_src_data;                             // board_info_core_current_s1_agent:rdata_fifo_src_data -> board_info_core_current_s1_agent:rdata_fifo_sink_data
	wire          board_info_core_current_s1_agent_rdata_fifo_src_ready;                            // board_info_core_current_s1_agent:rdata_fifo_sink_ready -> board_info_core_current_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_008_src_valid;                                                            // cmd_mux_008:src_valid -> board_info_core_current_s1_agent:cp_valid
	wire  [122:0] cmd_mux_008_src_data;                                                             // cmd_mux_008:src_data -> board_info_core_current_s1_agent:cp_data
	wire          cmd_mux_008_src_ready;                                                            // board_info_core_current_s1_agent:cp_ready -> cmd_mux_008:src_ready
	wire   [20:0] cmd_mux_008_src_channel;                                                          // cmd_mux_008:src_channel -> board_info_core_current_s1_agent:cp_channel
	wire          cmd_mux_008_src_startofpacket;                                                    // cmd_mux_008:src_startofpacket -> board_info_core_current_s1_agent:cp_startofpacket
	wire          cmd_mux_008_src_endofpacket;                                                      // cmd_mux_008:src_endofpacket -> board_info_core_current_s1_agent:cp_endofpacket
	wire   [31:0] board_info_core_voltage_s1_agent_m0_readdata;                                     // board_info_core_voltage_s1_translator:uav_readdata -> board_info_core_voltage_s1_agent:m0_readdata
	wire          board_info_core_voltage_s1_agent_m0_waitrequest;                                  // board_info_core_voltage_s1_translator:uav_waitrequest -> board_info_core_voltage_s1_agent:m0_waitrequest
	wire          board_info_core_voltage_s1_agent_m0_debugaccess;                                  // board_info_core_voltage_s1_agent:m0_debugaccess -> board_info_core_voltage_s1_translator:uav_debugaccess
	wire   [20:0] board_info_core_voltage_s1_agent_m0_address;                                      // board_info_core_voltage_s1_agent:m0_address -> board_info_core_voltage_s1_translator:uav_address
	wire    [3:0] board_info_core_voltage_s1_agent_m0_byteenable;                                   // board_info_core_voltage_s1_agent:m0_byteenable -> board_info_core_voltage_s1_translator:uav_byteenable
	wire          board_info_core_voltage_s1_agent_m0_read;                                         // board_info_core_voltage_s1_agent:m0_read -> board_info_core_voltage_s1_translator:uav_read
	wire          board_info_core_voltage_s1_agent_m0_readdatavalid;                                // board_info_core_voltage_s1_translator:uav_readdatavalid -> board_info_core_voltage_s1_agent:m0_readdatavalid
	wire          board_info_core_voltage_s1_agent_m0_lock;                                         // board_info_core_voltage_s1_agent:m0_lock -> board_info_core_voltage_s1_translator:uav_lock
	wire   [31:0] board_info_core_voltage_s1_agent_m0_writedata;                                    // board_info_core_voltage_s1_agent:m0_writedata -> board_info_core_voltage_s1_translator:uav_writedata
	wire          board_info_core_voltage_s1_agent_m0_write;                                        // board_info_core_voltage_s1_agent:m0_write -> board_info_core_voltage_s1_translator:uav_write
	wire    [2:0] board_info_core_voltage_s1_agent_m0_burstcount;                                   // board_info_core_voltage_s1_agent:m0_burstcount -> board_info_core_voltage_s1_translator:uav_burstcount
	wire          board_info_core_voltage_s1_agent_rf_source_valid;                                 // board_info_core_voltage_s1_agent:rf_source_valid -> board_info_core_voltage_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_core_voltage_s1_agent_rf_source_data;                                  // board_info_core_voltage_s1_agent:rf_source_data -> board_info_core_voltage_s1_agent_rsp_fifo:in_data
	wire          board_info_core_voltage_s1_agent_rf_source_ready;                                 // board_info_core_voltage_s1_agent_rsp_fifo:in_ready -> board_info_core_voltage_s1_agent:rf_source_ready
	wire          board_info_core_voltage_s1_agent_rf_source_startofpacket;                         // board_info_core_voltage_s1_agent:rf_source_startofpacket -> board_info_core_voltage_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_core_voltage_s1_agent_rf_source_endofpacket;                           // board_info_core_voltage_s1_agent:rf_source_endofpacket -> board_info_core_voltage_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_core_voltage_s1_agent_rsp_fifo_out_valid;                              // board_info_core_voltage_s1_agent_rsp_fifo:out_valid -> board_info_core_voltage_s1_agent:rf_sink_valid
	wire  [123:0] board_info_core_voltage_s1_agent_rsp_fifo_out_data;                               // board_info_core_voltage_s1_agent_rsp_fifo:out_data -> board_info_core_voltage_s1_agent:rf_sink_data
	wire          board_info_core_voltage_s1_agent_rsp_fifo_out_ready;                              // board_info_core_voltage_s1_agent:rf_sink_ready -> board_info_core_voltage_s1_agent_rsp_fifo:out_ready
	wire          board_info_core_voltage_s1_agent_rsp_fifo_out_startofpacket;                      // board_info_core_voltage_s1_agent_rsp_fifo:out_startofpacket -> board_info_core_voltage_s1_agent:rf_sink_startofpacket
	wire          board_info_core_voltage_s1_agent_rsp_fifo_out_endofpacket;                        // board_info_core_voltage_s1_agent_rsp_fifo:out_endofpacket -> board_info_core_voltage_s1_agent:rf_sink_endofpacket
	wire          board_info_core_voltage_s1_agent_rdata_fifo_src_valid;                            // board_info_core_voltage_s1_agent:rdata_fifo_src_valid -> board_info_core_voltage_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_core_voltage_s1_agent_rdata_fifo_src_data;                             // board_info_core_voltage_s1_agent:rdata_fifo_src_data -> board_info_core_voltage_s1_agent:rdata_fifo_sink_data
	wire          board_info_core_voltage_s1_agent_rdata_fifo_src_ready;                            // board_info_core_voltage_s1_agent:rdata_fifo_sink_ready -> board_info_core_voltage_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_009_src_valid;                                                            // cmd_mux_009:src_valid -> board_info_core_voltage_s1_agent:cp_valid
	wire  [122:0] cmd_mux_009_src_data;                                                             // cmd_mux_009:src_data -> board_info_core_voltage_s1_agent:cp_data
	wire          cmd_mux_009_src_ready;                                                            // board_info_core_voltage_s1_agent:cp_ready -> cmd_mux_009:src_ready
	wire   [20:0] cmd_mux_009_src_channel;                                                          // cmd_mux_009:src_channel -> board_info_core_voltage_s1_agent:cp_channel
	wire          cmd_mux_009_src_startofpacket;                                                    // cmd_mux_009:src_startofpacket -> board_info_core_voltage_s1_agent:cp_startofpacket
	wire          cmd_mux_009_src_endofpacket;                                                      // cmd_mux_009:src_endofpacket -> board_info_core_voltage_s1_agent:cp_endofpacket
	wire   [31:0] board_info_power_in_current_s1_agent_m0_readdata;                                 // board_info_power_in_current_s1_translator:uav_readdata -> board_info_power_in_current_s1_agent:m0_readdata
	wire          board_info_power_in_current_s1_agent_m0_waitrequest;                              // board_info_power_in_current_s1_translator:uav_waitrequest -> board_info_power_in_current_s1_agent:m0_waitrequest
	wire          board_info_power_in_current_s1_agent_m0_debugaccess;                              // board_info_power_in_current_s1_agent:m0_debugaccess -> board_info_power_in_current_s1_translator:uav_debugaccess
	wire   [20:0] board_info_power_in_current_s1_agent_m0_address;                                  // board_info_power_in_current_s1_agent:m0_address -> board_info_power_in_current_s1_translator:uav_address
	wire    [3:0] board_info_power_in_current_s1_agent_m0_byteenable;                               // board_info_power_in_current_s1_agent:m0_byteenable -> board_info_power_in_current_s1_translator:uav_byteenable
	wire          board_info_power_in_current_s1_agent_m0_read;                                     // board_info_power_in_current_s1_agent:m0_read -> board_info_power_in_current_s1_translator:uav_read
	wire          board_info_power_in_current_s1_agent_m0_readdatavalid;                            // board_info_power_in_current_s1_translator:uav_readdatavalid -> board_info_power_in_current_s1_agent:m0_readdatavalid
	wire          board_info_power_in_current_s1_agent_m0_lock;                                     // board_info_power_in_current_s1_agent:m0_lock -> board_info_power_in_current_s1_translator:uav_lock
	wire   [31:0] board_info_power_in_current_s1_agent_m0_writedata;                                // board_info_power_in_current_s1_agent:m0_writedata -> board_info_power_in_current_s1_translator:uav_writedata
	wire          board_info_power_in_current_s1_agent_m0_write;                                    // board_info_power_in_current_s1_agent:m0_write -> board_info_power_in_current_s1_translator:uav_write
	wire    [2:0] board_info_power_in_current_s1_agent_m0_burstcount;                               // board_info_power_in_current_s1_agent:m0_burstcount -> board_info_power_in_current_s1_translator:uav_burstcount
	wire          board_info_power_in_current_s1_agent_rf_source_valid;                             // board_info_power_in_current_s1_agent:rf_source_valid -> board_info_power_in_current_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_power_in_current_s1_agent_rf_source_data;                              // board_info_power_in_current_s1_agent:rf_source_data -> board_info_power_in_current_s1_agent_rsp_fifo:in_data
	wire          board_info_power_in_current_s1_agent_rf_source_ready;                             // board_info_power_in_current_s1_agent_rsp_fifo:in_ready -> board_info_power_in_current_s1_agent:rf_source_ready
	wire          board_info_power_in_current_s1_agent_rf_source_startofpacket;                     // board_info_power_in_current_s1_agent:rf_source_startofpacket -> board_info_power_in_current_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_power_in_current_s1_agent_rf_source_endofpacket;                       // board_info_power_in_current_s1_agent:rf_source_endofpacket -> board_info_power_in_current_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_power_in_current_s1_agent_rsp_fifo_out_valid;                          // board_info_power_in_current_s1_agent_rsp_fifo:out_valid -> board_info_power_in_current_s1_agent:rf_sink_valid
	wire  [123:0] board_info_power_in_current_s1_agent_rsp_fifo_out_data;                           // board_info_power_in_current_s1_agent_rsp_fifo:out_data -> board_info_power_in_current_s1_agent:rf_sink_data
	wire          board_info_power_in_current_s1_agent_rsp_fifo_out_ready;                          // board_info_power_in_current_s1_agent:rf_sink_ready -> board_info_power_in_current_s1_agent_rsp_fifo:out_ready
	wire          board_info_power_in_current_s1_agent_rsp_fifo_out_startofpacket;                  // board_info_power_in_current_s1_agent_rsp_fifo:out_startofpacket -> board_info_power_in_current_s1_agent:rf_sink_startofpacket
	wire          board_info_power_in_current_s1_agent_rsp_fifo_out_endofpacket;                    // board_info_power_in_current_s1_agent_rsp_fifo:out_endofpacket -> board_info_power_in_current_s1_agent:rf_sink_endofpacket
	wire          board_info_power_in_current_s1_agent_rdata_fifo_src_valid;                        // board_info_power_in_current_s1_agent:rdata_fifo_src_valid -> board_info_power_in_current_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_power_in_current_s1_agent_rdata_fifo_src_data;                         // board_info_power_in_current_s1_agent:rdata_fifo_src_data -> board_info_power_in_current_s1_agent:rdata_fifo_sink_data
	wire          board_info_power_in_current_s1_agent_rdata_fifo_src_ready;                        // board_info_power_in_current_s1_agent:rdata_fifo_sink_ready -> board_info_power_in_current_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_010_src_valid;                                                            // cmd_mux_010:src_valid -> board_info_power_in_current_s1_agent:cp_valid
	wire  [122:0] cmd_mux_010_src_data;                                                             // cmd_mux_010:src_data -> board_info_power_in_current_s1_agent:cp_data
	wire          cmd_mux_010_src_ready;                                                            // board_info_power_in_current_s1_agent:cp_ready -> cmd_mux_010:src_ready
	wire   [20:0] cmd_mux_010_src_channel;                                                          // cmd_mux_010:src_channel -> board_info_power_in_current_s1_agent:cp_channel
	wire          cmd_mux_010_src_startofpacket;                                                    // cmd_mux_010:src_startofpacket -> board_info_power_in_current_s1_agent:cp_startofpacket
	wire          cmd_mux_010_src_endofpacket;                                                      // cmd_mux_010:src_endofpacket -> board_info_power_in_current_s1_agent:cp_endofpacket
	wire   [31:0] board_info_power_in_voltage_s1_agent_m0_readdata;                                 // board_info_power_in_voltage_s1_translator:uav_readdata -> board_info_power_in_voltage_s1_agent:m0_readdata
	wire          board_info_power_in_voltage_s1_agent_m0_waitrequest;                              // board_info_power_in_voltage_s1_translator:uav_waitrequest -> board_info_power_in_voltage_s1_agent:m0_waitrequest
	wire          board_info_power_in_voltage_s1_agent_m0_debugaccess;                              // board_info_power_in_voltage_s1_agent:m0_debugaccess -> board_info_power_in_voltage_s1_translator:uav_debugaccess
	wire   [20:0] board_info_power_in_voltage_s1_agent_m0_address;                                  // board_info_power_in_voltage_s1_agent:m0_address -> board_info_power_in_voltage_s1_translator:uav_address
	wire    [3:0] board_info_power_in_voltage_s1_agent_m0_byteenable;                               // board_info_power_in_voltage_s1_agent:m0_byteenable -> board_info_power_in_voltage_s1_translator:uav_byteenable
	wire          board_info_power_in_voltage_s1_agent_m0_read;                                     // board_info_power_in_voltage_s1_agent:m0_read -> board_info_power_in_voltage_s1_translator:uav_read
	wire          board_info_power_in_voltage_s1_agent_m0_readdatavalid;                            // board_info_power_in_voltage_s1_translator:uav_readdatavalid -> board_info_power_in_voltage_s1_agent:m0_readdatavalid
	wire          board_info_power_in_voltage_s1_agent_m0_lock;                                     // board_info_power_in_voltage_s1_agent:m0_lock -> board_info_power_in_voltage_s1_translator:uav_lock
	wire   [31:0] board_info_power_in_voltage_s1_agent_m0_writedata;                                // board_info_power_in_voltage_s1_agent:m0_writedata -> board_info_power_in_voltage_s1_translator:uav_writedata
	wire          board_info_power_in_voltage_s1_agent_m0_write;                                    // board_info_power_in_voltage_s1_agent:m0_write -> board_info_power_in_voltage_s1_translator:uav_write
	wire    [2:0] board_info_power_in_voltage_s1_agent_m0_burstcount;                               // board_info_power_in_voltage_s1_agent:m0_burstcount -> board_info_power_in_voltage_s1_translator:uav_burstcount
	wire          board_info_power_in_voltage_s1_agent_rf_source_valid;                             // board_info_power_in_voltage_s1_agent:rf_source_valid -> board_info_power_in_voltage_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_power_in_voltage_s1_agent_rf_source_data;                              // board_info_power_in_voltage_s1_agent:rf_source_data -> board_info_power_in_voltage_s1_agent_rsp_fifo:in_data
	wire          board_info_power_in_voltage_s1_agent_rf_source_ready;                             // board_info_power_in_voltage_s1_agent_rsp_fifo:in_ready -> board_info_power_in_voltage_s1_agent:rf_source_ready
	wire          board_info_power_in_voltage_s1_agent_rf_source_startofpacket;                     // board_info_power_in_voltage_s1_agent:rf_source_startofpacket -> board_info_power_in_voltage_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_power_in_voltage_s1_agent_rf_source_endofpacket;                       // board_info_power_in_voltage_s1_agent:rf_source_endofpacket -> board_info_power_in_voltage_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_power_in_voltage_s1_agent_rsp_fifo_out_valid;                          // board_info_power_in_voltage_s1_agent_rsp_fifo:out_valid -> board_info_power_in_voltage_s1_agent:rf_sink_valid
	wire  [123:0] board_info_power_in_voltage_s1_agent_rsp_fifo_out_data;                           // board_info_power_in_voltage_s1_agent_rsp_fifo:out_data -> board_info_power_in_voltage_s1_agent:rf_sink_data
	wire          board_info_power_in_voltage_s1_agent_rsp_fifo_out_ready;                          // board_info_power_in_voltage_s1_agent:rf_sink_ready -> board_info_power_in_voltage_s1_agent_rsp_fifo:out_ready
	wire          board_info_power_in_voltage_s1_agent_rsp_fifo_out_startofpacket;                  // board_info_power_in_voltage_s1_agent_rsp_fifo:out_startofpacket -> board_info_power_in_voltage_s1_agent:rf_sink_startofpacket
	wire          board_info_power_in_voltage_s1_agent_rsp_fifo_out_endofpacket;                    // board_info_power_in_voltage_s1_agent_rsp_fifo:out_endofpacket -> board_info_power_in_voltage_s1_agent:rf_sink_endofpacket
	wire          board_info_power_in_voltage_s1_agent_rdata_fifo_src_valid;                        // board_info_power_in_voltage_s1_agent:rdata_fifo_src_valid -> board_info_power_in_voltage_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_power_in_voltage_s1_agent_rdata_fifo_src_data;                         // board_info_power_in_voltage_s1_agent:rdata_fifo_src_data -> board_info_power_in_voltage_s1_agent:rdata_fifo_sink_data
	wire          board_info_power_in_voltage_s1_agent_rdata_fifo_src_ready;                        // board_info_power_in_voltage_s1_agent:rdata_fifo_sink_ready -> board_info_power_in_voltage_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_011_src_valid;                                                            // cmd_mux_011:src_valid -> board_info_power_in_voltage_s1_agent:cp_valid
	wire  [122:0] cmd_mux_011_src_data;                                                             // cmd_mux_011:src_data -> board_info_power_in_voltage_s1_agent:cp_data
	wire          cmd_mux_011_src_ready;                                                            // board_info_power_in_voltage_s1_agent:cp_ready -> cmd_mux_011:src_ready
	wire   [20:0] cmd_mux_011_src_channel;                                                          // cmd_mux_011:src_channel -> board_info_power_in_voltage_s1_agent:cp_channel
	wire          cmd_mux_011_src_startofpacket;                                                    // cmd_mux_011:src_startofpacket -> board_info_power_in_voltage_s1_agent:cp_startofpacket
	wire          cmd_mux_011_src_endofpacket;                                                      // cmd_mux_011:src_endofpacket -> board_info_power_in_voltage_s1_agent:cp_endofpacket
	wire   [31:0] board_info_pin_status_s1_agent_m0_readdata;                                       // board_info_pin_status_s1_translator:uav_readdata -> board_info_pin_status_s1_agent:m0_readdata
	wire          board_info_pin_status_s1_agent_m0_waitrequest;                                    // board_info_pin_status_s1_translator:uav_waitrequest -> board_info_pin_status_s1_agent:m0_waitrequest
	wire          board_info_pin_status_s1_agent_m0_debugaccess;                                    // board_info_pin_status_s1_agent:m0_debugaccess -> board_info_pin_status_s1_translator:uav_debugaccess
	wire   [20:0] board_info_pin_status_s1_agent_m0_address;                                        // board_info_pin_status_s1_agent:m0_address -> board_info_pin_status_s1_translator:uav_address
	wire    [3:0] board_info_pin_status_s1_agent_m0_byteenable;                                     // board_info_pin_status_s1_agent:m0_byteenable -> board_info_pin_status_s1_translator:uav_byteenable
	wire          board_info_pin_status_s1_agent_m0_read;                                           // board_info_pin_status_s1_agent:m0_read -> board_info_pin_status_s1_translator:uav_read
	wire          board_info_pin_status_s1_agent_m0_readdatavalid;                                  // board_info_pin_status_s1_translator:uav_readdatavalid -> board_info_pin_status_s1_agent:m0_readdatavalid
	wire          board_info_pin_status_s1_agent_m0_lock;                                           // board_info_pin_status_s1_agent:m0_lock -> board_info_pin_status_s1_translator:uav_lock
	wire   [31:0] board_info_pin_status_s1_agent_m0_writedata;                                      // board_info_pin_status_s1_agent:m0_writedata -> board_info_pin_status_s1_translator:uav_writedata
	wire          board_info_pin_status_s1_agent_m0_write;                                          // board_info_pin_status_s1_agent:m0_write -> board_info_pin_status_s1_translator:uav_write
	wire    [2:0] board_info_pin_status_s1_agent_m0_burstcount;                                     // board_info_pin_status_s1_agent:m0_burstcount -> board_info_pin_status_s1_translator:uav_burstcount
	wire          board_info_pin_status_s1_agent_rf_source_valid;                                   // board_info_pin_status_s1_agent:rf_source_valid -> board_info_pin_status_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_pin_status_s1_agent_rf_source_data;                                    // board_info_pin_status_s1_agent:rf_source_data -> board_info_pin_status_s1_agent_rsp_fifo:in_data
	wire          board_info_pin_status_s1_agent_rf_source_ready;                                   // board_info_pin_status_s1_agent_rsp_fifo:in_ready -> board_info_pin_status_s1_agent:rf_source_ready
	wire          board_info_pin_status_s1_agent_rf_source_startofpacket;                           // board_info_pin_status_s1_agent:rf_source_startofpacket -> board_info_pin_status_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_pin_status_s1_agent_rf_source_endofpacket;                             // board_info_pin_status_s1_agent:rf_source_endofpacket -> board_info_pin_status_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_pin_status_s1_agent_rsp_fifo_out_valid;                                // board_info_pin_status_s1_agent_rsp_fifo:out_valid -> board_info_pin_status_s1_agent:rf_sink_valid
	wire  [123:0] board_info_pin_status_s1_agent_rsp_fifo_out_data;                                 // board_info_pin_status_s1_agent_rsp_fifo:out_data -> board_info_pin_status_s1_agent:rf_sink_data
	wire          board_info_pin_status_s1_agent_rsp_fifo_out_ready;                                // board_info_pin_status_s1_agent:rf_sink_ready -> board_info_pin_status_s1_agent_rsp_fifo:out_ready
	wire          board_info_pin_status_s1_agent_rsp_fifo_out_startofpacket;                        // board_info_pin_status_s1_agent_rsp_fifo:out_startofpacket -> board_info_pin_status_s1_agent:rf_sink_startofpacket
	wire          board_info_pin_status_s1_agent_rsp_fifo_out_endofpacket;                          // board_info_pin_status_s1_agent_rsp_fifo:out_endofpacket -> board_info_pin_status_s1_agent:rf_sink_endofpacket
	wire          board_info_pin_status_s1_agent_rdata_fifo_src_valid;                              // board_info_pin_status_s1_agent:rdata_fifo_src_valid -> board_info_pin_status_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_pin_status_s1_agent_rdata_fifo_src_data;                               // board_info_pin_status_s1_agent:rdata_fifo_src_data -> board_info_pin_status_s1_agent:rdata_fifo_sink_data
	wire          board_info_pin_status_s1_agent_rdata_fifo_src_ready;                              // board_info_pin_status_s1_agent:rdata_fifo_sink_ready -> board_info_pin_status_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_012_src_valid;                                                            // cmd_mux_012:src_valid -> board_info_pin_status_s1_agent:cp_valid
	wire  [122:0] cmd_mux_012_src_data;                                                             // cmd_mux_012:src_data -> board_info_pin_status_s1_agent:cp_data
	wire          cmd_mux_012_src_ready;                                                            // board_info_pin_status_s1_agent:cp_ready -> cmd_mux_012:src_ready
	wire   [20:0] cmd_mux_012_src_channel;                                                          // cmd_mux_012:src_channel -> board_info_pin_status_s1_agent:cp_channel
	wire          cmd_mux_012_src_startofpacket;                                                    // cmd_mux_012:src_startofpacket -> board_info_pin_status_s1_agent:cp_startofpacket
	wire          cmd_mux_012_src_endofpacket;                                                      // cmd_mux_012:src_endofpacket -> board_info_pin_status_s1_agent:cp_endofpacket
	wire   [31:0] board_info_temperature_sdm_s1_agent_m0_readdata;                                  // board_info_temperature_sdm_s1_translator:uav_readdata -> board_info_temperature_sdm_s1_agent:m0_readdata
	wire          board_info_temperature_sdm_s1_agent_m0_waitrequest;                               // board_info_temperature_sdm_s1_translator:uav_waitrequest -> board_info_temperature_sdm_s1_agent:m0_waitrequest
	wire          board_info_temperature_sdm_s1_agent_m0_debugaccess;                               // board_info_temperature_sdm_s1_agent:m0_debugaccess -> board_info_temperature_sdm_s1_translator:uav_debugaccess
	wire   [20:0] board_info_temperature_sdm_s1_agent_m0_address;                                   // board_info_temperature_sdm_s1_agent:m0_address -> board_info_temperature_sdm_s1_translator:uav_address
	wire    [3:0] board_info_temperature_sdm_s1_agent_m0_byteenable;                                // board_info_temperature_sdm_s1_agent:m0_byteenable -> board_info_temperature_sdm_s1_translator:uav_byteenable
	wire          board_info_temperature_sdm_s1_agent_m0_read;                                      // board_info_temperature_sdm_s1_agent:m0_read -> board_info_temperature_sdm_s1_translator:uav_read
	wire          board_info_temperature_sdm_s1_agent_m0_readdatavalid;                             // board_info_temperature_sdm_s1_translator:uav_readdatavalid -> board_info_temperature_sdm_s1_agent:m0_readdatavalid
	wire          board_info_temperature_sdm_s1_agent_m0_lock;                                      // board_info_temperature_sdm_s1_agent:m0_lock -> board_info_temperature_sdm_s1_translator:uav_lock
	wire   [31:0] board_info_temperature_sdm_s1_agent_m0_writedata;                                 // board_info_temperature_sdm_s1_agent:m0_writedata -> board_info_temperature_sdm_s1_translator:uav_writedata
	wire          board_info_temperature_sdm_s1_agent_m0_write;                                     // board_info_temperature_sdm_s1_agent:m0_write -> board_info_temperature_sdm_s1_translator:uav_write
	wire    [2:0] board_info_temperature_sdm_s1_agent_m0_burstcount;                                // board_info_temperature_sdm_s1_agent:m0_burstcount -> board_info_temperature_sdm_s1_translator:uav_burstcount
	wire          board_info_temperature_sdm_s1_agent_rf_source_valid;                              // board_info_temperature_sdm_s1_agent:rf_source_valid -> board_info_temperature_sdm_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_temperature_sdm_s1_agent_rf_source_data;                               // board_info_temperature_sdm_s1_agent:rf_source_data -> board_info_temperature_sdm_s1_agent_rsp_fifo:in_data
	wire          board_info_temperature_sdm_s1_agent_rf_source_ready;                              // board_info_temperature_sdm_s1_agent_rsp_fifo:in_ready -> board_info_temperature_sdm_s1_agent:rf_source_ready
	wire          board_info_temperature_sdm_s1_agent_rf_source_startofpacket;                      // board_info_temperature_sdm_s1_agent:rf_source_startofpacket -> board_info_temperature_sdm_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_temperature_sdm_s1_agent_rf_source_endofpacket;                        // board_info_temperature_sdm_s1_agent:rf_source_endofpacket -> board_info_temperature_sdm_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_temperature_sdm_s1_agent_rsp_fifo_out_valid;                           // board_info_temperature_sdm_s1_agent_rsp_fifo:out_valid -> board_info_temperature_sdm_s1_agent:rf_sink_valid
	wire  [123:0] board_info_temperature_sdm_s1_agent_rsp_fifo_out_data;                            // board_info_temperature_sdm_s1_agent_rsp_fifo:out_data -> board_info_temperature_sdm_s1_agent:rf_sink_data
	wire          board_info_temperature_sdm_s1_agent_rsp_fifo_out_ready;                           // board_info_temperature_sdm_s1_agent:rf_sink_ready -> board_info_temperature_sdm_s1_agent_rsp_fifo:out_ready
	wire          board_info_temperature_sdm_s1_agent_rsp_fifo_out_startofpacket;                   // board_info_temperature_sdm_s1_agent_rsp_fifo:out_startofpacket -> board_info_temperature_sdm_s1_agent:rf_sink_startofpacket
	wire          board_info_temperature_sdm_s1_agent_rsp_fifo_out_endofpacket;                     // board_info_temperature_sdm_s1_agent_rsp_fifo:out_endofpacket -> board_info_temperature_sdm_s1_agent:rf_sink_endofpacket
	wire          board_info_temperature_sdm_s1_agent_rdata_fifo_src_valid;                         // board_info_temperature_sdm_s1_agent:rdata_fifo_src_valid -> board_info_temperature_sdm_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_temperature_sdm_s1_agent_rdata_fifo_src_data;                          // board_info_temperature_sdm_s1_agent:rdata_fifo_src_data -> board_info_temperature_sdm_s1_agent:rdata_fifo_sink_data
	wire          board_info_temperature_sdm_s1_agent_rdata_fifo_src_ready;                         // board_info_temperature_sdm_s1_agent:rdata_fifo_sink_ready -> board_info_temperature_sdm_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_013_src_valid;                                                            // cmd_mux_013:src_valid -> board_info_temperature_sdm_s1_agent:cp_valid
	wire  [122:0] cmd_mux_013_src_data;                                                             // cmd_mux_013:src_data -> board_info_temperature_sdm_s1_agent:cp_data
	wire          cmd_mux_013_src_ready;                                                            // board_info_temperature_sdm_s1_agent:cp_ready -> cmd_mux_013:src_ready
	wire   [20:0] cmd_mux_013_src_channel;                                                          // cmd_mux_013:src_channel -> board_info_temperature_sdm_s1_agent:cp_channel
	wire          cmd_mux_013_src_startofpacket;                                                    // cmd_mux_013:src_startofpacket -> board_info_temperature_sdm_s1_agent:cp_startofpacket
	wire          cmd_mux_013_src_endofpacket;                                                      // cmd_mux_013:src_endofpacket -> board_info_temperature_sdm_s1_agent:cp_endofpacket
	wire   [31:0] board_info_temperature_xcvr1_s1_agent_m0_readdata;                                // board_info_temperature_xcvr1_s1_translator:uav_readdata -> board_info_temperature_xcvr1_s1_agent:m0_readdata
	wire          board_info_temperature_xcvr1_s1_agent_m0_waitrequest;                             // board_info_temperature_xcvr1_s1_translator:uav_waitrequest -> board_info_temperature_xcvr1_s1_agent:m0_waitrequest
	wire          board_info_temperature_xcvr1_s1_agent_m0_debugaccess;                             // board_info_temperature_xcvr1_s1_agent:m0_debugaccess -> board_info_temperature_xcvr1_s1_translator:uav_debugaccess
	wire   [20:0] board_info_temperature_xcvr1_s1_agent_m0_address;                                 // board_info_temperature_xcvr1_s1_agent:m0_address -> board_info_temperature_xcvr1_s1_translator:uav_address
	wire    [3:0] board_info_temperature_xcvr1_s1_agent_m0_byteenable;                              // board_info_temperature_xcvr1_s1_agent:m0_byteenable -> board_info_temperature_xcvr1_s1_translator:uav_byteenable
	wire          board_info_temperature_xcvr1_s1_agent_m0_read;                                    // board_info_temperature_xcvr1_s1_agent:m0_read -> board_info_temperature_xcvr1_s1_translator:uav_read
	wire          board_info_temperature_xcvr1_s1_agent_m0_readdatavalid;                           // board_info_temperature_xcvr1_s1_translator:uav_readdatavalid -> board_info_temperature_xcvr1_s1_agent:m0_readdatavalid
	wire          board_info_temperature_xcvr1_s1_agent_m0_lock;                                    // board_info_temperature_xcvr1_s1_agent:m0_lock -> board_info_temperature_xcvr1_s1_translator:uav_lock
	wire   [31:0] board_info_temperature_xcvr1_s1_agent_m0_writedata;                               // board_info_temperature_xcvr1_s1_agent:m0_writedata -> board_info_temperature_xcvr1_s1_translator:uav_writedata
	wire          board_info_temperature_xcvr1_s1_agent_m0_write;                                   // board_info_temperature_xcvr1_s1_agent:m0_write -> board_info_temperature_xcvr1_s1_translator:uav_write
	wire    [2:0] board_info_temperature_xcvr1_s1_agent_m0_burstcount;                              // board_info_temperature_xcvr1_s1_agent:m0_burstcount -> board_info_temperature_xcvr1_s1_translator:uav_burstcount
	wire          board_info_temperature_xcvr1_s1_agent_rf_source_valid;                            // board_info_temperature_xcvr1_s1_agent:rf_source_valid -> board_info_temperature_xcvr1_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_temperature_xcvr1_s1_agent_rf_source_data;                             // board_info_temperature_xcvr1_s1_agent:rf_source_data -> board_info_temperature_xcvr1_s1_agent_rsp_fifo:in_data
	wire          board_info_temperature_xcvr1_s1_agent_rf_source_ready;                            // board_info_temperature_xcvr1_s1_agent_rsp_fifo:in_ready -> board_info_temperature_xcvr1_s1_agent:rf_source_ready
	wire          board_info_temperature_xcvr1_s1_agent_rf_source_startofpacket;                    // board_info_temperature_xcvr1_s1_agent:rf_source_startofpacket -> board_info_temperature_xcvr1_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_temperature_xcvr1_s1_agent_rf_source_endofpacket;                      // board_info_temperature_xcvr1_s1_agent:rf_source_endofpacket -> board_info_temperature_xcvr1_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_valid;                         // board_info_temperature_xcvr1_s1_agent_rsp_fifo:out_valid -> board_info_temperature_xcvr1_s1_agent:rf_sink_valid
	wire  [123:0] board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_data;                          // board_info_temperature_xcvr1_s1_agent_rsp_fifo:out_data -> board_info_temperature_xcvr1_s1_agent:rf_sink_data
	wire          board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_ready;                         // board_info_temperature_xcvr1_s1_agent:rf_sink_ready -> board_info_temperature_xcvr1_s1_agent_rsp_fifo:out_ready
	wire          board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_startofpacket;                 // board_info_temperature_xcvr1_s1_agent_rsp_fifo:out_startofpacket -> board_info_temperature_xcvr1_s1_agent:rf_sink_startofpacket
	wire          board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_endofpacket;                   // board_info_temperature_xcvr1_s1_agent_rsp_fifo:out_endofpacket -> board_info_temperature_xcvr1_s1_agent:rf_sink_endofpacket
	wire          board_info_temperature_xcvr1_s1_agent_rdata_fifo_src_valid;                       // board_info_temperature_xcvr1_s1_agent:rdata_fifo_src_valid -> board_info_temperature_xcvr1_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_temperature_xcvr1_s1_agent_rdata_fifo_src_data;                        // board_info_temperature_xcvr1_s1_agent:rdata_fifo_src_data -> board_info_temperature_xcvr1_s1_agent:rdata_fifo_sink_data
	wire          board_info_temperature_xcvr1_s1_agent_rdata_fifo_src_ready;                       // board_info_temperature_xcvr1_s1_agent:rdata_fifo_sink_ready -> board_info_temperature_xcvr1_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_014_src_valid;                                                            // cmd_mux_014:src_valid -> board_info_temperature_xcvr1_s1_agent:cp_valid
	wire  [122:0] cmd_mux_014_src_data;                                                             // cmd_mux_014:src_data -> board_info_temperature_xcvr1_s1_agent:cp_data
	wire          cmd_mux_014_src_ready;                                                            // board_info_temperature_xcvr1_s1_agent:cp_ready -> cmd_mux_014:src_ready
	wire   [20:0] cmd_mux_014_src_channel;                                                          // cmd_mux_014:src_channel -> board_info_temperature_xcvr1_s1_agent:cp_channel
	wire          cmd_mux_014_src_startofpacket;                                                    // cmd_mux_014:src_startofpacket -> board_info_temperature_xcvr1_s1_agent:cp_startofpacket
	wire          cmd_mux_014_src_endofpacket;                                                      // cmd_mux_014:src_endofpacket -> board_info_temperature_xcvr1_s1_agent:cp_endofpacket
	wire   [31:0] board_info_temperature_board2_s1_agent_m0_readdata;                               // board_info_temperature_board2_s1_translator:uav_readdata -> board_info_temperature_board2_s1_agent:m0_readdata
	wire          board_info_temperature_board2_s1_agent_m0_waitrequest;                            // board_info_temperature_board2_s1_translator:uav_waitrequest -> board_info_temperature_board2_s1_agent:m0_waitrequest
	wire          board_info_temperature_board2_s1_agent_m0_debugaccess;                            // board_info_temperature_board2_s1_agent:m0_debugaccess -> board_info_temperature_board2_s1_translator:uav_debugaccess
	wire   [20:0] board_info_temperature_board2_s1_agent_m0_address;                                // board_info_temperature_board2_s1_agent:m0_address -> board_info_temperature_board2_s1_translator:uav_address
	wire    [3:0] board_info_temperature_board2_s1_agent_m0_byteenable;                             // board_info_temperature_board2_s1_agent:m0_byteenable -> board_info_temperature_board2_s1_translator:uav_byteenable
	wire          board_info_temperature_board2_s1_agent_m0_read;                                   // board_info_temperature_board2_s1_agent:m0_read -> board_info_temperature_board2_s1_translator:uav_read
	wire          board_info_temperature_board2_s1_agent_m0_readdatavalid;                          // board_info_temperature_board2_s1_translator:uav_readdatavalid -> board_info_temperature_board2_s1_agent:m0_readdatavalid
	wire          board_info_temperature_board2_s1_agent_m0_lock;                                   // board_info_temperature_board2_s1_agent:m0_lock -> board_info_temperature_board2_s1_translator:uav_lock
	wire   [31:0] board_info_temperature_board2_s1_agent_m0_writedata;                              // board_info_temperature_board2_s1_agent:m0_writedata -> board_info_temperature_board2_s1_translator:uav_writedata
	wire          board_info_temperature_board2_s1_agent_m0_write;                                  // board_info_temperature_board2_s1_agent:m0_write -> board_info_temperature_board2_s1_translator:uav_write
	wire    [2:0] board_info_temperature_board2_s1_agent_m0_burstcount;                             // board_info_temperature_board2_s1_agent:m0_burstcount -> board_info_temperature_board2_s1_translator:uav_burstcount
	wire          board_info_temperature_board2_s1_agent_rf_source_valid;                           // board_info_temperature_board2_s1_agent:rf_source_valid -> board_info_temperature_board2_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_temperature_board2_s1_agent_rf_source_data;                            // board_info_temperature_board2_s1_agent:rf_source_data -> board_info_temperature_board2_s1_agent_rsp_fifo:in_data
	wire          board_info_temperature_board2_s1_agent_rf_source_ready;                           // board_info_temperature_board2_s1_agent_rsp_fifo:in_ready -> board_info_temperature_board2_s1_agent:rf_source_ready
	wire          board_info_temperature_board2_s1_agent_rf_source_startofpacket;                   // board_info_temperature_board2_s1_agent:rf_source_startofpacket -> board_info_temperature_board2_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_temperature_board2_s1_agent_rf_source_endofpacket;                     // board_info_temperature_board2_s1_agent:rf_source_endofpacket -> board_info_temperature_board2_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_temperature_board2_s1_agent_rsp_fifo_out_valid;                        // board_info_temperature_board2_s1_agent_rsp_fifo:out_valid -> board_info_temperature_board2_s1_agent:rf_sink_valid
	wire  [123:0] board_info_temperature_board2_s1_agent_rsp_fifo_out_data;                         // board_info_temperature_board2_s1_agent_rsp_fifo:out_data -> board_info_temperature_board2_s1_agent:rf_sink_data
	wire          board_info_temperature_board2_s1_agent_rsp_fifo_out_ready;                        // board_info_temperature_board2_s1_agent:rf_sink_ready -> board_info_temperature_board2_s1_agent_rsp_fifo:out_ready
	wire          board_info_temperature_board2_s1_agent_rsp_fifo_out_startofpacket;                // board_info_temperature_board2_s1_agent_rsp_fifo:out_startofpacket -> board_info_temperature_board2_s1_agent:rf_sink_startofpacket
	wire          board_info_temperature_board2_s1_agent_rsp_fifo_out_endofpacket;                  // board_info_temperature_board2_s1_agent_rsp_fifo:out_endofpacket -> board_info_temperature_board2_s1_agent:rf_sink_endofpacket
	wire          board_info_temperature_board2_s1_agent_rdata_fifo_src_valid;                      // board_info_temperature_board2_s1_agent:rdata_fifo_src_valid -> board_info_temperature_board2_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_temperature_board2_s1_agent_rdata_fifo_src_data;                       // board_info_temperature_board2_s1_agent:rdata_fifo_src_data -> board_info_temperature_board2_s1_agent:rdata_fifo_sink_data
	wire          board_info_temperature_board2_s1_agent_rdata_fifo_src_ready;                      // board_info_temperature_board2_s1_agent:rdata_fifo_sink_ready -> board_info_temperature_board2_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_015_src_valid;                                                            // cmd_mux_015:src_valid -> board_info_temperature_board2_s1_agent:cp_valid
	wire  [122:0] cmd_mux_015_src_data;                                                             // cmd_mux_015:src_data -> board_info_temperature_board2_s1_agent:cp_data
	wire          cmd_mux_015_src_ready;                                                            // board_info_temperature_board2_s1_agent:cp_ready -> cmd_mux_015:src_ready
	wire   [20:0] cmd_mux_015_src_channel;                                                          // cmd_mux_015:src_channel -> board_info_temperature_board2_s1_agent:cp_channel
	wire          cmd_mux_015_src_startofpacket;                                                    // cmd_mux_015:src_startofpacket -> board_info_temperature_board2_s1_agent:cp_startofpacket
	wire          cmd_mux_015_src_endofpacket;                                                      // cmd_mux_015:src_endofpacket -> board_info_temperature_board2_s1_agent:cp_endofpacket
	wire   [31:0] board_info_temperature_xcvr2_s1_agent_m0_readdata;                                // board_info_temperature_xcvr2_s1_translator:uav_readdata -> board_info_temperature_xcvr2_s1_agent:m0_readdata
	wire          board_info_temperature_xcvr2_s1_agent_m0_waitrequest;                             // board_info_temperature_xcvr2_s1_translator:uav_waitrequest -> board_info_temperature_xcvr2_s1_agent:m0_waitrequest
	wire          board_info_temperature_xcvr2_s1_agent_m0_debugaccess;                             // board_info_temperature_xcvr2_s1_agent:m0_debugaccess -> board_info_temperature_xcvr2_s1_translator:uav_debugaccess
	wire   [20:0] board_info_temperature_xcvr2_s1_agent_m0_address;                                 // board_info_temperature_xcvr2_s1_agent:m0_address -> board_info_temperature_xcvr2_s1_translator:uav_address
	wire    [3:0] board_info_temperature_xcvr2_s1_agent_m0_byteenable;                              // board_info_temperature_xcvr2_s1_agent:m0_byteenable -> board_info_temperature_xcvr2_s1_translator:uav_byteenable
	wire          board_info_temperature_xcvr2_s1_agent_m0_read;                                    // board_info_temperature_xcvr2_s1_agent:m0_read -> board_info_temperature_xcvr2_s1_translator:uav_read
	wire          board_info_temperature_xcvr2_s1_agent_m0_readdatavalid;                           // board_info_temperature_xcvr2_s1_translator:uav_readdatavalid -> board_info_temperature_xcvr2_s1_agent:m0_readdatavalid
	wire          board_info_temperature_xcvr2_s1_agent_m0_lock;                                    // board_info_temperature_xcvr2_s1_agent:m0_lock -> board_info_temperature_xcvr2_s1_translator:uav_lock
	wire   [31:0] board_info_temperature_xcvr2_s1_agent_m0_writedata;                               // board_info_temperature_xcvr2_s1_agent:m0_writedata -> board_info_temperature_xcvr2_s1_translator:uav_writedata
	wire          board_info_temperature_xcvr2_s1_agent_m0_write;                                   // board_info_temperature_xcvr2_s1_agent:m0_write -> board_info_temperature_xcvr2_s1_translator:uav_write
	wire    [2:0] board_info_temperature_xcvr2_s1_agent_m0_burstcount;                              // board_info_temperature_xcvr2_s1_agent:m0_burstcount -> board_info_temperature_xcvr2_s1_translator:uav_burstcount
	wire          board_info_temperature_xcvr2_s1_agent_rf_source_valid;                            // board_info_temperature_xcvr2_s1_agent:rf_source_valid -> board_info_temperature_xcvr2_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_temperature_xcvr2_s1_agent_rf_source_data;                             // board_info_temperature_xcvr2_s1_agent:rf_source_data -> board_info_temperature_xcvr2_s1_agent_rsp_fifo:in_data
	wire          board_info_temperature_xcvr2_s1_agent_rf_source_ready;                            // board_info_temperature_xcvr2_s1_agent_rsp_fifo:in_ready -> board_info_temperature_xcvr2_s1_agent:rf_source_ready
	wire          board_info_temperature_xcvr2_s1_agent_rf_source_startofpacket;                    // board_info_temperature_xcvr2_s1_agent:rf_source_startofpacket -> board_info_temperature_xcvr2_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_temperature_xcvr2_s1_agent_rf_source_endofpacket;                      // board_info_temperature_xcvr2_s1_agent:rf_source_endofpacket -> board_info_temperature_xcvr2_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_valid;                         // board_info_temperature_xcvr2_s1_agent_rsp_fifo:out_valid -> board_info_temperature_xcvr2_s1_agent:rf_sink_valid
	wire  [123:0] board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_data;                          // board_info_temperature_xcvr2_s1_agent_rsp_fifo:out_data -> board_info_temperature_xcvr2_s1_agent:rf_sink_data
	wire          board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_ready;                         // board_info_temperature_xcvr2_s1_agent:rf_sink_ready -> board_info_temperature_xcvr2_s1_agent_rsp_fifo:out_ready
	wire          board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_startofpacket;                 // board_info_temperature_xcvr2_s1_agent_rsp_fifo:out_startofpacket -> board_info_temperature_xcvr2_s1_agent:rf_sink_startofpacket
	wire          board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_endofpacket;                   // board_info_temperature_xcvr2_s1_agent_rsp_fifo:out_endofpacket -> board_info_temperature_xcvr2_s1_agent:rf_sink_endofpacket
	wire          board_info_temperature_xcvr2_s1_agent_rdata_fifo_src_valid;                       // board_info_temperature_xcvr2_s1_agent:rdata_fifo_src_valid -> board_info_temperature_xcvr2_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_temperature_xcvr2_s1_agent_rdata_fifo_src_data;                        // board_info_temperature_xcvr2_s1_agent:rdata_fifo_src_data -> board_info_temperature_xcvr2_s1_agent:rdata_fifo_sink_data
	wire          board_info_temperature_xcvr2_s1_agent_rdata_fifo_src_ready;                       // board_info_temperature_xcvr2_s1_agent:rdata_fifo_sink_ready -> board_info_temperature_xcvr2_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_016_src_valid;                                                            // cmd_mux_016:src_valid -> board_info_temperature_xcvr2_s1_agent:cp_valid
	wire  [122:0] cmd_mux_016_src_data;                                                             // cmd_mux_016:src_data -> board_info_temperature_xcvr2_s1_agent:cp_data
	wire          cmd_mux_016_src_ready;                                                            // board_info_temperature_xcvr2_s1_agent:cp_ready -> cmd_mux_016:src_ready
	wire   [20:0] cmd_mux_016_src_channel;                                                          // cmd_mux_016:src_channel -> board_info_temperature_xcvr2_s1_agent:cp_channel
	wire          cmd_mux_016_src_startofpacket;                                                    // cmd_mux_016:src_startofpacket -> board_info_temperature_xcvr2_s1_agent:cp_startofpacket
	wire          cmd_mux_016_src_endofpacket;                                                      // cmd_mux_016:src_endofpacket -> board_info_temperature_xcvr2_s1_agent:cp_endofpacket
	wire   [31:0] timer_s1_agent_m0_readdata;                                                       // timer_s1_translator:uav_readdata -> timer_s1_agent:m0_readdata
	wire          timer_s1_agent_m0_waitrequest;                                                    // timer_s1_translator:uav_waitrequest -> timer_s1_agent:m0_waitrequest
	wire          timer_s1_agent_m0_debugaccess;                                                    // timer_s1_agent:m0_debugaccess -> timer_s1_translator:uav_debugaccess
	wire   [20:0] timer_s1_agent_m0_address;                                                        // timer_s1_agent:m0_address -> timer_s1_translator:uav_address
	wire    [3:0] timer_s1_agent_m0_byteenable;                                                     // timer_s1_agent:m0_byteenable -> timer_s1_translator:uav_byteenable
	wire          timer_s1_agent_m0_read;                                                           // timer_s1_agent:m0_read -> timer_s1_translator:uav_read
	wire          timer_s1_agent_m0_readdatavalid;                                                  // timer_s1_translator:uav_readdatavalid -> timer_s1_agent:m0_readdatavalid
	wire          timer_s1_agent_m0_lock;                                                           // timer_s1_agent:m0_lock -> timer_s1_translator:uav_lock
	wire   [31:0] timer_s1_agent_m0_writedata;                                                      // timer_s1_agent:m0_writedata -> timer_s1_translator:uav_writedata
	wire          timer_s1_agent_m0_write;                                                          // timer_s1_agent:m0_write -> timer_s1_translator:uav_write
	wire    [2:0] timer_s1_agent_m0_burstcount;                                                     // timer_s1_agent:m0_burstcount -> timer_s1_translator:uav_burstcount
	wire          timer_s1_agent_rf_source_valid;                                                   // timer_s1_agent:rf_source_valid -> timer_s1_agent_rsp_fifo:in_valid
	wire  [123:0] timer_s1_agent_rf_source_data;                                                    // timer_s1_agent:rf_source_data -> timer_s1_agent_rsp_fifo:in_data
	wire          timer_s1_agent_rf_source_ready;                                                   // timer_s1_agent_rsp_fifo:in_ready -> timer_s1_agent:rf_source_ready
	wire          timer_s1_agent_rf_source_startofpacket;                                           // timer_s1_agent:rf_source_startofpacket -> timer_s1_agent_rsp_fifo:in_startofpacket
	wire          timer_s1_agent_rf_source_endofpacket;                                             // timer_s1_agent:rf_source_endofpacket -> timer_s1_agent_rsp_fifo:in_endofpacket
	wire          timer_s1_agent_rsp_fifo_out_valid;                                                // timer_s1_agent_rsp_fifo:out_valid -> timer_s1_agent:rf_sink_valid
	wire  [123:0] timer_s1_agent_rsp_fifo_out_data;                                                 // timer_s1_agent_rsp_fifo:out_data -> timer_s1_agent:rf_sink_data
	wire          timer_s1_agent_rsp_fifo_out_ready;                                                // timer_s1_agent:rf_sink_ready -> timer_s1_agent_rsp_fifo:out_ready
	wire          timer_s1_agent_rsp_fifo_out_startofpacket;                                        // timer_s1_agent_rsp_fifo:out_startofpacket -> timer_s1_agent:rf_sink_startofpacket
	wire          timer_s1_agent_rsp_fifo_out_endofpacket;                                          // timer_s1_agent_rsp_fifo:out_endofpacket -> timer_s1_agent:rf_sink_endofpacket
	wire          timer_s1_agent_rdata_fifo_src_valid;                                              // timer_s1_agent:rdata_fifo_src_valid -> timer_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] timer_s1_agent_rdata_fifo_src_data;                                               // timer_s1_agent:rdata_fifo_src_data -> timer_s1_agent:rdata_fifo_sink_data
	wire          timer_s1_agent_rdata_fifo_src_ready;                                              // timer_s1_agent:rdata_fifo_sink_ready -> timer_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_017_src_valid;                                                            // cmd_mux_017:src_valid -> timer_s1_agent:cp_valid
	wire  [122:0] cmd_mux_017_src_data;                                                             // cmd_mux_017:src_data -> timer_s1_agent:cp_data
	wire          cmd_mux_017_src_ready;                                                            // timer_s1_agent:cp_ready -> cmd_mux_017:src_ready
	wire   [20:0] cmd_mux_017_src_channel;                                                          // cmd_mux_017:src_channel -> timer_s1_agent:cp_channel
	wire          cmd_mux_017_src_startofpacket;                                                    // cmd_mux_017:src_startofpacket -> timer_s1_agent:cp_startofpacket
	wire          cmd_mux_017_src_endofpacket;                                                      // cmd_mux_017:src_endofpacket -> timer_s1_agent:cp_endofpacket
	wire   [31:0] board_info_temperature_power_s1_agent_m0_readdata;                                // board_info_temperature_power_s1_translator:uav_readdata -> board_info_temperature_power_s1_agent:m0_readdata
	wire          board_info_temperature_power_s1_agent_m0_waitrequest;                             // board_info_temperature_power_s1_translator:uav_waitrequest -> board_info_temperature_power_s1_agent:m0_waitrequest
	wire          board_info_temperature_power_s1_agent_m0_debugaccess;                             // board_info_temperature_power_s1_agent:m0_debugaccess -> board_info_temperature_power_s1_translator:uav_debugaccess
	wire   [20:0] board_info_temperature_power_s1_agent_m0_address;                                 // board_info_temperature_power_s1_agent:m0_address -> board_info_temperature_power_s1_translator:uav_address
	wire    [3:0] board_info_temperature_power_s1_agent_m0_byteenable;                              // board_info_temperature_power_s1_agent:m0_byteenable -> board_info_temperature_power_s1_translator:uav_byteenable
	wire          board_info_temperature_power_s1_agent_m0_read;                                    // board_info_temperature_power_s1_agent:m0_read -> board_info_temperature_power_s1_translator:uav_read
	wire          board_info_temperature_power_s1_agent_m0_readdatavalid;                           // board_info_temperature_power_s1_translator:uav_readdatavalid -> board_info_temperature_power_s1_agent:m0_readdatavalid
	wire          board_info_temperature_power_s1_agent_m0_lock;                                    // board_info_temperature_power_s1_agent:m0_lock -> board_info_temperature_power_s1_translator:uav_lock
	wire   [31:0] board_info_temperature_power_s1_agent_m0_writedata;                               // board_info_temperature_power_s1_agent:m0_writedata -> board_info_temperature_power_s1_translator:uav_writedata
	wire          board_info_temperature_power_s1_agent_m0_write;                                   // board_info_temperature_power_s1_agent:m0_write -> board_info_temperature_power_s1_translator:uav_write
	wire    [2:0] board_info_temperature_power_s1_agent_m0_burstcount;                              // board_info_temperature_power_s1_agent:m0_burstcount -> board_info_temperature_power_s1_translator:uav_burstcount
	wire          board_info_temperature_power_s1_agent_rf_source_valid;                            // board_info_temperature_power_s1_agent:rf_source_valid -> board_info_temperature_power_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_temperature_power_s1_agent_rf_source_data;                             // board_info_temperature_power_s1_agent:rf_source_data -> board_info_temperature_power_s1_agent_rsp_fifo:in_data
	wire          board_info_temperature_power_s1_agent_rf_source_ready;                            // board_info_temperature_power_s1_agent_rsp_fifo:in_ready -> board_info_temperature_power_s1_agent:rf_source_ready
	wire          board_info_temperature_power_s1_agent_rf_source_startofpacket;                    // board_info_temperature_power_s1_agent:rf_source_startofpacket -> board_info_temperature_power_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_temperature_power_s1_agent_rf_source_endofpacket;                      // board_info_temperature_power_s1_agent:rf_source_endofpacket -> board_info_temperature_power_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_temperature_power_s1_agent_rsp_fifo_out_valid;                         // board_info_temperature_power_s1_agent_rsp_fifo:out_valid -> board_info_temperature_power_s1_agent:rf_sink_valid
	wire  [123:0] board_info_temperature_power_s1_agent_rsp_fifo_out_data;                          // board_info_temperature_power_s1_agent_rsp_fifo:out_data -> board_info_temperature_power_s1_agent:rf_sink_data
	wire          board_info_temperature_power_s1_agent_rsp_fifo_out_ready;                         // board_info_temperature_power_s1_agent:rf_sink_ready -> board_info_temperature_power_s1_agent_rsp_fifo:out_ready
	wire          board_info_temperature_power_s1_agent_rsp_fifo_out_startofpacket;                 // board_info_temperature_power_s1_agent_rsp_fifo:out_startofpacket -> board_info_temperature_power_s1_agent:rf_sink_startofpacket
	wire          board_info_temperature_power_s1_agent_rsp_fifo_out_endofpacket;                   // board_info_temperature_power_s1_agent_rsp_fifo:out_endofpacket -> board_info_temperature_power_s1_agent:rf_sink_endofpacket
	wire          board_info_temperature_power_s1_agent_rdata_fifo_src_valid;                       // board_info_temperature_power_s1_agent:rdata_fifo_src_valid -> board_info_temperature_power_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_temperature_power_s1_agent_rdata_fifo_src_data;                        // board_info_temperature_power_s1_agent:rdata_fifo_src_data -> board_info_temperature_power_s1_agent:rdata_fifo_sink_data
	wire          board_info_temperature_power_s1_agent_rdata_fifo_src_ready;                       // board_info_temperature_power_s1_agent:rdata_fifo_sink_ready -> board_info_temperature_power_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_018_src_valid;                                                            // cmd_mux_018:src_valid -> board_info_temperature_power_s1_agent:cp_valid
	wire  [122:0] cmd_mux_018_src_data;                                                             // cmd_mux_018:src_data -> board_info_temperature_power_s1_agent:cp_data
	wire          cmd_mux_018_src_ready;                                                            // board_info_temperature_power_s1_agent:cp_ready -> cmd_mux_018:src_ready
	wire   [20:0] cmd_mux_018_src_channel;                                                          // cmd_mux_018:src_channel -> board_info_temperature_power_s1_agent:cp_channel
	wire          cmd_mux_018_src_startofpacket;                                                    // cmd_mux_018:src_startofpacket -> board_info_temperature_power_s1_agent:cp_startofpacket
	wire          cmd_mux_018_src_endofpacket;                                                      // cmd_mux_018:src_endofpacket -> board_info_temperature_power_s1_agent:cp_endofpacket
	wire   [31:0] board_info_temperature_board3_s1_agent_m0_readdata;                               // board_info_temperature_board3_s1_translator:uav_readdata -> board_info_temperature_board3_s1_agent:m0_readdata
	wire          board_info_temperature_board3_s1_agent_m0_waitrequest;                            // board_info_temperature_board3_s1_translator:uav_waitrequest -> board_info_temperature_board3_s1_agent:m0_waitrequest
	wire          board_info_temperature_board3_s1_agent_m0_debugaccess;                            // board_info_temperature_board3_s1_agent:m0_debugaccess -> board_info_temperature_board3_s1_translator:uav_debugaccess
	wire   [20:0] board_info_temperature_board3_s1_agent_m0_address;                                // board_info_temperature_board3_s1_agent:m0_address -> board_info_temperature_board3_s1_translator:uav_address
	wire    [3:0] board_info_temperature_board3_s1_agent_m0_byteenable;                             // board_info_temperature_board3_s1_agent:m0_byteenable -> board_info_temperature_board3_s1_translator:uav_byteenable
	wire          board_info_temperature_board3_s1_agent_m0_read;                                   // board_info_temperature_board3_s1_agent:m0_read -> board_info_temperature_board3_s1_translator:uav_read
	wire          board_info_temperature_board3_s1_agent_m0_readdatavalid;                          // board_info_temperature_board3_s1_translator:uav_readdatavalid -> board_info_temperature_board3_s1_agent:m0_readdatavalid
	wire          board_info_temperature_board3_s1_agent_m0_lock;                                   // board_info_temperature_board3_s1_agent:m0_lock -> board_info_temperature_board3_s1_translator:uav_lock
	wire   [31:0] board_info_temperature_board3_s1_agent_m0_writedata;                              // board_info_temperature_board3_s1_agent:m0_writedata -> board_info_temperature_board3_s1_translator:uav_writedata
	wire          board_info_temperature_board3_s1_agent_m0_write;                                  // board_info_temperature_board3_s1_agent:m0_write -> board_info_temperature_board3_s1_translator:uav_write
	wire    [2:0] board_info_temperature_board3_s1_agent_m0_burstcount;                             // board_info_temperature_board3_s1_agent:m0_burstcount -> board_info_temperature_board3_s1_translator:uav_burstcount
	wire          board_info_temperature_board3_s1_agent_rf_source_valid;                           // board_info_temperature_board3_s1_agent:rf_source_valid -> board_info_temperature_board3_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_temperature_board3_s1_agent_rf_source_data;                            // board_info_temperature_board3_s1_agent:rf_source_data -> board_info_temperature_board3_s1_agent_rsp_fifo:in_data
	wire          board_info_temperature_board3_s1_agent_rf_source_ready;                           // board_info_temperature_board3_s1_agent_rsp_fifo:in_ready -> board_info_temperature_board3_s1_agent:rf_source_ready
	wire          board_info_temperature_board3_s1_agent_rf_source_startofpacket;                   // board_info_temperature_board3_s1_agent:rf_source_startofpacket -> board_info_temperature_board3_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_temperature_board3_s1_agent_rf_source_endofpacket;                     // board_info_temperature_board3_s1_agent:rf_source_endofpacket -> board_info_temperature_board3_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_temperature_board3_s1_agent_rsp_fifo_out_valid;                        // board_info_temperature_board3_s1_agent_rsp_fifo:out_valid -> board_info_temperature_board3_s1_agent:rf_sink_valid
	wire  [123:0] board_info_temperature_board3_s1_agent_rsp_fifo_out_data;                         // board_info_temperature_board3_s1_agent_rsp_fifo:out_data -> board_info_temperature_board3_s1_agent:rf_sink_data
	wire          board_info_temperature_board3_s1_agent_rsp_fifo_out_ready;                        // board_info_temperature_board3_s1_agent:rf_sink_ready -> board_info_temperature_board3_s1_agent_rsp_fifo:out_ready
	wire          board_info_temperature_board3_s1_agent_rsp_fifo_out_startofpacket;                // board_info_temperature_board3_s1_agent_rsp_fifo:out_startofpacket -> board_info_temperature_board3_s1_agent:rf_sink_startofpacket
	wire          board_info_temperature_board3_s1_agent_rsp_fifo_out_endofpacket;                  // board_info_temperature_board3_s1_agent_rsp_fifo:out_endofpacket -> board_info_temperature_board3_s1_agent:rf_sink_endofpacket
	wire          board_info_temperature_board3_s1_agent_rdata_fifo_src_valid;                      // board_info_temperature_board3_s1_agent:rdata_fifo_src_valid -> board_info_temperature_board3_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_temperature_board3_s1_agent_rdata_fifo_src_data;                       // board_info_temperature_board3_s1_agent:rdata_fifo_src_data -> board_info_temperature_board3_s1_agent:rdata_fifo_sink_data
	wire          board_info_temperature_board3_s1_agent_rdata_fifo_src_ready;                      // board_info_temperature_board3_s1_agent:rdata_fifo_sink_ready -> board_info_temperature_board3_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_019_src_valid;                                                            // cmd_mux_019:src_valid -> board_info_temperature_board3_s1_agent:cp_valid
	wire  [122:0] cmd_mux_019_src_data;                                                             // cmd_mux_019:src_data -> board_info_temperature_board3_s1_agent:cp_data
	wire          cmd_mux_019_src_ready;                                                            // board_info_temperature_board3_s1_agent:cp_ready -> cmd_mux_019:src_ready
	wire   [20:0] cmd_mux_019_src_channel;                                                          // cmd_mux_019:src_channel -> board_info_temperature_board3_s1_agent:cp_channel
	wire          cmd_mux_019_src_startofpacket;                                                    // cmd_mux_019:src_startofpacket -> board_info_temperature_board3_s1_agent:cp_startofpacket
	wire          cmd_mux_019_src_endofpacket;                                                      // cmd_mux_019:src_endofpacket -> board_info_temperature_board3_s1_agent:cp_endofpacket
	wire   [31:0] board_info_temperature_xcvr3_s1_agent_m0_readdata;                                // board_info_temperature_xcvr3_s1_translator:uav_readdata -> board_info_temperature_xcvr3_s1_agent:m0_readdata
	wire          board_info_temperature_xcvr3_s1_agent_m0_waitrequest;                             // board_info_temperature_xcvr3_s1_translator:uav_waitrequest -> board_info_temperature_xcvr3_s1_agent:m0_waitrequest
	wire          board_info_temperature_xcvr3_s1_agent_m0_debugaccess;                             // board_info_temperature_xcvr3_s1_agent:m0_debugaccess -> board_info_temperature_xcvr3_s1_translator:uav_debugaccess
	wire   [20:0] board_info_temperature_xcvr3_s1_agent_m0_address;                                 // board_info_temperature_xcvr3_s1_agent:m0_address -> board_info_temperature_xcvr3_s1_translator:uav_address
	wire    [3:0] board_info_temperature_xcvr3_s1_agent_m0_byteenable;                              // board_info_temperature_xcvr3_s1_agent:m0_byteenable -> board_info_temperature_xcvr3_s1_translator:uav_byteenable
	wire          board_info_temperature_xcvr3_s1_agent_m0_read;                                    // board_info_temperature_xcvr3_s1_agent:m0_read -> board_info_temperature_xcvr3_s1_translator:uav_read
	wire          board_info_temperature_xcvr3_s1_agent_m0_readdatavalid;                           // board_info_temperature_xcvr3_s1_translator:uav_readdatavalid -> board_info_temperature_xcvr3_s1_agent:m0_readdatavalid
	wire          board_info_temperature_xcvr3_s1_agent_m0_lock;                                    // board_info_temperature_xcvr3_s1_agent:m0_lock -> board_info_temperature_xcvr3_s1_translator:uav_lock
	wire   [31:0] board_info_temperature_xcvr3_s1_agent_m0_writedata;                               // board_info_temperature_xcvr3_s1_agent:m0_writedata -> board_info_temperature_xcvr3_s1_translator:uav_writedata
	wire          board_info_temperature_xcvr3_s1_agent_m0_write;                                   // board_info_temperature_xcvr3_s1_agent:m0_write -> board_info_temperature_xcvr3_s1_translator:uav_write
	wire    [2:0] board_info_temperature_xcvr3_s1_agent_m0_burstcount;                              // board_info_temperature_xcvr3_s1_agent:m0_burstcount -> board_info_temperature_xcvr3_s1_translator:uav_burstcount
	wire          board_info_temperature_xcvr3_s1_agent_rf_source_valid;                            // board_info_temperature_xcvr3_s1_agent:rf_source_valid -> board_info_temperature_xcvr3_s1_agent_rsp_fifo:in_valid
	wire  [123:0] board_info_temperature_xcvr3_s1_agent_rf_source_data;                             // board_info_temperature_xcvr3_s1_agent:rf_source_data -> board_info_temperature_xcvr3_s1_agent_rsp_fifo:in_data
	wire          board_info_temperature_xcvr3_s1_agent_rf_source_ready;                            // board_info_temperature_xcvr3_s1_agent_rsp_fifo:in_ready -> board_info_temperature_xcvr3_s1_agent:rf_source_ready
	wire          board_info_temperature_xcvr3_s1_agent_rf_source_startofpacket;                    // board_info_temperature_xcvr3_s1_agent:rf_source_startofpacket -> board_info_temperature_xcvr3_s1_agent_rsp_fifo:in_startofpacket
	wire          board_info_temperature_xcvr3_s1_agent_rf_source_endofpacket;                      // board_info_temperature_xcvr3_s1_agent:rf_source_endofpacket -> board_info_temperature_xcvr3_s1_agent_rsp_fifo:in_endofpacket
	wire          board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_valid;                         // board_info_temperature_xcvr3_s1_agent_rsp_fifo:out_valid -> board_info_temperature_xcvr3_s1_agent:rf_sink_valid
	wire  [123:0] board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_data;                          // board_info_temperature_xcvr3_s1_agent_rsp_fifo:out_data -> board_info_temperature_xcvr3_s1_agent:rf_sink_data
	wire          board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_ready;                         // board_info_temperature_xcvr3_s1_agent:rf_sink_ready -> board_info_temperature_xcvr3_s1_agent_rsp_fifo:out_ready
	wire          board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_startofpacket;                 // board_info_temperature_xcvr3_s1_agent_rsp_fifo:out_startofpacket -> board_info_temperature_xcvr3_s1_agent:rf_sink_startofpacket
	wire          board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_endofpacket;                   // board_info_temperature_xcvr3_s1_agent_rsp_fifo:out_endofpacket -> board_info_temperature_xcvr3_s1_agent:rf_sink_endofpacket
	wire          board_info_temperature_xcvr3_s1_agent_rdata_fifo_src_valid;                       // board_info_temperature_xcvr3_s1_agent:rdata_fifo_src_valid -> board_info_temperature_xcvr3_s1_agent:rdata_fifo_sink_valid
	wire   [33:0] board_info_temperature_xcvr3_s1_agent_rdata_fifo_src_data;                        // board_info_temperature_xcvr3_s1_agent:rdata_fifo_src_data -> board_info_temperature_xcvr3_s1_agent:rdata_fifo_sink_data
	wire          board_info_temperature_xcvr3_s1_agent_rdata_fifo_src_ready;                       // board_info_temperature_xcvr3_s1_agent:rdata_fifo_sink_ready -> board_info_temperature_xcvr3_s1_agent:rdata_fifo_src_ready
	wire          cmd_mux_020_src_valid;                                                            // cmd_mux_020:src_valid -> board_info_temperature_xcvr3_s1_agent:cp_valid
	wire  [122:0] cmd_mux_020_src_data;                                                             // cmd_mux_020:src_data -> board_info_temperature_xcvr3_s1_agent:cp_data
	wire          cmd_mux_020_src_ready;                                                            // board_info_temperature_xcvr3_s1_agent:cp_ready -> cmd_mux_020:src_ready
	wire   [20:0] cmd_mux_020_src_channel;                                                          // cmd_mux_020:src_channel -> board_info_temperature_xcvr3_s1_agent:cp_channel
	wire          cmd_mux_020_src_startofpacket;                                                    // cmd_mux_020:src_startofpacket -> board_info_temperature_xcvr3_s1_agent:cp_startofpacket
	wire          cmd_mux_020_src_endofpacket;                                                      // cmd_mux_020:src_endofpacket -> board_info_temperature_xcvr3_s1_agent:cp_endofpacket
	wire          nios2_gen2_data_master_agent_cp_valid;                                            // nios2_gen2_data_master_agent:cp_valid -> router:sink_valid
	wire  [122:0] nios2_gen2_data_master_agent_cp_data;                                             // nios2_gen2_data_master_agent:cp_data -> router:sink_data
	wire          nios2_gen2_data_master_agent_cp_ready;                                            // router:sink_ready -> nios2_gen2_data_master_agent:cp_ready
	wire          nios2_gen2_data_master_agent_cp_startofpacket;                                    // nios2_gen2_data_master_agent:cp_startofpacket -> router:sink_startofpacket
	wire          nios2_gen2_data_master_agent_cp_endofpacket;                                      // nios2_gen2_data_master_agent:cp_endofpacket -> router:sink_endofpacket
	wire          nios2_gen2_instruction_master_agent_cp_valid;                                     // nios2_gen2_instruction_master_agent:cp_valid -> router_001:sink_valid
	wire  [122:0] nios2_gen2_instruction_master_agent_cp_data;                                      // nios2_gen2_instruction_master_agent:cp_data -> router_001:sink_data
	wire          nios2_gen2_instruction_master_agent_cp_ready;                                     // router_001:sink_ready -> nios2_gen2_instruction_master_agent:cp_ready
	wire          nios2_gen2_instruction_master_agent_cp_startofpacket;                             // nios2_gen2_instruction_master_agent:cp_startofpacket -> router_001:sink_startofpacket
	wire          nios2_gen2_instruction_master_agent_cp_endofpacket;                               // nios2_gen2_instruction_master_agent:cp_endofpacket -> router_001:sink_endofpacket
	wire          jtag_uart_avalon_jtag_slave_agent_rp_valid;                                       // jtag_uart_avalon_jtag_slave_agent:rp_valid -> router_002:sink_valid
	wire  [122:0] jtag_uart_avalon_jtag_slave_agent_rp_data;                                        // jtag_uart_avalon_jtag_slave_agent:rp_data -> router_002:sink_data
	wire          jtag_uart_avalon_jtag_slave_agent_rp_ready;                                       // router_002:sink_ready -> jtag_uart_avalon_jtag_slave_agent:rp_ready
	wire          jtag_uart_avalon_jtag_slave_agent_rp_startofpacket;                               // jtag_uart_avalon_jtag_slave_agent:rp_startofpacket -> router_002:sink_startofpacket
	wire          jtag_uart_avalon_jtag_slave_agent_rp_endofpacket;                                 // jtag_uart_avalon_jtag_slave_agent:rp_endofpacket -> router_002:sink_endofpacket
	wire          router_002_src_valid;                                                             // router_002:src_valid -> rsp_demux:sink_valid
	wire  [122:0] router_002_src_data;                                                              // router_002:src_data -> rsp_demux:sink_data
	wire          router_002_src_ready;                                                             // rsp_demux:sink_ready -> router_002:src_ready
	wire   [20:0] router_002_src_channel;                                                           // router_002:src_channel -> rsp_demux:sink_channel
	wire          router_002_src_startofpacket;                                                     // router_002:src_startofpacket -> rsp_demux:sink_startofpacket
	wire          router_002_src_endofpacket;                                                       // router_002:src_endofpacket -> rsp_demux:sink_endofpacket
	wire          sysid_qsys_control_slave_agent_rp_valid;                                          // sysid_qsys_control_slave_agent:rp_valid -> router_003:sink_valid
	wire  [122:0] sysid_qsys_control_slave_agent_rp_data;                                           // sysid_qsys_control_slave_agent:rp_data -> router_003:sink_data
	wire          sysid_qsys_control_slave_agent_rp_ready;                                          // router_003:sink_ready -> sysid_qsys_control_slave_agent:rp_ready
	wire          sysid_qsys_control_slave_agent_rp_startofpacket;                                  // sysid_qsys_control_slave_agent:rp_startofpacket -> router_003:sink_startofpacket
	wire          sysid_qsys_control_slave_agent_rp_endofpacket;                                    // sysid_qsys_control_slave_agent:rp_endofpacket -> router_003:sink_endofpacket
	wire          router_003_src_valid;                                                             // router_003:src_valid -> rsp_demux_001:sink_valid
	wire  [122:0] router_003_src_data;                                                              // router_003:src_data -> rsp_demux_001:sink_data
	wire          router_003_src_ready;                                                             // rsp_demux_001:sink_ready -> router_003:src_ready
	wire   [20:0] router_003_src_channel;                                                           // router_003:src_channel -> rsp_demux_001:sink_channel
	wire          router_003_src_startofpacket;                                                     // router_003:src_startofpacket -> rsp_demux_001:sink_startofpacket
	wire          router_003_src_endofpacket;                                                       // router_003:src_endofpacket -> rsp_demux_001:sink_endofpacket
	wire          nios2_gen2_debug_mem_slave_agent_rp_valid;                                        // nios2_gen2_debug_mem_slave_agent:rp_valid -> router_004:sink_valid
	wire  [122:0] nios2_gen2_debug_mem_slave_agent_rp_data;                                         // nios2_gen2_debug_mem_slave_agent:rp_data -> router_004:sink_data
	wire          nios2_gen2_debug_mem_slave_agent_rp_ready;                                        // router_004:sink_ready -> nios2_gen2_debug_mem_slave_agent:rp_ready
	wire          nios2_gen2_debug_mem_slave_agent_rp_startofpacket;                                // nios2_gen2_debug_mem_slave_agent:rp_startofpacket -> router_004:sink_startofpacket
	wire          nios2_gen2_debug_mem_slave_agent_rp_endofpacket;                                  // nios2_gen2_debug_mem_slave_agent:rp_endofpacket -> router_004:sink_endofpacket
	wire          router_004_src_valid;                                                             // router_004:src_valid -> rsp_demux_002:sink_valid
	wire  [122:0] router_004_src_data;                                                              // router_004:src_data -> rsp_demux_002:sink_data
	wire          router_004_src_ready;                                                             // rsp_demux_002:sink_ready -> router_004:src_ready
	wire   [20:0] router_004_src_channel;                                                           // router_004:src_channel -> rsp_demux_002:sink_channel
	wire          router_004_src_startofpacket;                                                     // router_004:src_startofpacket -> rsp_demux_002:sink_startofpacket
	wire          router_004_src_endofpacket;                                                       // router_004:src_endofpacket -> rsp_demux_002:sink_endofpacket
	wire          onchip_memory2_s1_agent_rp_valid;                                                 // onchip_memory2_s1_agent:rp_valid -> router_005:sink_valid
	wire  [122:0] onchip_memory2_s1_agent_rp_data;                                                  // onchip_memory2_s1_agent:rp_data -> router_005:sink_data
	wire          onchip_memory2_s1_agent_rp_ready;                                                 // router_005:sink_ready -> onchip_memory2_s1_agent:rp_ready
	wire          onchip_memory2_s1_agent_rp_startofpacket;                                         // onchip_memory2_s1_agent:rp_startofpacket -> router_005:sink_startofpacket
	wire          onchip_memory2_s1_agent_rp_endofpacket;                                           // onchip_memory2_s1_agent:rp_endofpacket -> router_005:sink_endofpacket
	wire          router_005_src_valid;                                                             // router_005:src_valid -> rsp_demux_003:sink_valid
	wire  [122:0] router_005_src_data;                                                              // router_005:src_data -> rsp_demux_003:sink_data
	wire          router_005_src_ready;                                                             // rsp_demux_003:sink_ready -> router_005:src_ready
	wire   [20:0] router_005_src_channel;                                                           // router_005:src_channel -> rsp_demux_003:sink_channel
	wire          router_005_src_startofpacket;                                                     // router_005:src_startofpacket -> rsp_demux_003:sink_startofpacket
	wire          router_005_src_endofpacket;                                                       // router_005:src_endofpacket -> rsp_demux_003:sink_endofpacket
	wire          board_info_temperature_fpga_s1_agent_rp_valid;                                    // board_info_temperature_fpga_s1_agent:rp_valid -> router_006:sink_valid
	wire  [122:0] board_info_temperature_fpga_s1_agent_rp_data;                                     // board_info_temperature_fpga_s1_agent:rp_data -> router_006:sink_data
	wire          board_info_temperature_fpga_s1_agent_rp_ready;                                    // router_006:sink_ready -> board_info_temperature_fpga_s1_agent:rp_ready
	wire          board_info_temperature_fpga_s1_agent_rp_startofpacket;                            // board_info_temperature_fpga_s1_agent:rp_startofpacket -> router_006:sink_startofpacket
	wire          board_info_temperature_fpga_s1_agent_rp_endofpacket;                              // board_info_temperature_fpga_s1_agent:rp_endofpacket -> router_006:sink_endofpacket
	wire          router_006_src_valid;                                                             // router_006:src_valid -> rsp_demux_004:sink_valid
	wire  [122:0] router_006_src_data;                                                              // router_006:src_data -> rsp_demux_004:sink_data
	wire          router_006_src_ready;                                                             // rsp_demux_004:sink_ready -> router_006:src_ready
	wire   [20:0] router_006_src_channel;                                                           // router_006:src_channel -> rsp_demux_004:sink_channel
	wire          router_006_src_startofpacket;                                                     // router_006:src_startofpacket -> rsp_demux_004:sink_startofpacket
	wire          router_006_src_endofpacket;                                                       // router_006:src_endofpacket -> rsp_demux_004:sink_endofpacket
	wire          board_info_temperature_board1_s1_agent_rp_valid;                                  // board_info_temperature_board1_s1_agent:rp_valid -> router_007:sink_valid
	wire  [122:0] board_info_temperature_board1_s1_agent_rp_data;                                   // board_info_temperature_board1_s1_agent:rp_data -> router_007:sink_data
	wire          board_info_temperature_board1_s1_agent_rp_ready;                                  // router_007:sink_ready -> board_info_temperature_board1_s1_agent:rp_ready
	wire          board_info_temperature_board1_s1_agent_rp_startofpacket;                          // board_info_temperature_board1_s1_agent:rp_startofpacket -> router_007:sink_startofpacket
	wire          board_info_temperature_board1_s1_agent_rp_endofpacket;                            // board_info_temperature_board1_s1_agent:rp_endofpacket -> router_007:sink_endofpacket
	wire          router_007_src_valid;                                                             // router_007:src_valid -> rsp_demux_005:sink_valid
	wire  [122:0] router_007_src_data;                                                              // router_007:src_data -> rsp_demux_005:sink_data
	wire          router_007_src_ready;                                                             // rsp_demux_005:sink_ready -> router_007:src_ready
	wire   [20:0] router_007_src_channel;                                                           // router_007:src_channel -> rsp_demux_005:sink_channel
	wire          router_007_src_startofpacket;                                                     // router_007:src_startofpacket -> rsp_demux_005:sink_startofpacket
	wire          router_007_src_endofpacket;                                                       // router_007:src_endofpacket -> rsp_demux_005:sink_endofpacket
	wire          board_info_fan_speed1_s1_agent_rp_valid;                                          // board_info_fan_speed1_s1_agent:rp_valid -> router_008:sink_valid
	wire  [122:0] board_info_fan_speed1_s1_agent_rp_data;                                           // board_info_fan_speed1_s1_agent:rp_data -> router_008:sink_data
	wire          board_info_fan_speed1_s1_agent_rp_ready;                                          // router_008:sink_ready -> board_info_fan_speed1_s1_agent:rp_ready
	wire          board_info_fan_speed1_s1_agent_rp_startofpacket;                                  // board_info_fan_speed1_s1_agent:rp_startofpacket -> router_008:sink_startofpacket
	wire          board_info_fan_speed1_s1_agent_rp_endofpacket;                                    // board_info_fan_speed1_s1_agent:rp_endofpacket -> router_008:sink_endofpacket
	wire          router_008_src_valid;                                                             // router_008:src_valid -> rsp_demux_006:sink_valid
	wire  [122:0] router_008_src_data;                                                              // router_008:src_data -> rsp_demux_006:sink_data
	wire          router_008_src_ready;                                                             // rsp_demux_006:sink_ready -> router_008:src_ready
	wire   [20:0] router_008_src_channel;                                                           // router_008:src_channel -> rsp_demux_006:sink_channel
	wire          router_008_src_startofpacket;                                                     // router_008:src_startofpacket -> rsp_demux_006:sink_startofpacket
	wire          router_008_src_endofpacket;                                                       // router_008:src_endofpacket -> rsp_demux_006:sink_endofpacket
	wire          board_info_fan_speed2_s1_agent_rp_valid;                                          // board_info_fan_speed2_s1_agent:rp_valid -> router_009:sink_valid
	wire  [122:0] board_info_fan_speed2_s1_agent_rp_data;                                           // board_info_fan_speed2_s1_agent:rp_data -> router_009:sink_data
	wire          board_info_fan_speed2_s1_agent_rp_ready;                                          // router_009:sink_ready -> board_info_fan_speed2_s1_agent:rp_ready
	wire          board_info_fan_speed2_s1_agent_rp_startofpacket;                                  // board_info_fan_speed2_s1_agent:rp_startofpacket -> router_009:sink_startofpacket
	wire          board_info_fan_speed2_s1_agent_rp_endofpacket;                                    // board_info_fan_speed2_s1_agent:rp_endofpacket -> router_009:sink_endofpacket
	wire          router_009_src_valid;                                                             // router_009:src_valid -> rsp_demux_007:sink_valid
	wire  [122:0] router_009_src_data;                                                              // router_009:src_data -> rsp_demux_007:sink_data
	wire          router_009_src_ready;                                                             // rsp_demux_007:sink_ready -> router_009:src_ready
	wire   [20:0] router_009_src_channel;                                                           // router_009:src_channel -> rsp_demux_007:sink_channel
	wire          router_009_src_startofpacket;                                                     // router_009:src_startofpacket -> rsp_demux_007:sink_startofpacket
	wire          router_009_src_endofpacket;                                                       // router_009:src_endofpacket -> rsp_demux_007:sink_endofpacket
	wire          board_info_core_current_s1_agent_rp_valid;                                        // board_info_core_current_s1_agent:rp_valid -> router_010:sink_valid
	wire  [122:0] board_info_core_current_s1_agent_rp_data;                                         // board_info_core_current_s1_agent:rp_data -> router_010:sink_data
	wire          board_info_core_current_s1_agent_rp_ready;                                        // router_010:sink_ready -> board_info_core_current_s1_agent:rp_ready
	wire          board_info_core_current_s1_agent_rp_startofpacket;                                // board_info_core_current_s1_agent:rp_startofpacket -> router_010:sink_startofpacket
	wire          board_info_core_current_s1_agent_rp_endofpacket;                                  // board_info_core_current_s1_agent:rp_endofpacket -> router_010:sink_endofpacket
	wire          router_010_src_valid;                                                             // router_010:src_valid -> rsp_demux_008:sink_valid
	wire  [122:0] router_010_src_data;                                                              // router_010:src_data -> rsp_demux_008:sink_data
	wire          router_010_src_ready;                                                             // rsp_demux_008:sink_ready -> router_010:src_ready
	wire   [20:0] router_010_src_channel;                                                           // router_010:src_channel -> rsp_demux_008:sink_channel
	wire          router_010_src_startofpacket;                                                     // router_010:src_startofpacket -> rsp_demux_008:sink_startofpacket
	wire          router_010_src_endofpacket;                                                       // router_010:src_endofpacket -> rsp_demux_008:sink_endofpacket
	wire          board_info_core_voltage_s1_agent_rp_valid;                                        // board_info_core_voltage_s1_agent:rp_valid -> router_011:sink_valid
	wire  [122:0] board_info_core_voltage_s1_agent_rp_data;                                         // board_info_core_voltage_s1_agent:rp_data -> router_011:sink_data
	wire          board_info_core_voltage_s1_agent_rp_ready;                                        // router_011:sink_ready -> board_info_core_voltage_s1_agent:rp_ready
	wire          board_info_core_voltage_s1_agent_rp_startofpacket;                                // board_info_core_voltage_s1_agent:rp_startofpacket -> router_011:sink_startofpacket
	wire          board_info_core_voltage_s1_agent_rp_endofpacket;                                  // board_info_core_voltage_s1_agent:rp_endofpacket -> router_011:sink_endofpacket
	wire          router_011_src_valid;                                                             // router_011:src_valid -> rsp_demux_009:sink_valid
	wire  [122:0] router_011_src_data;                                                              // router_011:src_data -> rsp_demux_009:sink_data
	wire          router_011_src_ready;                                                             // rsp_demux_009:sink_ready -> router_011:src_ready
	wire   [20:0] router_011_src_channel;                                                           // router_011:src_channel -> rsp_demux_009:sink_channel
	wire          router_011_src_startofpacket;                                                     // router_011:src_startofpacket -> rsp_demux_009:sink_startofpacket
	wire          router_011_src_endofpacket;                                                       // router_011:src_endofpacket -> rsp_demux_009:sink_endofpacket
	wire          board_info_power_in_current_s1_agent_rp_valid;                                    // board_info_power_in_current_s1_agent:rp_valid -> router_012:sink_valid
	wire  [122:0] board_info_power_in_current_s1_agent_rp_data;                                     // board_info_power_in_current_s1_agent:rp_data -> router_012:sink_data
	wire          board_info_power_in_current_s1_agent_rp_ready;                                    // router_012:sink_ready -> board_info_power_in_current_s1_agent:rp_ready
	wire          board_info_power_in_current_s1_agent_rp_startofpacket;                            // board_info_power_in_current_s1_agent:rp_startofpacket -> router_012:sink_startofpacket
	wire          board_info_power_in_current_s1_agent_rp_endofpacket;                              // board_info_power_in_current_s1_agent:rp_endofpacket -> router_012:sink_endofpacket
	wire          router_012_src_valid;                                                             // router_012:src_valid -> rsp_demux_010:sink_valid
	wire  [122:0] router_012_src_data;                                                              // router_012:src_data -> rsp_demux_010:sink_data
	wire          router_012_src_ready;                                                             // rsp_demux_010:sink_ready -> router_012:src_ready
	wire   [20:0] router_012_src_channel;                                                           // router_012:src_channel -> rsp_demux_010:sink_channel
	wire          router_012_src_startofpacket;                                                     // router_012:src_startofpacket -> rsp_demux_010:sink_startofpacket
	wire          router_012_src_endofpacket;                                                       // router_012:src_endofpacket -> rsp_demux_010:sink_endofpacket
	wire          board_info_power_in_voltage_s1_agent_rp_valid;                                    // board_info_power_in_voltage_s1_agent:rp_valid -> router_013:sink_valid
	wire  [122:0] board_info_power_in_voltage_s1_agent_rp_data;                                     // board_info_power_in_voltage_s1_agent:rp_data -> router_013:sink_data
	wire          board_info_power_in_voltage_s1_agent_rp_ready;                                    // router_013:sink_ready -> board_info_power_in_voltage_s1_agent:rp_ready
	wire          board_info_power_in_voltage_s1_agent_rp_startofpacket;                            // board_info_power_in_voltage_s1_agent:rp_startofpacket -> router_013:sink_startofpacket
	wire          board_info_power_in_voltage_s1_agent_rp_endofpacket;                              // board_info_power_in_voltage_s1_agent:rp_endofpacket -> router_013:sink_endofpacket
	wire          router_013_src_valid;                                                             // router_013:src_valid -> rsp_demux_011:sink_valid
	wire  [122:0] router_013_src_data;                                                              // router_013:src_data -> rsp_demux_011:sink_data
	wire          router_013_src_ready;                                                             // rsp_demux_011:sink_ready -> router_013:src_ready
	wire   [20:0] router_013_src_channel;                                                           // router_013:src_channel -> rsp_demux_011:sink_channel
	wire          router_013_src_startofpacket;                                                     // router_013:src_startofpacket -> rsp_demux_011:sink_startofpacket
	wire          router_013_src_endofpacket;                                                       // router_013:src_endofpacket -> rsp_demux_011:sink_endofpacket
	wire          board_info_pin_status_s1_agent_rp_valid;                                          // board_info_pin_status_s1_agent:rp_valid -> router_014:sink_valid
	wire  [122:0] board_info_pin_status_s1_agent_rp_data;                                           // board_info_pin_status_s1_agent:rp_data -> router_014:sink_data
	wire          board_info_pin_status_s1_agent_rp_ready;                                          // router_014:sink_ready -> board_info_pin_status_s1_agent:rp_ready
	wire          board_info_pin_status_s1_agent_rp_startofpacket;                                  // board_info_pin_status_s1_agent:rp_startofpacket -> router_014:sink_startofpacket
	wire          board_info_pin_status_s1_agent_rp_endofpacket;                                    // board_info_pin_status_s1_agent:rp_endofpacket -> router_014:sink_endofpacket
	wire          router_014_src_valid;                                                             // router_014:src_valid -> rsp_demux_012:sink_valid
	wire  [122:0] router_014_src_data;                                                              // router_014:src_data -> rsp_demux_012:sink_data
	wire          router_014_src_ready;                                                             // rsp_demux_012:sink_ready -> router_014:src_ready
	wire   [20:0] router_014_src_channel;                                                           // router_014:src_channel -> rsp_demux_012:sink_channel
	wire          router_014_src_startofpacket;                                                     // router_014:src_startofpacket -> rsp_demux_012:sink_startofpacket
	wire          router_014_src_endofpacket;                                                       // router_014:src_endofpacket -> rsp_demux_012:sink_endofpacket
	wire          board_info_temperature_sdm_s1_agent_rp_valid;                                     // board_info_temperature_sdm_s1_agent:rp_valid -> router_015:sink_valid
	wire  [122:0] board_info_temperature_sdm_s1_agent_rp_data;                                      // board_info_temperature_sdm_s1_agent:rp_data -> router_015:sink_data
	wire          board_info_temperature_sdm_s1_agent_rp_ready;                                     // router_015:sink_ready -> board_info_temperature_sdm_s1_agent:rp_ready
	wire          board_info_temperature_sdm_s1_agent_rp_startofpacket;                             // board_info_temperature_sdm_s1_agent:rp_startofpacket -> router_015:sink_startofpacket
	wire          board_info_temperature_sdm_s1_agent_rp_endofpacket;                               // board_info_temperature_sdm_s1_agent:rp_endofpacket -> router_015:sink_endofpacket
	wire          router_015_src_valid;                                                             // router_015:src_valid -> rsp_demux_013:sink_valid
	wire  [122:0] router_015_src_data;                                                              // router_015:src_data -> rsp_demux_013:sink_data
	wire          router_015_src_ready;                                                             // rsp_demux_013:sink_ready -> router_015:src_ready
	wire   [20:0] router_015_src_channel;                                                           // router_015:src_channel -> rsp_demux_013:sink_channel
	wire          router_015_src_startofpacket;                                                     // router_015:src_startofpacket -> rsp_demux_013:sink_startofpacket
	wire          router_015_src_endofpacket;                                                       // router_015:src_endofpacket -> rsp_demux_013:sink_endofpacket
	wire          board_info_temperature_xcvr1_s1_agent_rp_valid;                                   // board_info_temperature_xcvr1_s1_agent:rp_valid -> router_016:sink_valid
	wire  [122:0] board_info_temperature_xcvr1_s1_agent_rp_data;                                    // board_info_temperature_xcvr1_s1_agent:rp_data -> router_016:sink_data
	wire          board_info_temperature_xcvr1_s1_agent_rp_ready;                                   // router_016:sink_ready -> board_info_temperature_xcvr1_s1_agent:rp_ready
	wire          board_info_temperature_xcvr1_s1_agent_rp_startofpacket;                           // board_info_temperature_xcvr1_s1_agent:rp_startofpacket -> router_016:sink_startofpacket
	wire          board_info_temperature_xcvr1_s1_agent_rp_endofpacket;                             // board_info_temperature_xcvr1_s1_agent:rp_endofpacket -> router_016:sink_endofpacket
	wire          router_016_src_valid;                                                             // router_016:src_valid -> rsp_demux_014:sink_valid
	wire  [122:0] router_016_src_data;                                                              // router_016:src_data -> rsp_demux_014:sink_data
	wire          router_016_src_ready;                                                             // rsp_demux_014:sink_ready -> router_016:src_ready
	wire   [20:0] router_016_src_channel;                                                           // router_016:src_channel -> rsp_demux_014:sink_channel
	wire          router_016_src_startofpacket;                                                     // router_016:src_startofpacket -> rsp_demux_014:sink_startofpacket
	wire          router_016_src_endofpacket;                                                       // router_016:src_endofpacket -> rsp_demux_014:sink_endofpacket
	wire          board_info_temperature_board2_s1_agent_rp_valid;                                  // board_info_temperature_board2_s1_agent:rp_valid -> router_017:sink_valid
	wire  [122:0] board_info_temperature_board2_s1_agent_rp_data;                                   // board_info_temperature_board2_s1_agent:rp_data -> router_017:sink_data
	wire          board_info_temperature_board2_s1_agent_rp_ready;                                  // router_017:sink_ready -> board_info_temperature_board2_s1_agent:rp_ready
	wire          board_info_temperature_board2_s1_agent_rp_startofpacket;                          // board_info_temperature_board2_s1_agent:rp_startofpacket -> router_017:sink_startofpacket
	wire          board_info_temperature_board2_s1_agent_rp_endofpacket;                            // board_info_temperature_board2_s1_agent:rp_endofpacket -> router_017:sink_endofpacket
	wire          router_017_src_valid;                                                             // router_017:src_valid -> rsp_demux_015:sink_valid
	wire  [122:0] router_017_src_data;                                                              // router_017:src_data -> rsp_demux_015:sink_data
	wire          router_017_src_ready;                                                             // rsp_demux_015:sink_ready -> router_017:src_ready
	wire   [20:0] router_017_src_channel;                                                           // router_017:src_channel -> rsp_demux_015:sink_channel
	wire          router_017_src_startofpacket;                                                     // router_017:src_startofpacket -> rsp_demux_015:sink_startofpacket
	wire          router_017_src_endofpacket;                                                       // router_017:src_endofpacket -> rsp_demux_015:sink_endofpacket
	wire          board_info_temperature_xcvr2_s1_agent_rp_valid;                                   // board_info_temperature_xcvr2_s1_agent:rp_valid -> router_018:sink_valid
	wire  [122:0] board_info_temperature_xcvr2_s1_agent_rp_data;                                    // board_info_temperature_xcvr2_s1_agent:rp_data -> router_018:sink_data
	wire          board_info_temperature_xcvr2_s1_agent_rp_ready;                                   // router_018:sink_ready -> board_info_temperature_xcvr2_s1_agent:rp_ready
	wire          board_info_temperature_xcvr2_s1_agent_rp_startofpacket;                           // board_info_temperature_xcvr2_s1_agent:rp_startofpacket -> router_018:sink_startofpacket
	wire          board_info_temperature_xcvr2_s1_agent_rp_endofpacket;                             // board_info_temperature_xcvr2_s1_agent:rp_endofpacket -> router_018:sink_endofpacket
	wire          router_018_src_valid;                                                             // router_018:src_valid -> rsp_demux_016:sink_valid
	wire  [122:0] router_018_src_data;                                                              // router_018:src_data -> rsp_demux_016:sink_data
	wire          router_018_src_ready;                                                             // rsp_demux_016:sink_ready -> router_018:src_ready
	wire   [20:0] router_018_src_channel;                                                           // router_018:src_channel -> rsp_demux_016:sink_channel
	wire          router_018_src_startofpacket;                                                     // router_018:src_startofpacket -> rsp_demux_016:sink_startofpacket
	wire          router_018_src_endofpacket;                                                       // router_018:src_endofpacket -> rsp_demux_016:sink_endofpacket
	wire          timer_s1_agent_rp_valid;                                                          // timer_s1_agent:rp_valid -> router_019:sink_valid
	wire  [122:0] timer_s1_agent_rp_data;                                                           // timer_s1_agent:rp_data -> router_019:sink_data
	wire          timer_s1_agent_rp_ready;                                                          // router_019:sink_ready -> timer_s1_agent:rp_ready
	wire          timer_s1_agent_rp_startofpacket;                                                  // timer_s1_agent:rp_startofpacket -> router_019:sink_startofpacket
	wire          timer_s1_agent_rp_endofpacket;                                                    // timer_s1_agent:rp_endofpacket -> router_019:sink_endofpacket
	wire          router_019_src_valid;                                                             // router_019:src_valid -> rsp_demux_017:sink_valid
	wire  [122:0] router_019_src_data;                                                              // router_019:src_data -> rsp_demux_017:sink_data
	wire          router_019_src_ready;                                                             // rsp_demux_017:sink_ready -> router_019:src_ready
	wire   [20:0] router_019_src_channel;                                                           // router_019:src_channel -> rsp_demux_017:sink_channel
	wire          router_019_src_startofpacket;                                                     // router_019:src_startofpacket -> rsp_demux_017:sink_startofpacket
	wire          router_019_src_endofpacket;                                                       // router_019:src_endofpacket -> rsp_demux_017:sink_endofpacket
	wire          board_info_temperature_power_s1_agent_rp_valid;                                   // board_info_temperature_power_s1_agent:rp_valid -> router_020:sink_valid
	wire  [122:0] board_info_temperature_power_s1_agent_rp_data;                                    // board_info_temperature_power_s1_agent:rp_data -> router_020:sink_data
	wire          board_info_temperature_power_s1_agent_rp_ready;                                   // router_020:sink_ready -> board_info_temperature_power_s1_agent:rp_ready
	wire          board_info_temperature_power_s1_agent_rp_startofpacket;                           // board_info_temperature_power_s1_agent:rp_startofpacket -> router_020:sink_startofpacket
	wire          board_info_temperature_power_s1_agent_rp_endofpacket;                             // board_info_temperature_power_s1_agent:rp_endofpacket -> router_020:sink_endofpacket
	wire          router_020_src_valid;                                                             // router_020:src_valid -> rsp_demux_018:sink_valid
	wire  [122:0] router_020_src_data;                                                              // router_020:src_data -> rsp_demux_018:sink_data
	wire          router_020_src_ready;                                                             // rsp_demux_018:sink_ready -> router_020:src_ready
	wire   [20:0] router_020_src_channel;                                                           // router_020:src_channel -> rsp_demux_018:sink_channel
	wire          router_020_src_startofpacket;                                                     // router_020:src_startofpacket -> rsp_demux_018:sink_startofpacket
	wire          router_020_src_endofpacket;                                                       // router_020:src_endofpacket -> rsp_demux_018:sink_endofpacket
	wire          board_info_temperature_board3_s1_agent_rp_valid;                                  // board_info_temperature_board3_s1_agent:rp_valid -> router_021:sink_valid
	wire  [122:0] board_info_temperature_board3_s1_agent_rp_data;                                   // board_info_temperature_board3_s1_agent:rp_data -> router_021:sink_data
	wire          board_info_temperature_board3_s1_agent_rp_ready;                                  // router_021:sink_ready -> board_info_temperature_board3_s1_agent:rp_ready
	wire          board_info_temperature_board3_s1_agent_rp_startofpacket;                          // board_info_temperature_board3_s1_agent:rp_startofpacket -> router_021:sink_startofpacket
	wire          board_info_temperature_board3_s1_agent_rp_endofpacket;                            // board_info_temperature_board3_s1_agent:rp_endofpacket -> router_021:sink_endofpacket
	wire          router_021_src_valid;                                                             // router_021:src_valid -> rsp_demux_019:sink_valid
	wire  [122:0] router_021_src_data;                                                              // router_021:src_data -> rsp_demux_019:sink_data
	wire          router_021_src_ready;                                                             // rsp_demux_019:sink_ready -> router_021:src_ready
	wire   [20:0] router_021_src_channel;                                                           // router_021:src_channel -> rsp_demux_019:sink_channel
	wire          router_021_src_startofpacket;                                                     // router_021:src_startofpacket -> rsp_demux_019:sink_startofpacket
	wire          router_021_src_endofpacket;                                                       // router_021:src_endofpacket -> rsp_demux_019:sink_endofpacket
	wire          board_info_temperature_xcvr3_s1_agent_rp_valid;                                   // board_info_temperature_xcvr3_s1_agent:rp_valid -> router_022:sink_valid
	wire  [122:0] board_info_temperature_xcvr3_s1_agent_rp_data;                                    // board_info_temperature_xcvr3_s1_agent:rp_data -> router_022:sink_data
	wire          board_info_temperature_xcvr3_s1_agent_rp_ready;                                   // router_022:sink_ready -> board_info_temperature_xcvr3_s1_agent:rp_ready
	wire          board_info_temperature_xcvr3_s1_agent_rp_startofpacket;                           // board_info_temperature_xcvr3_s1_agent:rp_startofpacket -> router_022:sink_startofpacket
	wire          board_info_temperature_xcvr3_s1_agent_rp_endofpacket;                             // board_info_temperature_xcvr3_s1_agent:rp_endofpacket -> router_022:sink_endofpacket
	wire          router_022_src_valid;                                                             // router_022:src_valid -> rsp_demux_020:sink_valid
	wire  [122:0] router_022_src_data;                                                              // router_022:src_data -> rsp_demux_020:sink_data
	wire          router_022_src_ready;                                                             // rsp_demux_020:sink_ready -> router_022:src_ready
	wire   [20:0] router_022_src_channel;                                                           // router_022:src_channel -> rsp_demux_020:sink_channel
	wire          router_022_src_startofpacket;                                                     // router_022:src_startofpacket -> rsp_demux_020:sink_startofpacket
	wire          router_022_src_endofpacket;                                                       // router_022:src_endofpacket -> rsp_demux_020:sink_endofpacket
	wire          router_src_valid;                                                                 // router:src_valid -> nios2_gen2_data_master_limiter:cmd_sink_valid
	wire  [122:0] router_src_data;                                                                  // router:src_data -> nios2_gen2_data_master_limiter:cmd_sink_data
	wire          router_src_ready;                                                                 // nios2_gen2_data_master_limiter:cmd_sink_ready -> router:src_ready
	wire   [20:0] router_src_channel;                                                               // router:src_channel -> nios2_gen2_data_master_limiter:cmd_sink_channel
	wire          router_src_startofpacket;                                                         // router:src_startofpacket -> nios2_gen2_data_master_limiter:cmd_sink_startofpacket
	wire          router_src_endofpacket;                                                           // router:src_endofpacket -> nios2_gen2_data_master_limiter:cmd_sink_endofpacket
	wire  [122:0] nios2_gen2_data_master_limiter_cmd_src_data;                                      // nios2_gen2_data_master_limiter:cmd_src_data -> cmd_demux:sink_data
	wire          nios2_gen2_data_master_limiter_cmd_src_ready;                                     // cmd_demux:sink_ready -> nios2_gen2_data_master_limiter:cmd_src_ready
	wire   [20:0] nios2_gen2_data_master_limiter_cmd_src_channel;                                   // nios2_gen2_data_master_limiter:cmd_src_channel -> cmd_demux:sink_channel
	wire          nios2_gen2_data_master_limiter_cmd_src_startofpacket;                             // nios2_gen2_data_master_limiter:cmd_src_startofpacket -> cmd_demux:sink_startofpacket
	wire          nios2_gen2_data_master_limiter_cmd_src_endofpacket;                               // nios2_gen2_data_master_limiter:cmd_src_endofpacket -> cmd_demux:sink_endofpacket
	wire          rsp_mux_src_valid;                                                                // rsp_mux:src_valid -> nios2_gen2_data_master_limiter:rsp_sink_valid
	wire  [122:0] rsp_mux_src_data;                                                                 // rsp_mux:src_data -> nios2_gen2_data_master_limiter:rsp_sink_data
	wire          rsp_mux_src_ready;                                                                // nios2_gen2_data_master_limiter:rsp_sink_ready -> rsp_mux:src_ready
	wire   [20:0] rsp_mux_src_channel;                                                              // rsp_mux:src_channel -> nios2_gen2_data_master_limiter:rsp_sink_channel
	wire          rsp_mux_src_startofpacket;                                                        // rsp_mux:src_startofpacket -> nios2_gen2_data_master_limiter:rsp_sink_startofpacket
	wire          rsp_mux_src_endofpacket;                                                          // rsp_mux:src_endofpacket -> nios2_gen2_data_master_limiter:rsp_sink_endofpacket
	wire          nios2_gen2_data_master_limiter_rsp_src_valid;                                     // nios2_gen2_data_master_limiter:rsp_src_valid -> nios2_gen2_data_master_agent:rp_valid
	wire  [122:0] nios2_gen2_data_master_limiter_rsp_src_data;                                      // nios2_gen2_data_master_limiter:rsp_src_data -> nios2_gen2_data_master_agent:rp_data
	wire          nios2_gen2_data_master_limiter_rsp_src_ready;                                     // nios2_gen2_data_master_agent:rp_ready -> nios2_gen2_data_master_limiter:rsp_src_ready
	wire   [20:0] nios2_gen2_data_master_limiter_rsp_src_channel;                                   // nios2_gen2_data_master_limiter:rsp_src_channel -> nios2_gen2_data_master_agent:rp_channel
	wire          nios2_gen2_data_master_limiter_rsp_src_startofpacket;                             // nios2_gen2_data_master_limiter:rsp_src_startofpacket -> nios2_gen2_data_master_agent:rp_startofpacket
	wire          nios2_gen2_data_master_limiter_rsp_src_endofpacket;                               // nios2_gen2_data_master_limiter:rsp_src_endofpacket -> nios2_gen2_data_master_agent:rp_endofpacket
	wire          router_001_src_valid;                                                             // router_001:src_valid -> nios2_gen2_instruction_master_limiter:cmd_sink_valid
	wire  [122:0] router_001_src_data;                                                              // router_001:src_data -> nios2_gen2_instruction_master_limiter:cmd_sink_data
	wire          router_001_src_ready;                                                             // nios2_gen2_instruction_master_limiter:cmd_sink_ready -> router_001:src_ready
	wire   [20:0] router_001_src_channel;                                                           // router_001:src_channel -> nios2_gen2_instruction_master_limiter:cmd_sink_channel
	wire          router_001_src_startofpacket;                                                     // router_001:src_startofpacket -> nios2_gen2_instruction_master_limiter:cmd_sink_startofpacket
	wire          router_001_src_endofpacket;                                                       // router_001:src_endofpacket -> nios2_gen2_instruction_master_limiter:cmd_sink_endofpacket
	wire  [122:0] nios2_gen2_instruction_master_limiter_cmd_src_data;                               // nios2_gen2_instruction_master_limiter:cmd_src_data -> cmd_demux_001:sink_data
	wire          nios2_gen2_instruction_master_limiter_cmd_src_ready;                              // cmd_demux_001:sink_ready -> nios2_gen2_instruction_master_limiter:cmd_src_ready
	wire   [20:0] nios2_gen2_instruction_master_limiter_cmd_src_channel;                            // nios2_gen2_instruction_master_limiter:cmd_src_channel -> cmd_demux_001:sink_channel
	wire          nios2_gen2_instruction_master_limiter_cmd_src_startofpacket;                      // nios2_gen2_instruction_master_limiter:cmd_src_startofpacket -> cmd_demux_001:sink_startofpacket
	wire          nios2_gen2_instruction_master_limiter_cmd_src_endofpacket;                        // nios2_gen2_instruction_master_limiter:cmd_src_endofpacket -> cmd_demux_001:sink_endofpacket
	wire          rsp_mux_001_src_valid;                                                            // rsp_mux_001:src_valid -> nios2_gen2_instruction_master_limiter:rsp_sink_valid
	wire  [122:0] rsp_mux_001_src_data;                                                             // rsp_mux_001:src_data -> nios2_gen2_instruction_master_limiter:rsp_sink_data
	wire          rsp_mux_001_src_ready;                                                            // nios2_gen2_instruction_master_limiter:rsp_sink_ready -> rsp_mux_001:src_ready
	wire   [20:0] rsp_mux_001_src_channel;                                                          // rsp_mux_001:src_channel -> nios2_gen2_instruction_master_limiter:rsp_sink_channel
	wire          rsp_mux_001_src_startofpacket;                                                    // rsp_mux_001:src_startofpacket -> nios2_gen2_instruction_master_limiter:rsp_sink_startofpacket
	wire          rsp_mux_001_src_endofpacket;                                                      // rsp_mux_001:src_endofpacket -> nios2_gen2_instruction_master_limiter:rsp_sink_endofpacket
	wire          nios2_gen2_instruction_master_limiter_rsp_src_valid;                              // nios2_gen2_instruction_master_limiter:rsp_src_valid -> nios2_gen2_instruction_master_agent:rp_valid
	wire  [122:0] nios2_gen2_instruction_master_limiter_rsp_src_data;                               // nios2_gen2_instruction_master_limiter:rsp_src_data -> nios2_gen2_instruction_master_agent:rp_data
	wire          nios2_gen2_instruction_master_limiter_rsp_src_ready;                              // nios2_gen2_instruction_master_agent:rp_ready -> nios2_gen2_instruction_master_limiter:rsp_src_ready
	wire   [20:0] nios2_gen2_instruction_master_limiter_rsp_src_channel;                            // nios2_gen2_instruction_master_limiter:rsp_src_channel -> nios2_gen2_instruction_master_agent:rp_channel
	wire          nios2_gen2_instruction_master_limiter_rsp_src_startofpacket;                      // nios2_gen2_instruction_master_limiter:rsp_src_startofpacket -> nios2_gen2_instruction_master_agent:rp_startofpacket
	wire          nios2_gen2_instruction_master_limiter_rsp_src_endofpacket;                        // nios2_gen2_instruction_master_limiter:rsp_src_endofpacket -> nios2_gen2_instruction_master_agent:rp_endofpacket
	wire          cmd_demux_src0_valid;                                                             // cmd_demux:src0_valid -> cmd_mux:sink0_valid
	wire  [122:0] cmd_demux_src0_data;                                                              // cmd_demux:src0_data -> cmd_mux:sink0_data
	wire          cmd_demux_src0_ready;                                                             // cmd_mux:sink0_ready -> cmd_demux:src0_ready
	wire   [20:0] cmd_demux_src0_channel;                                                           // cmd_demux:src0_channel -> cmd_mux:sink0_channel
	wire          cmd_demux_src0_startofpacket;                                                     // cmd_demux:src0_startofpacket -> cmd_mux:sink0_startofpacket
	wire          cmd_demux_src0_endofpacket;                                                       // cmd_demux:src0_endofpacket -> cmd_mux:sink0_endofpacket
	wire          cmd_demux_src1_valid;                                                             // cmd_demux:src1_valid -> cmd_mux_001:sink0_valid
	wire  [122:0] cmd_demux_src1_data;                                                              // cmd_demux:src1_data -> cmd_mux_001:sink0_data
	wire          cmd_demux_src1_ready;                                                             // cmd_mux_001:sink0_ready -> cmd_demux:src1_ready
	wire   [20:0] cmd_demux_src1_channel;                                                           // cmd_demux:src1_channel -> cmd_mux_001:sink0_channel
	wire          cmd_demux_src1_startofpacket;                                                     // cmd_demux:src1_startofpacket -> cmd_mux_001:sink0_startofpacket
	wire          cmd_demux_src1_endofpacket;                                                       // cmd_demux:src1_endofpacket -> cmd_mux_001:sink0_endofpacket
	wire          cmd_demux_src2_valid;                                                             // cmd_demux:src2_valid -> cmd_mux_002:sink0_valid
	wire  [122:0] cmd_demux_src2_data;                                                              // cmd_demux:src2_data -> cmd_mux_002:sink0_data
	wire          cmd_demux_src2_ready;                                                             // cmd_mux_002:sink0_ready -> cmd_demux:src2_ready
	wire   [20:0] cmd_demux_src2_channel;                                                           // cmd_demux:src2_channel -> cmd_mux_002:sink0_channel
	wire          cmd_demux_src2_startofpacket;                                                     // cmd_demux:src2_startofpacket -> cmd_mux_002:sink0_startofpacket
	wire          cmd_demux_src2_endofpacket;                                                       // cmd_demux:src2_endofpacket -> cmd_mux_002:sink0_endofpacket
	wire          cmd_demux_src3_valid;                                                             // cmd_demux:src3_valid -> cmd_mux_003:sink0_valid
	wire  [122:0] cmd_demux_src3_data;                                                              // cmd_demux:src3_data -> cmd_mux_003:sink0_data
	wire          cmd_demux_src3_ready;                                                             // cmd_mux_003:sink0_ready -> cmd_demux:src3_ready
	wire   [20:0] cmd_demux_src3_channel;                                                           // cmd_demux:src3_channel -> cmd_mux_003:sink0_channel
	wire          cmd_demux_src3_startofpacket;                                                     // cmd_demux:src3_startofpacket -> cmd_mux_003:sink0_startofpacket
	wire          cmd_demux_src3_endofpacket;                                                       // cmd_demux:src3_endofpacket -> cmd_mux_003:sink0_endofpacket
	wire          cmd_demux_src4_valid;                                                             // cmd_demux:src4_valid -> cmd_mux_004:sink0_valid
	wire  [122:0] cmd_demux_src4_data;                                                              // cmd_demux:src4_data -> cmd_mux_004:sink0_data
	wire          cmd_demux_src4_ready;                                                             // cmd_mux_004:sink0_ready -> cmd_demux:src4_ready
	wire   [20:0] cmd_demux_src4_channel;                                                           // cmd_demux:src4_channel -> cmd_mux_004:sink0_channel
	wire          cmd_demux_src4_startofpacket;                                                     // cmd_demux:src4_startofpacket -> cmd_mux_004:sink0_startofpacket
	wire          cmd_demux_src4_endofpacket;                                                       // cmd_demux:src4_endofpacket -> cmd_mux_004:sink0_endofpacket
	wire          cmd_demux_src5_valid;                                                             // cmd_demux:src5_valid -> cmd_mux_005:sink0_valid
	wire  [122:0] cmd_demux_src5_data;                                                              // cmd_demux:src5_data -> cmd_mux_005:sink0_data
	wire          cmd_demux_src5_ready;                                                             // cmd_mux_005:sink0_ready -> cmd_demux:src5_ready
	wire   [20:0] cmd_demux_src5_channel;                                                           // cmd_demux:src5_channel -> cmd_mux_005:sink0_channel
	wire          cmd_demux_src5_startofpacket;                                                     // cmd_demux:src5_startofpacket -> cmd_mux_005:sink0_startofpacket
	wire          cmd_demux_src5_endofpacket;                                                       // cmd_demux:src5_endofpacket -> cmd_mux_005:sink0_endofpacket
	wire          cmd_demux_src6_valid;                                                             // cmd_demux:src6_valid -> cmd_mux_006:sink0_valid
	wire  [122:0] cmd_demux_src6_data;                                                              // cmd_demux:src6_data -> cmd_mux_006:sink0_data
	wire          cmd_demux_src6_ready;                                                             // cmd_mux_006:sink0_ready -> cmd_demux:src6_ready
	wire   [20:0] cmd_demux_src6_channel;                                                           // cmd_demux:src6_channel -> cmd_mux_006:sink0_channel
	wire          cmd_demux_src6_startofpacket;                                                     // cmd_demux:src6_startofpacket -> cmd_mux_006:sink0_startofpacket
	wire          cmd_demux_src6_endofpacket;                                                       // cmd_demux:src6_endofpacket -> cmd_mux_006:sink0_endofpacket
	wire          cmd_demux_src7_valid;                                                             // cmd_demux:src7_valid -> cmd_mux_007:sink0_valid
	wire  [122:0] cmd_demux_src7_data;                                                              // cmd_demux:src7_data -> cmd_mux_007:sink0_data
	wire          cmd_demux_src7_ready;                                                             // cmd_mux_007:sink0_ready -> cmd_demux:src7_ready
	wire   [20:0] cmd_demux_src7_channel;                                                           // cmd_demux:src7_channel -> cmd_mux_007:sink0_channel
	wire          cmd_demux_src7_startofpacket;                                                     // cmd_demux:src7_startofpacket -> cmd_mux_007:sink0_startofpacket
	wire          cmd_demux_src7_endofpacket;                                                       // cmd_demux:src7_endofpacket -> cmd_mux_007:sink0_endofpacket
	wire          cmd_demux_src8_valid;                                                             // cmd_demux:src8_valid -> cmd_mux_008:sink0_valid
	wire  [122:0] cmd_demux_src8_data;                                                              // cmd_demux:src8_data -> cmd_mux_008:sink0_data
	wire          cmd_demux_src8_ready;                                                             // cmd_mux_008:sink0_ready -> cmd_demux:src8_ready
	wire   [20:0] cmd_demux_src8_channel;                                                           // cmd_demux:src8_channel -> cmd_mux_008:sink0_channel
	wire          cmd_demux_src8_startofpacket;                                                     // cmd_demux:src8_startofpacket -> cmd_mux_008:sink0_startofpacket
	wire          cmd_demux_src8_endofpacket;                                                       // cmd_demux:src8_endofpacket -> cmd_mux_008:sink0_endofpacket
	wire          cmd_demux_src9_valid;                                                             // cmd_demux:src9_valid -> cmd_mux_009:sink0_valid
	wire  [122:0] cmd_demux_src9_data;                                                              // cmd_demux:src9_data -> cmd_mux_009:sink0_data
	wire          cmd_demux_src9_ready;                                                             // cmd_mux_009:sink0_ready -> cmd_demux:src9_ready
	wire   [20:0] cmd_demux_src9_channel;                                                           // cmd_demux:src9_channel -> cmd_mux_009:sink0_channel
	wire          cmd_demux_src9_startofpacket;                                                     // cmd_demux:src9_startofpacket -> cmd_mux_009:sink0_startofpacket
	wire          cmd_demux_src9_endofpacket;                                                       // cmd_demux:src9_endofpacket -> cmd_mux_009:sink0_endofpacket
	wire          cmd_demux_src10_valid;                                                            // cmd_demux:src10_valid -> cmd_mux_010:sink0_valid
	wire  [122:0] cmd_demux_src10_data;                                                             // cmd_demux:src10_data -> cmd_mux_010:sink0_data
	wire          cmd_demux_src10_ready;                                                            // cmd_mux_010:sink0_ready -> cmd_demux:src10_ready
	wire   [20:0] cmd_demux_src10_channel;                                                          // cmd_demux:src10_channel -> cmd_mux_010:sink0_channel
	wire          cmd_demux_src10_startofpacket;                                                    // cmd_demux:src10_startofpacket -> cmd_mux_010:sink0_startofpacket
	wire          cmd_demux_src10_endofpacket;                                                      // cmd_demux:src10_endofpacket -> cmd_mux_010:sink0_endofpacket
	wire          cmd_demux_src11_valid;                                                            // cmd_demux:src11_valid -> cmd_mux_011:sink0_valid
	wire  [122:0] cmd_demux_src11_data;                                                             // cmd_demux:src11_data -> cmd_mux_011:sink0_data
	wire          cmd_demux_src11_ready;                                                            // cmd_mux_011:sink0_ready -> cmd_demux:src11_ready
	wire   [20:0] cmd_demux_src11_channel;                                                          // cmd_demux:src11_channel -> cmd_mux_011:sink0_channel
	wire          cmd_demux_src11_startofpacket;                                                    // cmd_demux:src11_startofpacket -> cmd_mux_011:sink0_startofpacket
	wire          cmd_demux_src11_endofpacket;                                                      // cmd_demux:src11_endofpacket -> cmd_mux_011:sink0_endofpacket
	wire          cmd_demux_src12_valid;                                                            // cmd_demux:src12_valid -> cmd_mux_012:sink0_valid
	wire  [122:0] cmd_demux_src12_data;                                                             // cmd_demux:src12_data -> cmd_mux_012:sink0_data
	wire          cmd_demux_src12_ready;                                                            // cmd_mux_012:sink0_ready -> cmd_demux:src12_ready
	wire   [20:0] cmd_demux_src12_channel;                                                          // cmd_demux:src12_channel -> cmd_mux_012:sink0_channel
	wire          cmd_demux_src12_startofpacket;                                                    // cmd_demux:src12_startofpacket -> cmd_mux_012:sink0_startofpacket
	wire          cmd_demux_src12_endofpacket;                                                      // cmd_demux:src12_endofpacket -> cmd_mux_012:sink0_endofpacket
	wire          cmd_demux_src13_valid;                                                            // cmd_demux:src13_valid -> cmd_mux_013:sink0_valid
	wire  [122:0] cmd_demux_src13_data;                                                             // cmd_demux:src13_data -> cmd_mux_013:sink0_data
	wire          cmd_demux_src13_ready;                                                            // cmd_mux_013:sink0_ready -> cmd_demux:src13_ready
	wire   [20:0] cmd_demux_src13_channel;                                                          // cmd_demux:src13_channel -> cmd_mux_013:sink0_channel
	wire          cmd_demux_src13_startofpacket;                                                    // cmd_demux:src13_startofpacket -> cmd_mux_013:sink0_startofpacket
	wire          cmd_demux_src13_endofpacket;                                                      // cmd_demux:src13_endofpacket -> cmd_mux_013:sink0_endofpacket
	wire          cmd_demux_src14_valid;                                                            // cmd_demux:src14_valid -> cmd_mux_014:sink0_valid
	wire  [122:0] cmd_demux_src14_data;                                                             // cmd_demux:src14_data -> cmd_mux_014:sink0_data
	wire          cmd_demux_src14_ready;                                                            // cmd_mux_014:sink0_ready -> cmd_demux:src14_ready
	wire   [20:0] cmd_demux_src14_channel;                                                          // cmd_demux:src14_channel -> cmd_mux_014:sink0_channel
	wire          cmd_demux_src14_startofpacket;                                                    // cmd_demux:src14_startofpacket -> cmd_mux_014:sink0_startofpacket
	wire          cmd_demux_src14_endofpacket;                                                      // cmd_demux:src14_endofpacket -> cmd_mux_014:sink0_endofpacket
	wire          cmd_demux_src15_valid;                                                            // cmd_demux:src15_valid -> cmd_mux_015:sink0_valid
	wire  [122:0] cmd_demux_src15_data;                                                             // cmd_demux:src15_data -> cmd_mux_015:sink0_data
	wire          cmd_demux_src15_ready;                                                            // cmd_mux_015:sink0_ready -> cmd_demux:src15_ready
	wire   [20:0] cmd_demux_src15_channel;                                                          // cmd_demux:src15_channel -> cmd_mux_015:sink0_channel
	wire          cmd_demux_src15_startofpacket;                                                    // cmd_demux:src15_startofpacket -> cmd_mux_015:sink0_startofpacket
	wire          cmd_demux_src15_endofpacket;                                                      // cmd_demux:src15_endofpacket -> cmd_mux_015:sink0_endofpacket
	wire          cmd_demux_src16_valid;                                                            // cmd_demux:src16_valid -> cmd_mux_016:sink0_valid
	wire  [122:0] cmd_demux_src16_data;                                                             // cmd_demux:src16_data -> cmd_mux_016:sink0_data
	wire          cmd_demux_src16_ready;                                                            // cmd_mux_016:sink0_ready -> cmd_demux:src16_ready
	wire   [20:0] cmd_demux_src16_channel;                                                          // cmd_demux:src16_channel -> cmd_mux_016:sink0_channel
	wire          cmd_demux_src16_startofpacket;                                                    // cmd_demux:src16_startofpacket -> cmd_mux_016:sink0_startofpacket
	wire          cmd_demux_src16_endofpacket;                                                      // cmd_demux:src16_endofpacket -> cmd_mux_016:sink0_endofpacket
	wire          cmd_demux_src17_valid;                                                            // cmd_demux:src17_valid -> cmd_mux_017:sink0_valid
	wire  [122:0] cmd_demux_src17_data;                                                             // cmd_demux:src17_data -> cmd_mux_017:sink0_data
	wire          cmd_demux_src17_ready;                                                            // cmd_mux_017:sink0_ready -> cmd_demux:src17_ready
	wire   [20:0] cmd_demux_src17_channel;                                                          // cmd_demux:src17_channel -> cmd_mux_017:sink0_channel
	wire          cmd_demux_src17_startofpacket;                                                    // cmd_demux:src17_startofpacket -> cmd_mux_017:sink0_startofpacket
	wire          cmd_demux_src17_endofpacket;                                                      // cmd_demux:src17_endofpacket -> cmd_mux_017:sink0_endofpacket
	wire          cmd_demux_src18_valid;                                                            // cmd_demux:src18_valid -> cmd_mux_018:sink0_valid
	wire  [122:0] cmd_demux_src18_data;                                                             // cmd_demux:src18_data -> cmd_mux_018:sink0_data
	wire          cmd_demux_src18_ready;                                                            // cmd_mux_018:sink0_ready -> cmd_demux:src18_ready
	wire   [20:0] cmd_demux_src18_channel;                                                          // cmd_demux:src18_channel -> cmd_mux_018:sink0_channel
	wire          cmd_demux_src18_startofpacket;                                                    // cmd_demux:src18_startofpacket -> cmd_mux_018:sink0_startofpacket
	wire          cmd_demux_src18_endofpacket;                                                      // cmd_demux:src18_endofpacket -> cmd_mux_018:sink0_endofpacket
	wire          cmd_demux_src19_valid;                                                            // cmd_demux:src19_valid -> cmd_mux_019:sink0_valid
	wire  [122:0] cmd_demux_src19_data;                                                             // cmd_demux:src19_data -> cmd_mux_019:sink0_data
	wire          cmd_demux_src19_ready;                                                            // cmd_mux_019:sink0_ready -> cmd_demux:src19_ready
	wire   [20:0] cmd_demux_src19_channel;                                                          // cmd_demux:src19_channel -> cmd_mux_019:sink0_channel
	wire          cmd_demux_src19_startofpacket;                                                    // cmd_demux:src19_startofpacket -> cmd_mux_019:sink0_startofpacket
	wire          cmd_demux_src19_endofpacket;                                                      // cmd_demux:src19_endofpacket -> cmd_mux_019:sink0_endofpacket
	wire          cmd_demux_src20_valid;                                                            // cmd_demux:src20_valid -> cmd_mux_020:sink0_valid
	wire  [122:0] cmd_demux_src20_data;                                                             // cmd_demux:src20_data -> cmd_mux_020:sink0_data
	wire          cmd_demux_src20_ready;                                                            // cmd_mux_020:sink0_ready -> cmd_demux:src20_ready
	wire   [20:0] cmd_demux_src20_channel;                                                          // cmd_demux:src20_channel -> cmd_mux_020:sink0_channel
	wire          cmd_demux_src20_startofpacket;                                                    // cmd_demux:src20_startofpacket -> cmd_mux_020:sink0_startofpacket
	wire          cmd_demux_src20_endofpacket;                                                      // cmd_demux:src20_endofpacket -> cmd_mux_020:sink0_endofpacket
	wire          cmd_demux_001_src0_valid;                                                         // cmd_demux_001:src0_valid -> cmd_mux_002:sink1_valid
	wire  [122:0] cmd_demux_001_src0_data;                                                          // cmd_demux_001:src0_data -> cmd_mux_002:sink1_data
	wire          cmd_demux_001_src0_ready;                                                         // cmd_mux_002:sink1_ready -> cmd_demux_001:src0_ready
	wire   [20:0] cmd_demux_001_src0_channel;                                                       // cmd_demux_001:src0_channel -> cmd_mux_002:sink1_channel
	wire          cmd_demux_001_src0_startofpacket;                                                 // cmd_demux_001:src0_startofpacket -> cmd_mux_002:sink1_startofpacket
	wire          cmd_demux_001_src0_endofpacket;                                                   // cmd_demux_001:src0_endofpacket -> cmd_mux_002:sink1_endofpacket
	wire          cmd_demux_001_src1_valid;                                                         // cmd_demux_001:src1_valid -> cmd_mux_003:sink1_valid
	wire  [122:0] cmd_demux_001_src1_data;                                                          // cmd_demux_001:src1_data -> cmd_mux_003:sink1_data
	wire          cmd_demux_001_src1_ready;                                                         // cmd_mux_003:sink1_ready -> cmd_demux_001:src1_ready
	wire   [20:0] cmd_demux_001_src1_channel;                                                       // cmd_demux_001:src1_channel -> cmd_mux_003:sink1_channel
	wire          cmd_demux_001_src1_startofpacket;                                                 // cmd_demux_001:src1_startofpacket -> cmd_mux_003:sink1_startofpacket
	wire          cmd_demux_001_src1_endofpacket;                                                   // cmd_demux_001:src1_endofpacket -> cmd_mux_003:sink1_endofpacket
	wire          rsp_demux_src0_valid;                                                             // rsp_demux:src0_valid -> rsp_mux:sink0_valid
	wire  [122:0] rsp_demux_src0_data;                                                              // rsp_demux:src0_data -> rsp_mux:sink0_data
	wire          rsp_demux_src0_ready;                                                             // rsp_mux:sink0_ready -> rsp_demux:src0_ready
	wire   [20:0] rsp_demux_src0_channel;                                                           // rsp_demux:src0_channel -> rsp_mux:sink0_channel
	wire          rsp_demux_src0_startofpacket;                                                     // rsp_demux:src0_startofpacket -> rsp_mux:sink0_startofpacket
	wire          rsp_demux_src0_endofpacket;                                                       // rsp_demux:src0_endofpacket -> rsp_mux:sink0_endofpacket
	wire          rsp_demux_001_src0_valid;                                                         // rsp_demux_001:src0_valid -> rsp_mux:sink1_valid
	wire  [122:0] rsp_demux_001_src0_data;                                                          // rsp_demux_001:src0_data -> rsp_mux:sink1_data
	wire          rsp_demux_001_src0_ready;                                                         // rsp_mux:sink1_ready -> rsp_demux_001:src0_ready
	wire   [20:0] rsp_demux_001_src0_channel;                                                       // rsp_demux_001:src0_channel -> rsp_mux:sink1_channel
	wire          rsp_demux_001_src0_startofpacket;                                                 // rsp_demux_001:src0_startofpacket -> rsp_mux:sink1_startofpacket
	wire          rsp_demux_001_src0_endofpacket;                                                   // rsp_demux_001:src0_endofpacket -> rsp_mux:sink1_endofpacket
	wire          rsp_demux_002_src0_valid;                                                         // rsp_demux_002:src0_valid -> rsp_mux:sink2_valid
	wire  [122:0] rsp_demux_002_src0_data;                                                          // rsp_demux_002:src0_data -> rsp_mux:sink2_data
	wire          rsp_demux_002_src0_ready;                                                         // rsp_mux:sink2_ready -> rsp_demux_002:src0_ready
	wire   [20:0] rsp_demux_002_src0_channel;                                                       // rsp_demux_002:src0_channel -> rsp_mux:sink2_channel
	wire          rsp_demux_002_src0_startofpacket;                                                 // rsp_demux_002:src0_startofpacket -> rsp_mux:sink2_startofpacket
	wire          rsp_demux_002_src0_endofpacket;                                                   // rsp_demux_002:src0_endofpacket -> rsp_mux:sink2_endofpacket
	wire          rsp_demux_002_src1_valid;                                                         // rsp_demux_002:src1_valid -> rsp_mux_001:sink0_valid
	wire  [122:0] rsp_demux_002_src1_data;                                                          // rsp_demux_002:src1_data -> rsp_mux_001:sink0_data
	wire          rsp_demux_002_src1_ready;                                                         // rsp_mux_001:sink0_ready -> rsp_demux_002:src1_ready
	wire   [20:0] rsp_demux_002_src1_channel;                                                       // rsp_demux_002:src1_channel -> rsp_mux_001:sink0_channel
	wire          rsp_demux_002_src1_startofpacket;                                                 // rsp_demux_002:src1_startofpacket -> rsp_mux_001:sink0_startofpacket
	wire          rsp_demux_002_src1_endofpacket;                                                   // rsp_demux_002:src1_endofpacket -> rsp_mux_001:sink0_endofpacket
	wire          rsp_demux_003_src0_valid;                                                         // rsp_demux_003:src0_valid -> rsp_mux:sink3_valid
	wire  [122:0] rsp_demux_003_src0_data;                                                          // rsp_demux_003:src0_data -> rsp_mux:sink3_data
	wire          rsp_demux_003_src0_ready;                                                         // rsp_mux:sink3_ready -> rsp_demux_003:src0_ready
	wire   [20:0] rsp_demux_003_src0_channel;                                                       // rsp_demux_003:src0_channel -> rsp_mux:sink3_channel
	wire          rsp_demux_003_src0_startofpacket;                                                 // rsp_demux_003:src0_startofpacket -> rsp_mux:sink3_startofpacket
	wire          rsp_demux_003_src0_endofpacket;                                                   // rsp_demux_003:src0_endofpacket -> rsp_mux:sink3_endofpacket
	wire          rsp_demux_003_src1_valid;                                                         // rsp_demux_003:src1_valid -> rsp_mux_001:sink1_valid
	wire  [122:0] rsp_demux_003_src1_data;                                                          // rsp_demux_003:src1_data -> rsp_mux_001:sink1_data
	wire          rsp_demux_003_src1_ready;                                                         // rsp_mux_001:sink1_ready -> rsp_demux_003:src1_ready
	wire   [20:0] rsp_demux_003_src1_channel;                                                       // rsp_demux_003:src1_channel -> rsp_mux_001:sink1_channel
	wire          rsp_demux_003_src1_startofpacket;                                                 // rsp_demux_003:src1_startofpacket -> rsp_mux_001:sink1_startofpacket
	wire          rsp_demux_003_src1_endofpacket;                                                   // rsp_demux_003:src1_endofpacket -> rsp_mux_001:sink1_endofpacket
	wire          rsp_demux_004_src0_valid;                                                         // rsp_demux_004:src0_valid -> rsp_mux:sink4_valid
	wire  [122:0] rsp_demux_004_src0_data;                                                          // rsp_demux_004:src0_data -> rsp_mux:sink4_data
	wire          rsp_demux_004_src0_ready;                                                         // rsp_mux:sink4_ready -> rsp_demux_004:src0_ready
	wire   [20:0] rsp_demux_004_src0_channel;                                                       // rsp_demux_004:src0_channel -> rsp_mux:sink4_channel
	wire          rsp_demux_004_src0_startofpacket;                                                 // rsp_demux_004:src0_startofpacket -> rsp_mux:sink4_startofpacket
	wire          rsp_demux_004_src0_endofpacket;                                                   // rsp_demux_004:src0_endofpacket -> rsp_mux:sink4_endofpacket
	wire          rsp_demux_005_src0_valid;                                                         // rsp_demux_005:src0_valid -> rsp_mux:sink5_valid
	wire  [122:0] rsp_demux_005_src0_data;                                                          // rsp_demux_005:src0_data -> rsp_mux:sink5_data
	wire          rsp_demux_005_src0_ready;                                                         // rsp_mux:sink5_ready -> rsp_demux_005:src0_ready
	wire   [20:0] rsp_demux_005_src0_channel;                                                       // rsp_demux_005:src0_channel -> rsp_mux:sink5_channel
	wire          rsp_demux_005_src0_startofpacket;                                                 // rsp_demux_005:src0_startofpacket -> rsp_mux:sink5_startofpacket
	wire          rsp_demux_005_src0_endofpacket;                                                   // rsp_demux_005:src0_endofpacket -> rsp_mux:sink5_endofpacket
	wire          rsp_demux_006_src0_valid;                                                         // rsp_demux_006:src0_valid -> rsp_mux:sink6_valid
	wire  [122:0] rsp_demux_006_src0_data;                                                          // rsp_demux_006:src0_data -> rsp_mux:sink6_data
	wire          rsp_demux_006_src0_ready;                                                         // rsp_mux:sink6_ready -> rsp_demux_006:src0_ready
	wire   [20:0] rsp_demux_006_src0_channel;                                                       // rsp_demux_006:src0_channel -> rsp_mux:sink6_channel
	wire          rsp_demux_006_src0_startofpacket;                                                 // rsp_demux_006:src0_startofpacket -> rsp_mux:sink6_startofpacket
	wire          rsp_demux_006_src0_endofpacket;                                                   // rsp_demux_006:src0_endofpacket -> rsp_mux:sink6_endofpacket
	wire          rsp_demux_007_src0_valid;                                                         // rsp_demux_007:src0_valid -> rsp_mux:sink7_valid
	wire  [122:0] rsp_demux_007_src0_data;                                                          // rsp_demux_007:src0_data -> rsp_mux:sink7_data
	wire          rsp_demux_007_src0_ready;                                                         // rsp_mux:sink7_ready -> rsp_demux_007:src0_ready
	wire   [20:0] rsp_demux_007_src0_channel;                                                       // rsp_demux_007:src0_channel -> rsp_mux:sink7_channel
	wire          rsp_demux_007_src0_startofpacket;                                                 // rsp_demux_007:src0_startofpacket -> rsp_mux:sink7_startofpacket
	wire          rsp_demux_007_src0_endofpacket;                                                   // rsp_demux_007:src0_endofpacket -> rsp_mux:sink7_endofpacket
	wire          rsp_demux_008_src0_valid;                                                         // rsp_demux_008:src0_valid -> rsp_mux:sink8_valid
	wire  [122:0] rsp_demux_008_src0_data;                                                          // rsp_demux_008:src0_data -> rsp_mux:sink8_data
	wire          rsp_demux_008_src0_ready;                                                         // rsp_mux:sink8_ready -> rsp_demux_008:src0_ready
	wire   [20:0] rsp_demux_008_src0_channel;                                                       // rsp_demux_008:src0_channel -> rsp_mux:sink8_channel
	wire          rsp_demux_008_src0_startofpacket;                                                 // rsp_demux_008:src0_startofpacket -> rsp_mux:sink8_startofpacket
	wire          rsp_demux_008_src0_endofpacket;                                                   // rsp_demux_008:src0_endofpacket -> rsp_mux:sink8_endofpacket
	wire          rsp_demux_009_src0_valid;                                                         // rsp_demux_009:src0_valid -> rsp_mux:sink9_valid
	wire  [122:0] rsp_demux_009_src0_data;                                                          // rsp_demux_009:src0_data -> rsp_mux:sink9_data
	wire          rsp_demux_009_src0_ready;                                                         // rsp_mux:sink9_ready -> rsp_demux_009:src0_ready
	wire   [20:0] rsp_demux_009_src0_channel;                                                       // rsp_demux_009:src0_channel -> rsp_mux:sink9_channel
	wire          rsp_demux_009_src0_startofpacket;                                                 // rsp_demux_009:src0_startofpacket -> rsp_mux:sink9_startofpacket
	wire          rsp_demux_009_src0_endofpacket;                                                   // rsp_demux_009:src0_endofpacket -> rsp_mux:sink9_endofpacket
	wire          rsp_demux_010_src0_valid;                                                         // rsp_demux_010:src0_valid -> rsp_mux:sink10_valid
	wire  [122:0] rsp_demux_010_src0_data;                                                          // rsp_demux_010:src0_data -> rsp_mux:sink10_data
	wire          rsp_demux_010_src0_ready;                                                         // rsp_mux:sink10_ready -> rsp_demux_010:src0_ready
	wire   [20:0] rsp_demux_010_src0_channel;                                                       // rsp_demux_010:src0_channel -> rsp_mux:sink10_channel
	wire          rsp_demux_010_src0_startofpacket;                                                 // rsp_demux_010:src0_startofpacket -> rsp_mux:sink10_startofpacket
	wire          rsp_demux_010_src0_endofpacket;                                                   // rsp_demux_010:src0_endofpacket -> rsp_mux:sink10_endofpacket
	wire          rsp_demux_011_src0_valid;                                                         // rsp_demux_011:src0_valid -> rsp_mux:sink11_valid
	wire  [122:0] rsp_demux_011_src0_data;                                                          // rsp_demux_011:src0_data -> rsp_mux:sink11_data
	wire          rsp_demux_011_src0_ready;                                                         // rsp_mux:sink11_ready -> rsp_demux_011:src0_ready
	wire   [20:0] rsp_demux_011_src0_channel;                                                       // rsp_demux_011:src0_channel -> rsp_mux:sink11_channel
	wire          rsp_demux_011_src0_startofpacket;                                                 // rsp_demux_011:src0_startofpacket -> rsp_mux:sink11_startofpacket
	wire          rsp_demux_011_src0_endofpacket;                                                   // rsp_demux_011:src0_endofpacket -> rsp_mux:sink11_endofpacket
	wire          rsp_demux_012_src0_valid;                                                         // rsp_demux_012:src0_valid -> rsp_mux:sink12_valid
	wire  [122:0] rsp_demux_012_src0_data;                                                          // rsp_demux_012:src0_data -> rsp_mux:sink12_data
	wire          rsp_demux_012_src0_ready;                                                         // rsp_mux:sink12_ready -> rsp_demux_012:src0_ready
	wire   [20:0] rsp_demux_012_src0_channel;                                                       // rsp_demux_012:src0_channel -> rsp_mux:sink12_channel
	wire          rsp_demux_012_src0_startofpacket;                                                 // rsp_demux_012:src0_startofpacket -> rsp_mux:sink12_startofpacket
	wire          rsp_demux_012_src0_endofpacket;                                                   // rsp_demux_012:src0_endofpacket -> rsp_mux:sink12_endofpacket
	wire          rsp_demux_013_src0_valid;                                                         // rsp_demux_013:src0_valid -> rsp_mux:sink13_valid
	wire  [122:0] rsp_demux_013_src0_data;                                                          // rsp_demux_013:src0_data -> rsp_mux:sink13_data
	wire          rsp_demux_013_src0_ready;                                                         // rsp_mux:sink13_ready -> rsp_demux_013:src0_ready
	wire   [20:0] rsp_demux_013_src0_channel;                                                       // rsp_demux_013:src0_channel -> rsp_mux:sink13_channel
	wire          rsp_demux_013_src0_startofpacket;                                                 // rsp_demux_013:src0_startofpacket -> rsp_mux:sink13_startofpacket
	wire          rsp_demux_013_src0_endofpacket;                                                   // rsp_demux_013:src0_endofpacket -> rsp_mux:sink13_endofpacket
	wire          rsp_demux_014_src0_valid;                                                         // rsp_demux_014:src0_valid -> rsp_mux:sink14_valid
	wire  [122:0] rsp_demux_014_src0_data;                                                          // rsp_demux_014:src0_data -> rsp_mux:sink14_data
	wire          rsp_demux_014_src0_ready;                                                         // rsp_mux:sink14_ready -> rsp_demux_014:src0_ready
	wire   [20:0] rsp_demux_014_src0_channel;                                                       // rsp_demux_014:src0_channel -> rsp_mux:sink14_channel
	wire          rsp_demux_014_src0_startofpacket;                                                 // rsp_demux_014:src0_startofpacket -> rsp_mux:sink14_startofpacket
	wire          rsp_demux_014_src0_endofpacket;                                                   // rsp_demux_014:src0_endofpacket -> rsp_mux:sink14_endofpacket
	wire          rsp_demux_015_src0_valid;                                                         // rsp_demux_015:src0_valid -> rsp_mux:sink15_valid
	wire  [122:0] rsp_demux_015_src0_data;                                                          // rsp_demux_015:src0_data -> rsp_mux:sink15_data
	wire          rsp_demux_015_src0_ready;                                                         // rsp_mux:sink15_ready -> rsp_demux_015:src0_ready
	wire   [20:0] rsp_demux_015_src0_channel;                                                       // rsp_demux_015:src0_channel -> rsp_mux:sink15_channel
	wire          rsp_demux_015_src0_startofpacket;                                                 // rsp_demux_015:src0_startofpacket -> rsp_mux:sink15_startofpacket
	wire          rsp_demux_015_src0_endofpacket;                                                   // rsp_demux_015:src0_endofpacket -> rsp_mux:sink15_endofpacket
	wire          rsp_demux_016_src0_valid;                                                         // rsp_demux_016:src0_valid -> rsp_mux:sink16_valid
	wire  [122:0] rsp_demux_016_src0_data;                                                          // rsp_demux_016:src0_data -> rsp_mux:sink16_data
	wire          rsp_demux_016_src0_ready;                                                         // rsp_mux:sink16_ready -> rsp_demux_016:src0_ready
	wire   [20:0] rsp_demux_016_src0_channel;                                                       // rsp_demux_016:src0_channel -> rsp_mux:sink16_channel
	wire          rsp_demux_016_src0_startofpacket;                                                 // rsp_demux_016:src0_startofpacket -> rsp_mux:sink16_startofpacket
	wire          rsp_demux_016_src0_endofpacket;                                                   // rsp_demux_016:src0_endofpacket -> rsp_mux:sink16_endofpacket
	wire          rsp_demux_017_src0_valid;                                                         // rsp_demux_017:src0_valid -> rsp_mux:sink17_valid
	wire  [122:0] rsp_demux_017_src0_data;                                                          // rsp_demux_017:src0_data -> rsp_mux:sink17_data
	wire          rsp_demux_017_src0_ready;                                                         // rsp_mux:sink17_ready -> rsp_demux_017:src0_ready
	wire   [20:0] rsp_demux_017_src0_channel;                                                       // rsp_demux_017:src0_channel -> rsp_mux:sink17_channel
	wire          rsp_demux_017_src0_startofpacket;                                                 // rsp_demux_017:src0_startofpacket -> rsp_mux:sink17_startofpacket
	wire          rsp_demux_017_src0_endofpacket;                                                   // rsp_demux_017:src0_endofpacket -> rsp_mux:sink17_endofpacket
	wire          rsp_demux_018_src0_valid;                                                         // rsp_demux_018:src0_valid -> rsp_mux:sink18_valid
	wire  [122:0] rsp_demux_018_src0_data;                                                          // rsp_demux_018:src0_data -> rsp_mux:sink18_data
	wire          rsp_demux_018_src0_ready;                                                         // rsp_mux:sink18_ready -> rsp_demux_018:src0_ready
	wire   [20:0] rsp_demux_018_src0_channel;                                                       // rsp_demux_018:src0_channel -> rsp_mux:sink18_channel
	wire          rsp_demux_018_src0_startofpacket;                                                 // rsp_demux_018:src0_startofpacket -> rsp_mux:sink18_startofpacket
	wire          rsp_demux_018_src0_endofpacket;                                                   // rsp_demux_018:src0_endofpacket -> rsp_mux:sink18_endofpacket
	wire          rsp_demux_019_src0_valid;                                                         // rsp_demux_019:src0_valid -> rsp_mux:sink19_valid
	wire  [122:0] rsp_demux_019_src0_data;                                                          // rsp_demux_019:src0_data -> rsp_mux:sink19_data
	wire          rsp_demux_019_src0_ready;                                                         // rsp_mux:sink19_ready -> rsp_demux_019:src0_ready
	wire   [20:0] rsp_demux_019_src0_channel;                                                       // rsp_demux_019:src0_channel -> rsp_mux:sink19_channel
	wire          rsp_demux_019_src0_startofpacket;                                                 // rsp_demux_019:src0_startofpacket -> rsp_mux:sink19_startofpacket
	wire          rsp_demux_019_src0_endofpacket;                                                   // rsp_demux_019:src0_endofpacket -> rsp_mux:sink19_endofpacket
	wire          rsp_demux_020_src0_valid;                                                         // rsp_demux_020:src0_valid -> rsp_mux:sink20_valid
	wire  [122:0] rsp_demux_020_src0_data;                                                          // rsp_demux_020:src0_data -> rsp_mux:sink20_data
	wire          rsp_demux_020_src0_ready;                                                         // rsp_mux:sink20_ready -> rsp_demux_020:src0_ready
	wire   [20:0] rsp_demux_020_src0_channel;                                                       // rsp_demux_020:src0_channel -> rsp_mux:sink20_channel
	wire          rsp_demux_020_src0_startofpacket;                                                 // rsp_demux_020:src0_startofpacket -> rsp_mux:sink20_startofpacket
	wire          rsp_demux_020_src0_endofpacket;                                                   // rsp_demux_020:src0_endofpacket -> rsp_mux:sink20_endofpacket
	wire   [20:0] nios2_gen2_data_master_limiter_cmd_valid_data;                                    // nios2_gen2_data_master_limiter:cmd_src_valid -> cmd_demux:sink_valid
	wire   [20:0] nios2_gen2_instruction_master_limiter_cmd_valid_data;                             // nios2_gen2_instruction_master_limiter:cmd_src_valid -> cmd_demux_001:sink_valid

	system_altera_merlin_master_translator_192_lykd4la #(
		.AV_ADDRESS_W                (21),
		.AV_DATA_W                   (32),
		.AV_BURSTCOUNT_W             (1),
		.AV_BYTEENABLE_W             (4),
		.UAV_ADDRESS_W               (21),
		.UAV_BURSTCOUNT_W            (3),
		.USE_READ                    (1),
		.USE_WRITE                   (1),
		.USE_BEGINBURSTTRANSFER      (0),
		.USE_BEGINTRANSFER           (0),
		.USE_CHIPSELECT              (0),
		.USE_BURSTCOUNT              (0),
		.USE_READDATAVALID           (1),
		.USE_WAITREQUEST             (1),
		.USE_READRESPONSE            (0),
		.USE_WRITERESPONSE           (0),
		.AV_SYMBOLS_PER_WORD         (4),
		.AV_ADDRESS_SYMBOLS          (1),
		.AV_BURSTCOUNT_SYMBOLS       (0),
		.AV_CONSTANT_BURST_BEHAVIOR  (0),
		.UAV_CONSTANT_BURST_BEHAVIOR (0),
		.AV_LINEWRAPBURSTS           (0),
		.AV_REGISTERINCOMINGSIGNALS  (0),
		.SYNC_RESET                  (0),
		.WAITREQUEST_ALLOWANCE       (0),
		.USE_OUTPUTENABLE            (0)
	) nios2_gen2_data_master_translator (
		.clk                    (clock_in_out_clk_clk),                                                      //   input,   width = 1,                       clk.clk
		.reset                  (nios2_gen2_reset_reset_bridge_in_reset_reset),                              //   input,   width = 1,                     reset.reset
		.uav_address            (nios2_gen2_data_master_translator_avalon_universal_master_0_address),       //  output,  width = 21, avalon_universal_master_0.address
		.uav_burstcount         (nios2_gen2_data_master_translator_avalon_universal_master_0_burstcount),    //  output,   width = 3,                          .burstcount
		.uav_read               (nios2_gen2_data_master_translator_avalon_universal_master_0_read),          //  output,   width = 1,                          .read
		.uav_write              (nios2_gen2_data_master_translator_avalon_universal_master_0_write),         //  output,   width = 1,                          .write
		.uav_waitrequest        (nios2_gen2_data_master_translator_avalon_universal_master_0_waitrequest),   //   input,   width = 1,                          .waitrequest
		.uav_readdatavalid      (nios2_gen2_data_master_translator_avalon_universal_master_0_readdatavalid), //   input,   width = 1,                          .readdatavalid
		.uav_byteenable         (nios2_gen2_data_master_translator_avalon_universal_master_0_byteenable),    //  output,   width = 4,                          .byteenable
		.uav_readdata           (nios2_gen2_data_master_translator_avalon_universal_master_0_readdata),      //   input,  width = 32,                          .readdata
		.uav_writedata          (nios2_gen2_data_master_translator_avalon_universal_master_0_writedata),     //  output,  width = 32,                          .writedata
		.uav_lock               (nios2_gen2_data_master_translator_avalon_universal_master_0_lock),          //  output,   width = 1,                          .lock
		.uav_debugaccess        (nios2_gen2_data_master_translator_avalon_universal_master_0_debugaccess),   //  output,   width = 1,                          .debugaccess
		.av_address             (nios2_gen2_data_master_address),                                            //   input,  width = 21,      avalon_anti_master_0.address
		.av_waitrequest         (nios2_gen2_data_master_waitrequest),                                        //  output,   width = 1,                          .waitrequest
		.av_byteenable          (nios2_gen2_data_master_byteenable),                                         //   input,   width = 4,                          .byteenable
		.av_read                (nios2_gen2_data_master_read),                                               //   input,   width = 1,                          .read
		.av_readdata            (nios2_gen2_data_master_readdata),                                           //  output,  width = 32,                          .readdata
		.av_readdatavalid       (nios2_gen2_data_master_readdatavalid),                                      //  output,   width = 1,                          .readdatavalid
		.av_write               (nios2_gen2_data_master_write),                                              //   input,   width = 1,                          .write
		.av_writedata           (nios2_gen2_data_master_writedata),                                          //   input,  width = 32,                          .writedata
		.av_debugaccess         (nios2_gen2_data_master_debugaccess),                                        //   input,   width = 1,                          .debugaccess
		.av_burstcount          (1'b1),                                                                      // (terminated),                                        
		.av_beginbursttransfer  (1'b0),                                                                      // (terminated),                                        
		.av_begintransfer       (1'b0),                                                                      // (terminated),                                        
		.av_chipselect          (1'b0),                                                                      // (terminated),                                        
		.av_lock                (1'b0),                                                                      // (terminated),                                        
		.uav_outputenable       (1'b0),                                                                      // (terminated),                                        
		.uav_clken              (),                                                                          // (terminated),                                        
		.av_clken               (1'b1),                                                                      // (terminated),                                        
		.uav_response           (2'b00),                                                                     // (terminated),                                        
		.av_response            (),                                                                          // (terminated),                                        
		.uav_writeresponsevalid (1'b0),                                                                      // (terminated),                                        
		.av_writeresponsevalid  ()                                                                           // (terminated),                                        
	);

	system_altera_merlin_master_translator_192_lykd4la #(
		.AV_ADDRESS_W                (21),
		.AV_DATA_W                   (32),
		.AV_BURSTCOUNT_W             (1),
		.AV_BYTEENABLE_W             (4),
		.UAV_ADDRESS_W               (21),
		.UAV_BURSTCOUNT_W            (3),
		.USE_READ                    (1),
		.USE_WRITE                   (0),
		.USE_BEGINBURSTTRANSFER      (0),
		.USE_BEGINTRANSFER           (0),
		.USE_CHIPSELECT              (0),
		.USE_BURSTCOUNT              (0),
		.USE_READDATAVALID           (1),
		.USE_WAITREQUEST             (1),
		.USE_READRESPONSE            (0),
		.USE_WRITERESPONSE           (0),
		.AV_SYMBOLS_PER_WORD         (4),
		.AV_ADDRESS_SYMBOLS          (1),
		.AV_BURSTCOUNT_SYMBOLS       (0),
		.AV_CONSTANT_BURST_BEHAVIOR  (0),
		.UAV_CONSTANT_BURST_BEHAVIOR (0),
		.AV_LINEWRAPBURSTS           (1),
		.AV_REGISTERINCOMINGSIGNALS  (0),
		.SYNC_RESET                  (0),
		.WAITREQUEST_ALLOWANCE       (0),
		.USE_OUTPUTENABLE            (0)
	) nios2_gen2_instruction_master_translator (
		.clk                    (clock_in_out_clk_clk),                                                             //   input,   width = 1,                       clk.clk
		.reset                  (nios2_gen2_reset_reset_bridge_in_reset_reset),                                     //   input,   width = 1,                     reset.reset
		.uav_address            (nios2_gen2_instruction_master_translator_avalon_universal_master_0_address),       //  output,  width = 21, avalon_universal_master_0.address
		.uav_burstcount         (nios2_gen2_instruction_master_translator_avalon_universal_master_0_burstcount),    //  output,   width = 3,                          .burstcount
		.uav_read               (nios2_gen2_instruction_master_translator_avalon_universal_master_0_read),          //  output,   width = 1,                          .read
		.uav_write              (nios2_gen2_instruction_master_translator_avalon_universal_master_0_write),         //  output,   width = 1,                          .write
		.uav_waitrequest        (nios2_gen2_instruction_master_translator_avalon_universal_master_0_waitrequest),   //   input,   width = 1,                          .waitrequest
		.uav_readdatavalid      (nios2_gen2_instruction_master_translator_avalon_universal_master_0_readdatavalid), //   input,   width = 1,                          .readdatavalid
		.uav_byteenable         (nios2_gen2_instruction_master_translator_avalon_universal_master_0_byteenable),    //  output,   width = 4,                          .byteenable
		.uav_readdata           (nios2_gen2_instruction_master_translator_avalon_universal_master_0_readdata),      //   input,  width = 32,                          .readdata
		.uav_writedata          (nios2_gen2_instruction_master_translator_avalon_universal_master_0_writedata),     //  output,  width = 32,                          .writedata
		.uav_lock               (nios2_gen2_instruction_master_translator_avalon_universal_master_0_lock),          //  output,   width = 1,                          .lock
		.uav_debugaccess        (nios2_gen2_instruction_master_translator_avalon_universal_master_0_debugaccess),   //  output,   width = 1,                          .debugaccess
		.av_address             (nios2_gen2_instruction_master_address),                                            //   input,  width = 21,      avalon_anti_master_0.address
		.av_waitrequest         (nios2_gen2_instruction_master_waitrequest),                                        //  output,   width = 1,                          .waitrequest
		.av_read                (nios2_gen2_instruction_master_read),                                               //   input,   width = 1,                          .read
		.av_readdata            (nios2_gen2_instruction_master_readdata),                                           //  output,  width = 32,                          .readdata
		.av_readdatavalid       (nios2_gen2_instruction_master_readdatavalid),                                      //  output,   width = 1,                          .readdatavalid
		.av_burstcount          (1'b1),                                                                             // (terminated),                                        
		.av_byteenable          (4'b1111),                                                                          // (terminated),                                        
		.av_beginbursttransfer  (1'b0),                                                                             // (terminated),                                        
		.av_begintransfer       (1'b0),                                                                             // (terminated),                                        
		.av_chipselect          (1'b0),                                                                             // (terminated),                                        
		.av_write               (1'b0),                                                                             // (terminated),                                        
		.av_writedata           (32'b00000000000000000000000000000000),                                             // (terminated),                                        
		.av_lock                (1'b0),                                                                             // (terminated),                                        
		.av_debugaccess         (1'b0),                                                                             // (terminated),                                        
		.uav_outputenable       (1'b0),                                                                             // (terminated),                                        
		.uav_clken              (),                                                                                 // (terminated),                                        
		.av_clken               (1'b1),                                                                             // (terminated),                                        
		.uav_response           (2'b00),                                                                            // (terminated),                                        
		.av_response            (),                                                                                 // (terminated),                                        
		.uav_writeresponsevalid (1'b0),                                                                             // (terminated),                                        
		.av_writeresponsevalid  ()                                                                                  // (terminated),                                        
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (1),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) jtag_uart_avalon_jtag_slave_translator (
		.clk                    (clock_in_out_clk_clk),                               //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),        //   input,   width = 1,                    reset.reset
		.uav_address            (jtag_uart_avalon_jtag_slave_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (jtag_uart_avalon_jtag_slave_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (jtag_uart_avalon_jtag_slave_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (jtag_uart_avalon_jtag_slave_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (jtag_uart_avalon_jtag_slave_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (jtag_uart_avalon_jtag_slave_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (jtag_uart_avalon_jtag_slave_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (jtag_uart_avalon_jtag_slave_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (jtag_uart_avalon_jtag_slave_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (jtag_uart_avalon_jtag_slave_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (jtag_uart_avalon_jtag_slave_address),                //  output,   width = 1,      avalon_anti_slave_0.address
		.av_write               (jtag_uart_avalon_jtag_slave_write),                  //  output,   width = 1,                         .write
		.av_read                (jtag_uart_avalon_jtag_slave_read),                   //  output,   width = 1,                         .read
		.av_readdata            (jtag_uart_avalon_jtag_slave_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (jtag_uart_avalon_jtag_slave_writedata),              //  output,  width = 32,                         .writedata
		.av_waitrequest         (jtag_uart_avalon_jtag_slave_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_chipselect          (jtag_uart_avalon_jtag_slave_chipselect),             //  output,   width = 1,                         .chipselect
		.av_begintransfer       (),                                                   // (terminated),                                       
		.av_beginbursttransfer  (),                                                   // (terminated),                                       
		.av_burstcount          (),                                                   // (terminated),                                       
		.av_byteenable          (),                                                   // (terminated),                                       
		.av_readdatavalid       (1'b0),                                               // (terminated),                                       
		.av_writebyteenable     (),                                                   // (terminated),                                       
		.av_lock                (),                                                   // (terminated),                                       
		.av_clken               (),                                                   // (terminated),                                       
		.uav_clken              (1'b0),                                               // (terminated),                                       
		.av_debugaccess         (),                                                   // (terminated),                                       
		.av_outputenable        (),                                                   // (terminated),                                       
		.uav_response           (),                                                   // (terminated),                                       
		.av_response            (2'b00),                                              // (terminated),                                       
		.uav_writeresponsevalid (),                                                   // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (1),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) sysid_qsys_control_slave_translator (
		.clk                    (clock_in_out_clk_clk),                            //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),     //   input,   width = 1,                    reset.reset
		.uav_address            (sysid_qsys_control_slave_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (sysid_qsys_control_slave_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (sysid_qsys_control_slave_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (sysid_qsys_control_slave_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (sysid_qsys_control_slave_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (sysid_qsys_control_slave_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (sysid_qsys_control_slave_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (sysid_qsys_control_slave_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (sysid_qsys_control_slave_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (sysid_qsys_control_slave_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (sysid_qsys_control_slave_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (sysid_qsys_control_slave_address),                //  output,   width = 1,      avalon_anti_slave_0.address
		.av_readdata            (sysid_qsys_control_slave_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                // (terminated),                                       
		.av_read                (),                                                // (terminated),                                       
		.av_writedata           (),                                                // (terminated),                                       
		.av_begintransfer       (),                                                // (terminated),                                       
		.av_beginbursttransfer  (),                                                // (terminated),                                       
		.av_burstcount          (),                                                // (terminated),                                       
		.av_byteenable          (),                                                // (terminated),                                       
		.av_readdatavalid       (1'b0),                                            // (terminated),                                       
		.av_waitrequest         (1'b0),                                            // (terminated),                                       
		.av_writebyteenable     (),                                                // (terminated),                                       
		.av_lock                (),                                                // (terminated),                                       
		.av_chipselect          (),                                                // (terminated),                                       
		.av_clken               (),                                                // (terminated),                                       
		.uav_clken              (1'b0),                                            // (terminated),                                       
		.av_debugaccess         (),                                                // (terminated),                                       
		.av_outputenable        (),                                                // (terminated),                                       
		.uav_response           (),                                                // (terminated),                                       
		.av_response            (2'b00),                                           // (terminated),                                       
		.uav_writeresponsevalid (),                                                // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                             // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (9),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) nios2_gen2_debug_mem_slave_translator (
		.clk                    (clock_in_out_clk_clk),                              //   input,   width = 1,                      clk.clk
		.reset                  (nios2_gen2_reset_reset_bridge_in_reset_reset),      //   input,   width = 1,                    reset.reset
		.uav_address            (nios2_gen2_debug_mem_slave_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (nios2_gen2_debug_mem_slave_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (nios2_gen2_debug_mem_slave_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (nios2_gen2_debug_mem_slave_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (nios2_gen2_debug_mem_slave_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (nios2_gen2_debug_mem_slave_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (nios2_gen2_debug_mem_slave_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (nios2_gen2_debug_mem_slave_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (nios2_gen2_debug_mem_slave_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (nios2_gen2_debug_mem_slave_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (nios2_gen2_debug_mem_slave_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (nios2_gen2_debug_mem_slave_address),                //  output,   width = 9,      avalon_anti_slave_0.address
		.av_write               (nios2_gen2_debug_mem_slave_write),                  //  output,   width = 1,                         .write
		.av_read                (nios2_gen2_debug_mem_slave_read),                   //  output,   width = 1,                         .read
		.av_readdata            (nios2_gen2_debug_mem_slave_readdata),               //   input,  width = 32,                         .readdata
		.av_writedata           (nios2_gen2_debug_mem_slave_writedata),              //  output,  width = 32,                         .writedata
		.av_byteenable          (nios2_gen2_debug_mem_slave_byteenable),             //  output,   width = 4,                         .byteenable
		.av_waitrequest         (nios2_gen2_debug_mem_slave_waitrequest),            //   input,   width = 1,                         .waitrequest
		.av_debugaccess         (nios2_gen2_debug_mem_slave_debugaccess),            //  output,   width = 1,                         .debugaccess
		.av_begintransfer       (),                                                  // (terminated),                                       
		.av_beginbursttransfer  (),                                                  // (terminated),                                       
		.av_burstcount          (),                                                  // (terminated),                                       
		.av_readdatavalid       (1'b0),                                              // (terminated),                                       
		.av_writebyteenable     (),                                                  // (terminated),                                       
		.av_lock                (),                                                  // (terminated),                                       
		.av_chipselect          (),                                                  // (terminated),                                       
		.av_clken               (),                                                  // (terminated),                                       
		.uav_clken              (1'b0),                                              // (terminated),                                       
		.av_outputenable        (),                                                  // (terminated),                                       
		.uav_response           (),                                                  // (terminated),                                       
		.av_response            (2'b00),                                             // (terminated),                                       
		.uav_writeresponsevalid (),                                                  // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                               // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (17),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (1),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) onchip_memory2_s1_translator (
		.clk                    (clock_in_out_clk_clk),                        //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,   width = 1,                    reset.reset
		.uav_address            (onchip_memory2_s1_agent_m0_address),          //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (onchip_memory2_s1_agent_m0_burstcount),       //   input,   width = 3,                         .burstcount
		.uav_read               (onchip_memory2_s1_agent_m0_read),             //   input,   width = 1,                         .read
		.uav_write              (onchip_memory2_s1_agent_m0_write),            //   input,   width = 1,                         .write
		.uav_waitrequest        (onchip_memory2_s1_agent_m0_waitrequest),      //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (onchip_memory2_s1_agent_m0_readdatavalid),    //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (onchip_memory2_s1_agent_m0_byteenable),       //   input,   width = 4,                         .byteenable
		.uav_readdata           (onchip_memory2_s1_agent_m0_readdata),         //  output,  width = 32,                         .readdata
		.uav_writedata          (onchip_memory2_s1_agent_m0_writedata),        //   input,  width = 32,                         .writedata
		.uav_lock               (onchip_memory2_s1_agent_m0_lock),             //   input,   width = 1,                         .lock
		.uav_debugaccess        (onchip_memory2_s1_agent_m0_debugaccess),      //   input,   width = 1,                         .debugaccess
		.av_address             (onchip_memory2_s1_address),                   //  output,  width = 17,      avalon_anti_slave_0.address
		.av_write               (onchip_memory2_s1_write),                     //  output,   width = 1,                         .write
		.av_readdata            (onchip_memory2_s1_readdata),                  //   input,  width = 32,                         .readdata
		.av_writedata           (onchip_memory2_s1_writedata),                 //  output,  width = 32,                         .writedata
		.av_byteenable          (onchip_memory2_s1_byteenable),                //  output,   width = 4,                         .byteenable
		.av_chipselect          (onchip_memory2_s1_chipselect),                //  output,   width = 1,                         .chipselect
		.av_clken               (onchip_memory2_s1_clken),                     //  output,   width = 1,                         .clken
		.av_read                (),                                            // (terminated),                                       
		.av_begintransfer       (),                                            // (terminated),                                       
		.av_beginbursttransfer  (),                                            // (terminated),                                       
		.av_burstcount          (),                                            // (terminated),                                       
		.av_readdatavalid       (1'b0),                                        // (terminated),                                       
		.av_waitrequest         (1'b0),                                        // (terminated),                                       
		.av_writebyteenable     (),                                            // (terminated),                                       
		.av_lock                (),                                            // (terminated),                                       
		.uav_clken              (1'b0),                                        // (terminated),                                       
		.av_debugaccess         (),                                            // (terminated),                                       
		.av_outputenable        (),                                            // (terminated),                                       
		.uav_response           (),                                            // (terminated),                                       
		.av_response            (2'b00),                                       // (terminated),                                       
		.uav_writeresponsevalid (),                                            // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                         // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_temperature_fpga_s1_translator (
		.clk                    (clock_in_out_clk_clk),                                  //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),           //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_temperature_fpga_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_temperature_fpga_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_temperature_fpga_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_temperature_fpga_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_temperature_fpga_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_temperature_fpga_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_temperature_fpga_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_temperature_fpga_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_temperature_fpga_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_temperature_fpga_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_temperature_fpga_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_temperature_fpga_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_temperature_fpga_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                      // (terminated),                                       
		.av_read                (),                                                      // (terminated),                                       
		.av_writedata           (),                                                      // (terminated),                                       
		.av_begintransfer       (),                                                      // (terminated),                                       
		.av_beginbursttransfer  (),                                                      // (terminated),                                       
		.av_burstcount          (),                                                      // (terminated),                                       
		.av_byteenable          (),                                                      // (terminated),                                       
		.av_readdatavalid       (1'b0),                                                  // (terminated),                                       
		.av_waitrequest         (1'b0),                                                  // (terminated),                                       
		.av_writebyteenable     (),                                                      // (terminated),                                       
		.av_lock                (),                                                      // (terminated),                                       
		.av_chipselect          (),                                                      // (terminated),                                       
		.av_clken               (),                                                      // (terminated),                                       
		.uav_clken              (1'b0),                                                  // (terminated),                                       
		.av_debugaccess         (),                                                      // (terminated),                                       
		.av_outputenable        (),                                                      // (terminated),                                       
		.uav_response           (),                                                      // (terminated),                                       
		.av_response            (2'b00),                                                 // (terminated),                                       
		.uav_writeresponsevalid (),                                                      // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                   // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_temperature_board1_s1_translator (
		.clk                    (clock_in_out_clk_clk),                                    //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),             //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_temperature_board1_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_temperature_board1_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_temperature_board1_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_temperature_board1_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_temperature_board1_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_temperature_board1_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_temperature_board1_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_temperature_board1_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_temperature_board1_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_temperature_board1_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_temperature_board1_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_temperature_board1_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_temperature_board1_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                        // (terminated),                                       
		.av_read                (),                                                        // (terminated),                                       
		.av_writedata           (),                                                        // (terminated),                                       
		.av_begintransfer       (),                                                        // (terminated),                                       
		.av_beginbursttransfer  (),                                                        // (terminated),                                       
		.av_burstcount          (),                                                        // (terminated),                                       
		.av_byteenable          (),                                                        // (terminated),                                       
		.av_readdatavalid       (1'b0),                                                    // (terminated),                                       
		.av_waitrequest         (1'b0),                                                    // (terminated),                                       
		.av_writebyteenable     (),                                                        // (terminated),                                       
		.av_lock                (),                                                        // (terminated),                                       
		.av_chipselect          (),                                                        // (terminated),                                       
		.av_clken               (),                                                        // (terminated),                                       
		.uav_clken              (1'b0),                                                    // (terminated),                                       
		.av_debugaccess         (),                                                        // (terminated),                                       
		.av_outputenable        (),                                                        // (terminated),                                       
		.uav_response           (),                                                        // (terminated),                                       
		.av_response            (2'b00),                                                   // (terminated),                                       
		.uav_writeresponsevalid (),                                                        // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                     // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_fan_speed1_s1_translator (
		.clk                    (clock_in_out_clk_clk),                            //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),     //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_fan_speed1_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_fan_speed1_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_fan_speed1_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_fan_speed1_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_fan_speed1_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_fan_speed1_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_fan_speed1_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_fan_speed1_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_fan_speed1_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_fan_speed1_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_fan_speed1_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_fan_speed1_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_fan_speed1_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                // (terminated),                                       
		.av_read                (),                                                // (terminated),                                       
		.av_writedata           (),                                                // (terminated),                                       
		.av_begintransfer       (),                                                // (terminated),                                       
		.av_beginbursttransfer  (),                                                // (terminated),                                       
		.av_burstcount          (),                                                // (terminated),                                       
		.av_byteenable          (),                                                // (terminated),                                       
		.av_readdatavalid       (1'b0),                                            // (terminated),                                       
		.av_waitrequest         (1'b0),                                            // (terminated),                                       
		.av_writebyteenable     (),                                                // (terminated),                                       
		.av_lock                (),                                                // (terminated),                                       
		.av_chipselect          (),                                                // (terminated),                                       
		.av_clken               (),                                                // (terminated),                                       
		.uav_clken              (1'b0),                                            // (terminated),                                       
		.av_debugaccess         (),                                                // (terminated),                                       
		.av_outputenable        (),                                                // (terminated),                                       
		.uav_response           (),                                                // (terminated),                                       
		.av_response            (2'b00),                                           // (terminated),                                       
		.uav_writeresponsevalid (),                                                // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                             // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_fan_speed2_s1_translator (
		.clk                    (clock_in_out_clk_clk),                            //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),     //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_fan_speed2_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_fan_speed2_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_fan_speed2_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_fan_speed2_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_fan_speed2_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_fan_speed2_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_fan_speed2_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_fan_speed2_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_fan_speed2_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_fan_speed2_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_fan_speed2_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_fan_speed2_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_fan_speed2_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                // (terminated),                                       
		.av_read                (),                                                // (terminated),                                       
		.av_writedata           (),                                                // (terminated),                                       
		.av_begintransfer       (),                                                // (terminated),                                       
		.av_beginbursttransfer  (),                                                // (terminated),                                       
		.av_burstcount          (),                                                // (terminated),                                       
		.av_byteenable          (),                                                // (terminated),                                       
		.av_readdatavalid       (1'b0),                                            // (terminated),                                       
		.av_waitrequest         (1'b0),                                            // (terminated),                                       
		.av_writebyteenable     (),                                                // (terminated),                                       
		.av_lock                (),                                                // (terminated),                                       
		.av_chipselect          (),                                                // (terminated),                                       
		.av_clken               (),                                                // (terminated),                                       
		.uav_clken              (1'b0),                                            // (terminated),                                       
		.av_debugaccess         (),                                                // (terminated),                                       
		.av_outputenable        (),                                                // (terminated),                                       
		.uav_response           (),                                                // (terminated),                                       
		.av_response            (2'b00),                                           // (terminated),                                       
		.uav_writeresponsevalid (),                                                // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                             // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_core_current_s1_translator (
		.clk                    (clock_in_out_clk_clk),                              //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),       //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_core_current_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_core_current_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_core_current_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_core_current_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_core_current_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_core_current_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_core_current_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_core_current_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_core_current_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_core_current_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_core_current_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_core_current_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_core_current_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                  // (terminated),                                       
		.av_read                (),                                                  // (terminated),                                       
		.av_writedata           (),                                                  // (terminated),                                       
		.av_begintransfer       (),                                                  // (terminated),                                       
		.av_beginbursttransfer  (),                                                  // (terminated),                                       
		.av_burstcount          (),                                                  // (terminated),                                       
		.av_byteenable          (),                                                  // (terminated),                                       
		.av_readdatavalid       (1'b0),                                              // (terminated),                                       
		.av_waitrequest         (1'b0),                                              // (terminated),                                       
		.av_writebyteenable     (),                                                  // (terminated),                                       
		.av_lock                (),                                                  // (terminated),                                       
		.av_chipselect          (),                                                  // (terminated),                                       
		.av_clken               (),                                                  // (terminated),                                       
		.uav_clken              (1'b0),                                              // (terminated),                                       
		.av_debugaccess         (),                                                  // (terminated),                                       
		.av_outputenable        (),                                                  // (terminated),                                       
		.uav_response           (),                                                  // (terminated),                                       
		.av_response            (2'b00),                                             // (terminated),                                       
		.uav_writeresponsevalid (),                                                  // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                               // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_core_voltage_s1_translator (
		.clk                    (clock_in_out_clk_clk),                              //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),       //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_core_voltage_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_core_voltage_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_core_voltage_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_core_voltage_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_core_voltage_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_core_voltage_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_core_voltage_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_core_voltage_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_core_voltage_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_core_voltage_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_core_voltage_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_core_voltage_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_core_voltage_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                  // (terminated),                                       
		.av_read                (),                                                  // (terminated),                                       
		.av_writedata           (),                                                  // (terminated),                                       
		.av_begintransfer       (),                                                  // (terminated),                                       
		.av_beginbursttransfer  (),                                                  // (terminated),                                       
		.av_burstcount          (),                                                  // (terminated),                                       
		.av_byteenable          (),                                                  // (terminated),                                       
		.av_readdatavalid       (1'b0),                                              // (terminated),                                       
		.av_waitrequest         (1'b0),                                              // (terminated),                                       
		.av_writebyteenable     (),                                                  // (terminated),                                       
		.av_lock                (),                                                  // (terminated),                                       
		.av_chipselect          (),                                                  // (terminated),                                       
		.av_clken               (),                                                  // (terminated),                                       
		.uav_clken              (1'b0),                                              // (terminated),                                       
		.av_debugaccess         (),                                                  // (terminated),                                       
		.av_outputenable        (),                                                  // (terminated),                                       
		.uav_response           (),                                                  // (terminated),                                       
		.av_response            (2'b00),                                             // (terminated),                                       
		.uav_writeresponsevalid (),                                                  // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                               // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_power_in_current_s1_translator (
		.clk                    (clock_in_out_clk_clk),                                  //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),           //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_power_in_current_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_power_in_current_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_power_in_current_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_power_in_current_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_power_in_current_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_power_in_current_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_power_in_current_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_power_in_current_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_power_in_current_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_power_in_current_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_power_in_current_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_power_in_current_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_power_in_current_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                      // (terminated),                                       
		.av_read                (),                                                      // (terminated),                                       
		.av_writedata           (),                                                      // (terminated),                                       
		.av_begintransfer       (),                                                      // (terminated),                                       
		.av_beginbursttransfer  (),                                                      // (terminated),                                       
		.av_burstcount          (),                                                      // (terminated),                                       
		.av_byteenable          (),                                                      // (terminated),                                       
		.av_readdatavalid       (1'b0),                                                  // (terminated),                                       
		.av_waitrequest         (1'b0),                                                  // (terminated),                                       
		.av_writebyteenable     (),                                                      // (terminated),                                       
		.av_lock                (),                                                      // (terminated),                                       
		.av_chipselect          (),                                                      // (terminated),                                       
		.av_clken               (),                                                      // (terminated),                                       
		.uav_clken              (1'b0),                                                  // (terminated),                                       
		.av_debugaccess         (),                                                      // (terminated),                                       
		.av_outputenable        (),                                                      // (terminated),                                       
		.uav_response           (),                                                      // (terminated),                                       
		.av_response            (2'b00),                                                 // (terminated),                                       
		.uav_writeresponsevalid (),                                                      // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                   // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_power_in_voltage_s1_translator (
		.clk                    (clock_in_out_clk_clk),                                  //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),           //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_power_in_voltage_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_power_in_voltage_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_power_in_voltage_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_power_in_voltage_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_power_in_voltage_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_power_in_voltage_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_power_in_voltage_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_power_in_voltage_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_power_in_voltage_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_power_in_voltage_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_power_in_voltage_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_power_in_voltage_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_power_in_voltage_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                      // (terminated),                                       
		.av_read                (),                                                      // (terminated),                                       
		.av_writedata           (),                                                      // (terminated),                                       
		.av_begintransfer       (),                                                      // (terminated),                                       
		.av_beginbursttransfer  (),                                                      // (terminated),                                       
		.av_burstcount          (),                                                      // (terminated),                                       
		.av_byteenable          (),                                                      // (terminated),                                       
		.av_readdatavalid       (1'b0),                                                  // (terminated),                                       
		.av_waitrequest         (1'b0),                                                  // (terminated),                                       
		.av_writebyteenable     (),                                                      // (terminated),                                       
		.av_lock                (),                                                      // (terminated),                                       
		.av_chipselect          (),                                                      // (terminated),                                       
		.av_clken               (),                                                      // (terminated),                                       
		.uav_clken              (1'b0),                                                  // (terminated),                                       
		.av_debugaccess         (),                                                      // (terminated),                                       
		.av_outputenable        (),                                                      // (terminated),                                       
		.uav_response           (),                                                      // (terminated),                                       
		.av_response            (2'b00),                                                 // (terminated),                                       
		.uav_writeresponsevalid (),                                                      // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                   // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_pin_status_s1_translator (
		.clk                    (clock_in_out_clk_clk),                            //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),     //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_pin_status_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_pin_status_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_pin_status_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_pin_status_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_pin_status_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_pin_status_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_pin_status_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_pin_status_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_pin_status_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_pin_status_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_pin_status_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_pin_status_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_pin_status_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                // (terminated),                                       
		.av_read                (),                                                // (terminated),                                       
		.av_writedata           (),                                                // (terminated),                                       
		.av_begintransfer       (),                                                // (terminated),                                       
		.av_beginbursttransfer  (),                                                // (terminated),                                       
		.av_burstcount          (),                                                // (terminated),                                       
		.av_byteenable          (),                                                // (terminated),                                       
		.av_readdatavalid       (1'b0),                                            // (terminated),                                       
		.av_waitrequest         (1'b0),                                            // (terminated),                                       
		.av_writebyteenable     (),                                                // (terminated),                                       
		.av_lock                (),                                                // (terminated),                                       
		.av_chipselect          (),                                                // (terminated),                                       
		.av_clken               (),                                                // (terminated),                                       
		.uav_clken              (1'b0),                                            // (terminated),                                       
		.av_debugaccess         (),                                                // (terminated),                                       
		.av_outputenable        (),                                                // (terminated),                                       
		.uav_response           (),                                                // (terminated),                                       
		.av_response            (2'b00),                                           // (terminated),                                       
		.uav_writeresponsevalid (),                                                // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                             // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_temperature_sdm_s1_translator (
		.clk                    (clock_in_out_clk_clk),                                 //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),          //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_temperature_sdm_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_temperature_sdm_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_temperature_sdm_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_temperature_sdm_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_temperature_sdm_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_temperature_sdm_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_temperature_sdm_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_temperature_sdm_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_temperature_sdm_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_temperature_sdm_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_temperature_sdm_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_temperature_sdm_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_temperature_sdm_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                     // (terminated),                                       
		.av_read                (),                                                     // (terminated),                                       
		.av_writedata           (),                                                     // (terminated),                                       
		.av_begintransfer       (),                                                     // (terminated),                                       
		.av_beginbursttransfer  (),                                                     // (terminated),                                       
		.av_burstcount          (),                                                     // (terminated),                                       
		.av_byteenable          (),                                                     // (terminated),                                       
		.av_readdatavalid       (1'b0),                                                 // (terminated),                                       
		.av_waitrequest         (1'b0),                                                 // (terminated),                                       
		.av_writebyteenable     (),                                                     // (terminated),                                       
		.av_lock                (),                                                     // (terminated),                                       
		.av_chipselect          (),                                                     // (terminated),                                       
		.av_clken               (),                                                     // (terminated),                                       
		.uav_clken              (1'b0),                                                 // (terminated),                                       
		.av_debugaccess         (),                                                     // (terminated),                                       
		.av_outputenable        (),                                                     // (terminated),                                       
		.uav_response           (),                                                     // (terminated),                                       
		.av_response            (2'b00),                                                // (terminated),                                       
		.uav_writeresponsevalid (),                                                     // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                  // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_temperature_xcvr1_s1_translator (
		.clk                    (clock_in_out_clk_clk),                                   //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),            //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_temperature_xcvr1_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_temperature_xcvr1_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_temperature_xcvr1_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_temperature_xcvr1_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_temperature_xcvr1_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_temperature_xcvr1_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_temperature_xcvr1_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_temperature_xcvr1_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_temperature_xcvr1_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_temperature_xcvr1_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_temperature_xcvr1_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_temperature_xcvr1_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_temperature_xcvr1_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                       // (terminated),                                       
		.av_read                (),                                                       // (terminated),                                       
		.av_writedata           (),                                                       // (terminated),                                       
		.av_begintransfer       (),                                                       // (terminated),                                       
		.av_beginbursttransfer  (),                                                       // (terminated),                                       
		.av_burstcount          (),                                                       // (terminated),                                       
		.av_byteenable          (),                                                       // (terminated),                                       
		.av_readdatavalid       (1'b0),                                                   // (terminated),                                       
		.av_waitrequest         (1'b0),                                                   // (terminated),                                       
		.av_writebyteenable     (),                                                       // (terminated),                                       
		.av_lock                (),                                                       // (terminated),                                       
		.av_chipselect          (),                                                       // (terminated),                                       
		.av_clken               (),                                                       // (terminated),                                       
		.uav_clken              (1'b0),                                                   // (terminated),                                       
		.av_debugaccess         (),                                                       // (terminated),                                       
		.av_outputenable        (),                                                       // (terminated),                                       
		.uav_response           (),                                                       // (terminated),                                       
		.av_response            (2'b00),                                                  // (terminated),                                       
		.uav_writeresponsevalid (),                                                       // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                    // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_temperature_board2_s1_translator (
		.clk                    (clock_in_out_clk_clk),                                    //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),             //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_temperature_board2_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_temperature_board2_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_temperature_board2_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_temperature_board2_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_temperature_board2_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_temperature_board2_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_temperature_board2_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_temperature_board2_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_temperature_board2_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_temperature_board2_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_temperature_board2_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_temperature_board2_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_temperature_board2_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                        // (terminated),                                       
		.av_read                (),                                                        // (terminated),                                       
		.av_writedata           (),                                                        // (terminated),                                       
		.av_begintransfer       (),                                                        // (terminated),                                       
		.av_beginbursttransfer  (),                                                        // (terminated),                                       
		.av_burstcount          (),                                                        // (terminated),                                       
		.av_byteenable          (),                                                        // (terminated),                                       
		.av_readdatavalid       (1'b0),                                                    // (terminated),                                       
		.av_waitrequest         (1'b0),                                                    // (terminated),                                       
		.av_writebyteenable     (),                                                        // (terminated),                                       
		.av_lock                (),                                                        // (terminated),                                       
		.av_chipselect          (),                                                        // (terminated),                                       
		.av_clken               (),                                                        // (terminated),                                       
		.uav_clken              (1'b0),                                                    // (terminated),                                       
		.av_debugaccess         (),                                                        // (terminated),                                       
		.av_outputenable        (),                                                        // (terminated),                                       
		.uav_response           (),                                                        // (terminated),                                       
		.av_response            (2'b00),                                                   // (terminated),                                       
		.uav_writeresponsevalid (),                                                        // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                     // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_temperature_xcvr2_s1_translator (
		.clk                    (clock_in_out_clk_clk),                                   //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),            //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_temperature_xcvr2_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_temperature_xcvr2_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_temperature_xcvr2_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_temperature_xcvr2_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_temperature_xcvr2_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_temperature_xcvr2_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_temperature_xcvr2_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_temperature_xcvr2_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_temperature_xcvr2_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_temperature_xcvr2_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_temperature_xcvr2_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_temperature_xcvr2_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_temperature_xcvr2_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                       // (terminated),                                       
		.av_read                (),                                                       // (terminated),                                       
		.av_writedata           (),                                                       // (terminated),                                       
		.av_begintransfer       (),                                                       // (terminated),                                       
		.av_beginbursttransfer  (),                                                       // (terminated),                                       
		.av_burstcount          (),                                                       // (terminated),                                       
		.av_byteenable          (),                                                       // (terminated),                                       
		.av_readdatavalid       (1'b0),                                                   // (terminated),                                       
		.av_waitrequest         (1'b0),                                                   // (terminated),                                       
		.av_writebyteenable     (),                                                       // (terminated),                                       
		.av_lock                (),                                                       // (terminated),                                       
		.av_chipselect          (),                                                       // (terminated),                                       
		.av_clken               (),                                                       // (terminated),                                       
		.uav_clken              (1'b0),                                                   // (terminated),                                       
		.av_debugaccess         (),                                                       // (terminated),                                       
		.av_outputenable        (),                                                       // (terminated),                                       
		.uav_response           (),                                                       // (terminated),                                       
		.av_response            (2'b00),                                                  // (terminated),                                       
		.uav_writeresponsevalid (),                                                       // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                    // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (3),
		.AV_DATA_W                      (16),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) timer_s1_translator (
		.clk                    (clock_in_out_clk_clk),                        //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,   width = 1,                    reset.reset
		.uav_address            (timer_s1_agent_m0_address),                   //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (timer_s1_agent_m0_burstcount),                //   input,   width = 3,                         .burstcount
		.uav_read               (timer_s1_agent_m0_read),                      //   input,   width = 1,                         .read
		.uav_write              (timer_s1_agent_m0_write),                     //   input,   width = 1,                         .write
		.uav_waitrequest        (timer_s1_agent_m0_waitrequest),               //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (timer_s1_agent_m0_readdatavalid),             //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (timer_s1_agent_m0_byteenable),                //   input,   width = 4,                         .byteenable
		.uav_readdata           (timer_s1_agent_m0_readdata),                  //  output,  width = 32,                         .readdata
		.uav_writedata          (timer_s1_agent_m0_writedata),                 //   input,  width = 32,                         .writedata
		.uav_lock               (timer_s1_agent_m0_lock),                      //   input,   width = 1,                         .lock
		.uav_debugaccess        (timer_s1_agent_m0_debugaccess),               //   input,   width = 1,                         .debugaccess
		.av_address             (timer_s1_address),                            //  output,   width = 3,      avalon_anti_slave_0.address
		.av_write               (timer_s1_write),                              //  output,   width = 1,                         .write
		.av_readdata            (timer_s1_readdata),                           //   input,  width = 16,                         .readdata
		.av_writedata           (timer_s1_writedata),                          //  output,  width = 16,                         .writedata
		.av_chipselect          (timer_s1_chipselect),                         //  output,   width = 1,                         .chipselect
		.av_read                (),                                            // (terminated),                                       
		.av_begintransfer       (),                                            // (terminated),                                       
		.av_beginbursttransfer  (),                                            // (terminated),                                       
		.av_burstcount          (),                                            // (terminated),                                       
		.av_byteenable          (),                                            // (terminated),                                       
		.av_readdatavalid       (1'b0),                                        // (terminated),                                       
		.av_waitrequest         (1'b0),                                        // (terminated),                                       
		.av_writebyteenable     (),                                            // (terminated),                                       
		.av_lock                (),                                            // (terminated),                                       
		.av_clken               (),                                            // (terminated),                                       
		.uav_clken              (1'b0),                                        // (terminated),                                       
		.av_debugaccess         (),                                            // (terminated),                                       
		.av_outputenable        (),                                            // (terminated),                                       
		.uav_response           (),                                            // (terminated),                                       
		.av_response            (2'b00),                                       // (terminated),                                       
		.uav_writeresponsevalid (),                                            // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                         // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_temperature_power_s1_translator (
		.clk                    (clock_in_out_clk_clk),                                   //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),            //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_temperature_power_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_temperature_power_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_temperature_power_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_temperature_power_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_temperature_power_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_temperature_power_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_temperature_power_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_temperature_power_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_temperature_power_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_temperature_power_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_temperature_power_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_temperature_power_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_temperature_power_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                       // (terminated),                                       
		.av_read                (),                                                       // (terminated),                                       
		.av_writedata           (),                                                       // (terminated),                                       
		.av_begintransfer       (),                                                       // (terminated),                                       
		.av_beginbursttransfer  (),                                                       // (terminated),                                       
		.av_burstcount          (),                                                       // (terminated),                                       
		.av_byteenable          (),                                                       // (terminated),                                       
		.av_readdatavalid       (1'b0),                                                   // (terminated),                                       
		.av_waitrequest         (1'b0),                                                   // (terminated),                                       
		.av_writebyteenable     (),                                                       // (terminated),                                       
		.av_lock                (),                                                       // (terminated),                                       
		.av_chipselect          (),                                                       // (terminated),                                       
		.av_clken               (),                                                       // (terminated),                                       
		.uav_clken              (1'b0),                                                   // (terminated),                                       
		.av_debugaccess         (),                                                       // (terminated),                                       
		.av_outputenable        (),                                                       // (terminated),                                       
		.uav_response           (),                                                       // (terminated),                                       
		.av_response            (2'b00),                                                  // (terminated),                                       
		.uav_writeresponsevalid (),                                                       // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                    // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_temperature_board3_s1_translator (
		.clk                    (clock_in_out_clk_clk),                                    //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),             //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_temperature_board3_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_temperature_board3_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_temperature_board3_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_temperature_board3_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_temperature_board3_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_temperature_board3_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_temperature_board3_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_temperature_board3_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_temperature_board3_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_temperature_board3_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_temperature_board3_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_temperature_board3_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_temperature_board3_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                        // (terminated),                                       
		.av_read                (),                                                        // (terminated),                                       
		.av_writedata           (),                                                        // (terminated),                                       
		.av_begintransfer       (),                                                        // (terminated),                                       
		.av_beginbursttransfer  (),                                                        // (terminated),                                       
		.av_burstcount          (),                                                        // (terminated),                                       
		.av_byteenable          (),                                                        // (terminated),                                       
		.av_readdatavalid       (1'b0),                                                    // (terminated),                                       
		.av_waitrequest         (1'b0),                                                    // (terminated),                                       
		.av_writebyteenable     (),                                                        // (terminated),                                       
		.av_lock                (),                                                        // (terminated),                                       
		.av_chipselect          (),                                                        // (terminated),                                       
		.av_clken               (),                                                        // (terminated),                                       
		.uav_clken              (1'b0),                                                    // (terminated),                                       
		.av_debugaccess         (),                                                        // (terminated),                                       
		.av_outputenable        (),                                                        // (terminated),                                       
		.uav_response           (),                                                        // (terminated),                                       
		.av_response            (2'b00),                                                   // (terminated),                                       
		.uav_writeresponsevalid (),                                                        // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                     // (terminated),                                       
	);

	system_altera_merlin_slave_translator_191_x56fcki #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (21),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0),
		.WAITREQUEST_ALLOWANCE          (0),
		.SYNC_RESET                     (0)
	) board_info_temperature_xcvr3_s1_translator (
		.clk                    (clock_in_out_clk_clk),                                   //   input,   width = 1,                      clk.clk
		.reset                  (jtag_uart_reset_reset_bridge_in_reset_reset),            //   input,   width = 1,                    reset.reset
		.uav_address            (board_info_temperature_xcvr3_s1_agent_m0_address),       //   input,  width = 21, avalon_universal_slave_0.address
		.uav_burstcount         (board_info_temperature_xcvr3_s1_agent_m0_burstcount),    //   input,   width = 3,                         .burstcount
		.uav_read               (board_info_temperature_xcvr3_s1_agent_m0_read),          //   input,   width = 1,                         .read
		.uav_write              (board_info_temperature_xcvr3_s1_agent_m0_write),         //   input,   width = 1,                         .write
		.uav_waitrequest        (board_info_temperature_xcvr3_s1_agent_m0_waitrequest),   //  output,   width = 1,                         .waitrequest
		.uav_readdatavalid      (board_info_temperature_xcvr3_s1_agent_m0_readdatavalid), //  output,   width = 1,                         .readdatavalid
		.uav_byteenable         (board_info_temperature_xcvr3_s1_agent_m0_byteenable),    //   input,   width = 4,                         .byteenable
		.uav_readdata           (board_info_temperature_xcvr3_s1_agent_m0_readdata),      //  output,  width = 32,                         .readdata
		.uav_writedata          (board_info_temperature_xcvr3_s1_agent_m0_writedata),     //   input,  width = 32,                         .writedata
		.uav_lock               (board_info_temperature_xcvr3_s1_agent_m0_lock),          //   input,   width = 1,                         .lock
		.uav_debugaccess        (board_info_temperature_xcvr3_s1_agent_m0_debugaccess),   //   input,   width = 1,                         .debugaccess
		.av_address             (board_info_temperature_xcvr3_s1_address),                //  output,   width = 2,      avalon_anti_slave_0.address
		.av_readdata            (board_info_temperature_xcvr3_s1_readdata),               //   input,  width = 32,                         .readdata
		.av_write               (),                                                       // (terminated),                                       
		.av_read                (),                                                       // (terminated),                                       
		.av_writedata           (),                                                       // (terminated),                                       
		.av_begintransfer       (),                                                       // (terminated),                                       
		.av_beginbursttransfer  (),                                                       // (terminated),                                       
		.av_burstcount          (),                                                       // (terminated),                                       
		.av_byteenable          (),                                                       // (terminated),                                       
		.av_readdatavalid       (1'b0),                                                   // (terminated),                                       
		.av_waitrequest         (1'b0),                                                   // (terminated),                                       
		.av_writebyteenable     (),                                                       // (terminated),                                       
		.av_lock                (),                                                       // (terminated),                                       
		.av_chipselect          (),                                                       // (terminated),                                       
		.av_clken               (),                                                       // (terminated),                                       
		.uav_clken              (1'b0),                                                   // (terminated),                                       
		.av_debugaccess         (),                                                       // (terminated),                                       
		.av_outputenable        (),                                                       // (terminated),                                       
		.uav_response           (),                                                       // (terminated),                                       
		.av_response            (2'b00),                                                  // (terminated),                                       
		.uav_writeresponsevalid (),                                                       // (terminated),                                       
		.av_writeresponsevalid  (1'b0)                                                    // (terminated),                                       
	);

	system_altera_merlin_master_agent_1921_2inlndi #(
		.PKT_WUNIQUE               (109),
		.PKT_DOMAIN_H              (108),
		.PKT_DOMAIN_L              (107),
		.PKT_SNOOP_H               (106),
		.PKT_SNOOP_L               (103),
		.PKT_BARRIER_H             (102),
		.PKT_BARRIER_L             (101),
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_QOS_H                 (77),
		.PKT_QOS_L                 (77),
		.PKT_DATA_SIDEBAND_H       (75),
		.PKT_DATA_SIDEBAND_L       (75),
		.PKT_ADDR_SIDEBAND_H       (74),
		.PKT_ADDR_SIDEBAND_L       (74),
		.PKT_BURST_TYPE_H          (73),
		.PKT_BURST_TYPE_L          (72),
		.PKT_CACHE_H               (95),
		.PKT_CACHE_L               (92),
		.PKT_THREAD_ID_H           (88),
		.PKT_THREAD_ID_L           (88),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_EXCLUSIVE       (62),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.ST_DATA_W                 (123),
		.ST_CHANNEL_W              (21),
		.AV_BURSTCOUNT_W           (3),
		.SUPPRESS_0_BYTEEN_RSP     (0),
		.ID                        (0),
		.BURSTWRAP_VALUE           (7),
		.CACHE_VALUE               (0),
		.SECURE_ACCESS_BIT         (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.DOMAIN_VALUE              (3),
		.BARRIER_VALUE             (0),
		.SNOOP_VALUE               (0),
		.WUNIQUE_VALUE             (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.USE_PKT_ADDRCHK           (0),
		.ROLE_BASED_USER           (0)
	) nios2_gen2_data_master_agent (
		.clk                   (clock_in_out_clk_clk),                                                      //   input,    width = 1,       clk.clk
		.reset                 (nios2_gen2_reset_reset_bridge_in_reset_reset),                              //   input,    width = 1, clk_reset.reset
		.av_address            (nios2_gen2_data_master_translator_avalon_universal_master_0_address),       //   input,   width = 21,        av.address
		.av_write              (nios2_gen2_data_master_translator_avalon_universal_master_0_write),         //   input,    width = 1,          .write
		.av_read               (nios2_gen2_data_master_translator_avalon_universal_master_0_read),          //   input,    width = 1,          .read
		.av_writedata          (nios2_gen2_data_master_translator_avalon_universal_master_0_writedata),     //   input,   width = 32,          .writedata
		.av_readdata           (nios2_gen2_data_master_translator_avalon_universal_master_0_readdata),      //  output,   width = 32,          .readdata
		.av_waitrequest        (nios2_gen2_data_master_translator_avalon_universal_master_0_waitrequest),   //  output,    width = 1,          .waitrequest
		.av_readdatavalid      (nios2_gen2_data_master_translator_avalon_universal_master_0_readdatavalid), //  output,    width = 1,          .readdatavalid
		.av_byteenable         (nios2_gen2_data_master_translator_avalon_universal_master_0_byteenable),    //   input,    width = 4,          .byteenable
		.av_burstcount         (nios2_gen2_data_master_translator_avalon_universal_master_0_burstcount),    //   input,    width = 3,          .burstcount
		.av_debugaccess        (nios2_gen2_data_master_translator_avalon_universal_master_0_debugaccess),   //   input,    width = 1,          .debugaccess
		.av_lock               (nios2_gen2_data_master_translator_avalon_universal_master_0_lock),          //   input,    width = 1,          .lock
		.cp_valid              (nios2_gen2_data_master_agent_cp_valid),                                     //  output,    width = 1,        cp.valid
		.cp_data               (nios2_gen2_data_master_agent_cp_data),                                      //  output,  width = 123,          .data
		.cp_startofpacket      (nios2_gen2_data_master_agent_cp_startofpacket),                             //  output,    width = 1,          .startofpacket
		.cp_endofpacket        (nios2_gen2_data_master_agent_cp_endofpacket),                               //  output,    width = 1,          .endofpacket
		.cp_ready              (nios2_gen2_data_master_agent_cp_ready),                                     //   input,    width = 1,          .ready
		.rp_valid              (nios2_gen2_data_master_limiter_rsp_src_valid),                              //   input,    width = 1,        rp.valid
		.rp_data               (nios2_gen2_data_master_limiter_rsp_src_data),                               //   input,  width = 123,          .data
		.rp_channel            (nios2_gen2_data_master_limiter_rsp_src_channel),                            //   input,   width = 21,          .channel
		.rp_startofpacket      (nios2_gen2_data_master_limiter_rsp_src_startofpacket),                      //   input,    width = 1,          .startofpacket
		.rp_endofpacket        (nios2_gen2_data_master_limiter_rsp_src_endofpacket),                        //   input,    width = 1,          .endofpacket
		.rp_ready              (nios2_gen2_data_master_limiter_rsp_src_ready),                              //  output,    width = 1,          .ready
		.av_response           (),                                                                          // (terminated),                         
		.av_writeresponsevalid ()                                                                           // (terminated),                         
	);

	system_altera_merlin_master_agent_1921_2inlndi #(
		.PKT_WUNIQUE               (109),
		.PKT_DOMAIN_H              (108),
		.PKT_DOMAIN_L              (107),
		.PKT_SNOOP_H               (106),
		.PKT_SNOOP_L               (103),
		.PKT_BARRIER_H             (102),
		.PKT_BARRIER_L             (101),
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_QOS_H                 (77),
		.PKT_QOS_L                 (77),
		.PKT_DATA_SIDEBAND_H       (75),
		.PKT_DATA_SIDEBAND_L       (75),
		.PKT_ADDR_SIDEBAND_H       (74),
		.PKT_ADDR_SIDEBAND_L       (74),
		.PKT_BURST_TYPE_H          (73),
		.PKT_BURST_TYPE_L          (72),
		.PKT_CACHE_H               (95),
		.PKT_CACHE_L               (92),
		.PKT_THREAD_ID_H           (88),
		.PKT_THREAD_ID_L           (88),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_EXCLUSIVE       (62),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.ST_DATA_W                 (123),
		.ST_CHANNEL_W              (21),
		.AV_BURSTCOUNT_W           (3),
		.SUPPRESS_0_BYTEEN_RSP     (0),
		.ID                        (1),
		.BURSTWRAP_VALUE           (3),
		.CACHE_VALUE               (0),
		.SECURE_ACCESS_BIT         (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.DOMAIN_VALUE              (3),
		.BARRIER_VALUE             (0),
		.SNOOP_VALUE               (0),
		.WUNIQUE_VALUE             (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.USE_PKT_ADDRCHK           (0),
		.ROLE_BASED_USER           (0)
	) nios2_gen2_instruction_master_agent (
		.clk                   (clock_in_out_clk_clk),                                                             //   input,    width = 1,       clk.clk
		.reset                 (nios2_gen2_reset_reset_bridge_in_reset_reset),                                     //   input,    width = 1, clk_reset.reset
		.av_address            (nios2_gen2_instruction_master_translator_avalon_universal_master_0_address),       //   input,   width = 21,        av.address
		.av_write              (nios2_gen2_instruction_master_translator_avalon_universal_master_0_write),         //   input,    width = 1,          .write
		.av_read               (nios2_gen2_instruction_master_translator_avalon_universal_master_0_read),          //   input,    width = 1,          .read
		.av_writedata          (nios2_gen2_instruction_master_translator_avalon_universal_master_0_writedata),     //   input,   width = 32,          .writedata
		.av_readdata           (nios2_gen2_instruction_master_translator_avalon_universal_master_0_readdata),      //  output,   width = 32,          .readdata
		.av_waitrequest        (nios2_gen2_instruction_master_translator_avalon_universal_master_0_waitrequest),   //  output,    width = 1,          .waitrequest
		.av_readdatavalid      (nios2_gen2_instruction_master_translator_avalon_universal_master_0_readdatavalid), //  output,    width = 1,          .readdatavalid
		.av_byteenable         (nios2_gen2_instruction_master_translator_avalon_universal_master_0_byteenable),    //   input,    width = 4,          .byteenable
		.av_burstcount         (nios2_gen2_instruction_master_translator_avalon_universal_master_0_burstcount),    //   input,    width = 3,          .burstcount
		.av_debugaccess        (nios2_gen2_instruction_master_translator_avalon_universal_master_0_debugaccess),   //   input,    width = 1,          .debugaccess
		.av_lock               (nios2_gen2_instruction_master_translator_avalon_universal_master_0_lock),          //   input,    width = 1,          .lock
		.cp_valid              (nios2_gen2_instruction_master_agent_cp_valid),                                     //  output,    width = 1,        cp.valid
		.cp_data               (nios2_gen2_instruction_master_agent_cp_data),                                      //  output,  width = 123,          .data
		.cp_startofpacket      (nios2_gen2_instruction_master_agent_cp_startofpacket),                             //  output,    width = 1,          .startofpacket
		.cp_endofpacket        (nios2_gen2_instruction_master_agent_cp_endofpacket),                               //  output,    width = 1,          .endofpacket
		.cp_ready              (nios2_gen2_instruction_master_agent_cp_ready),                                     //   input,    width = 1,          .ready
		.rp_valid              (nios2_gen2_instruction_master_limiter_rsp_src_valid),                              //   input,    width = 1,        rp.valid
		.rp_data               (nios2_gen2_instruction_master_limiter_rsp_src_data),                               //   input,  width = 123,          .data
		.rp_channel            (nios2_gen2_instruction_master_limiter_rsp_src_channel),                            //   input,   width = 21,          .channel
		.rp_startofpacket      (nios2_gen2_instruction_master_limiter_rsp_src_startofpacket),                      //   input,    width = 1,          .startofpacket
		.rp_endofpacket        (nios2_gen2_instruction_master_limiter_rsp_src_endofpacket),                        //   input,    width = 1,          .endofpacket
		.rp_ready              (nios2_gen2_instruction_master_limiter_rsp_src_ready),                              //  output,    width = 1,          .ready
		.av_response           (),                                                                                 // (terminated),                         
		.av_writeresponsevalid ()                                                                                  // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) jtag_uart_avalon_jtag_slave_agent (
		.clk                     (clock_in_out_clk_clk),                                         //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                  //   input,    width = 1,       clk_reset.reset
		.m0_address              (jtag_uart_avalon_jtag_slave_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (jtag_uart_avalon_jtag_slave_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (jtag_uart_avalon_jtag_slave_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (jtag_uart_avalon_jtag_slave_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (jtag_uart_avalon_jtag_slave_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (jtag_uart_avalon_jtag_slave_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (jtag_uart_avalon_jtag_slave_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (jtag_uart_avalon_jtag_slave_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (jtag_uart_avalon_jtag_slave_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (jtag_uart_avalon_jtag_slave_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (jtag_uart_avalon_jtag_slave_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (jtag_uart_avalon_jtag_slave_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (jtag_uart_avalon_jtag_slave_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (jtag_uart_avalon_jtag_slave_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (jtag_uart_avalon_jtag_slave_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_src_ready),                                            //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_src_valid),                                            //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_src_data),                                             //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_src_startofpacket),                                    //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_src_endofpacket),                                      //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_src_channel),                                          //   input,   width = 21,                .channel
		.rf_sink_ready           (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (jtag_uart_avalon_jtag_slave_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (jtag_uart_avalon_jtag_slave_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (jtag_uart_avalon_jtag_slave_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                        // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                         // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                          // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) jtag_uart_avalon_jtag_slave_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                         //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                  //   input,    width = 1, clk_reset.reset
		.in_data           (jtag_uart_avalon_jtag_slave_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (jtag_uart_avalon_jtag_slave_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (jtag_uart_avalon_jtag_slave_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                        // (terminated),                         
		.csr_read          (1'b0),                                                         // (terminated),                         
		.csr_write         (1'b0),                                                         // (terminated),                         
		.csr_readdata      (),                                                             // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                         // (terminated),                         
		.almost_full_data  (),                                                             // (terminated),                         
		.almost_empty_data (),                                                             // (terminated),                         
		.in_empty          (1'b0),                                                         // (terminated),                         
		.out_empty         (),                                                             // (terminated),                         
		.in_error          (1'b0),                                                         // (terminated),                         
		.out_error         (),                                                             // (terminated),                         
		.in_channel        (1'b0),                                                         // (terminated),                         
		.out_channel       ()                                                              // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) sysid_qsys_control_slave_agent (
		.clk                     (clock_in_out_clk_clk),                                      //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),               //   input,    width = 1,       clk_reset.reset
		.m0_address              (sysid_qsys_control_slave_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (sysid_qsys_control_slave_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (sysid_qsys_control_slave_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (sysid_qsys_control_slave_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (sysid_qsys_control_slave_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (sysid_qsys_control_slave_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (sysid_qsys_control_slave_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (sysid_qsys_control_slave_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (sysid_qsys_control_slave_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (sysid_qsys_control_slave_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (sysid_qsys_control_slave_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (sysid_qsys_control_slave_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (sysid_qsys_control_slave_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (sysid_qsys_control_slave_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (sysid_qsys_control_slave_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (sysid_qsys_control_slave_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_001_src_ready),                                     //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_001_src_valid),                                     //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_001_src_data),                                      //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_001_src_startofpacket),                             //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_001_src_endofpacket),                               //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_001_src_channel),                                   //   input,   width = 21,                .channel
		.rf_sink_ready           (sysid_qsys_control_slave_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (sysid_qsys_control_slave_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (sysid_qsys_control_slave_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (sysid_qsys_control_slave_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (sysid_qsys_control_slave_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (sysid_qsys_control_slave_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (sysid_qsys_control_slave_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (sysid_qsys_control_slave_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (sysid_qsys_control_slave_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (sysid_qsys_control_slave_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (sysid_qsys_control_slave_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (sysid_qsys_control_slave_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (sysid_qsys_control_slave_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (sysid_qsys_control_slave_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (sysid_qsys_control_slave_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (sysid_qsys_control_slave_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                     // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                      // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                       // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) sysid_qsys_control_slave_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                      //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),               //   input,    width = 1, clk_reset.reset
		.in_data           (sysid_qsys_control_slave_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (sysid_qsys_control_slave_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (sysid_qsys_control_slave_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (sysid_qsys_control_slave_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (sysid_qsys_control_slave_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (sysid_qsys_control_slave_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (sysid_qsys_control_slave_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (sysid_qsys_control_slave_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (sysid_qsys_control_slave_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (sysid_qsys_control_slave_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                     // (terminated),                         
		.csr_read          (1'b0),                                                      // (terminated),                         
		.csr_write         (1'b0),                                                      // (terminated),                         
		.csr_readdata      (),                                                          // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                      // (terminated),                         
		.almost_full_data  (),                                                          // (terminated),                         
		.almost_empty_data (),                                                          // (terminated),                         
		.in_empty          (1'b0),                                                      // (terminated),                         
		.out_empty         (),                                                          // (terminated),                         
		.in_error          (1'b0),                                                      // (terminated),                         
		.out_error         (),                                                          // (terminated),                         
		.in_channel        (1'b0),                                                      // (terminated),                         
		.out_channel       ()                                                           // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) nios2_gen2_debug_mem_slave_agent (
		.clk                     (clock_in_out_clk_clk),                                        //   input,    width = 1,             clk.clk
		.reset                   (nios2_gen2_reset_reset_bridge_in_reset_reset),                //   input,    width = 1,       clk_reset.reset
		.m0_address              (nios2_gen2_debug_mem_slave_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (nios2_gen2_debug_mem_slave_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (nios2_gen2_debug_mem_slave_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (nios2_gen2_debug_mem_slave_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (nios2_gen2_debug_mem_slave_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (nios2_gen2_debug_mem_slave_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (nios2_gen2_debug_mem_slave_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (nios2_gen2_debug_mem_slave_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (nios2_gen2_debug_mem_slave_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (nios2_gen2_debug_mem_slave_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (nios2_gen2_debug_mem_slave_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (nios2_gen2_debug_mem_slave_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (nios2_gen2_debug_mem_slave_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (nios2_gen2_debug_mem_slave_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (nios2_gen2_debug_mem_slave_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (nios2_gen2_debug_mem_slave_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_002_src_ready),                                       //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_002_src_valid),                                       //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_002_src_data),                                        //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_002_src_startofpacket),                               //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_002_src_endofpacket),                                 //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_002_src_channel),                                     //   input,   width = 21,                .channel
		.rf_sink_ready           (nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (nios2_gen2_debug_mem_slave_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (nios2_gen2_debug_mem_slave_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (nios2_gen2_debug_mem_slave_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (nios2_gen2_debug_mem_slave_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (nios2_gen2_debug_mem_slave_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (nios2_gen2_debug_mem_slave_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (nios2_gen2_debug_mem_slave_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (nios2_gen2_debug_mem_slave_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (nios2_gen2_debug_mem_slave_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (nios2_gen2_debug_mem_slave_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (nios2_gen2_debug_mem_slave_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                       // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                        // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                         // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) nios2_gen2_debug_mem_slave_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                        //   input,    width = 1,       clk.clk
		.reset             (nios2_gen2_reset_reset_bridge_in_reset_reset),                //   input,    width = 1, clk_reset.reset
		.in_data           (nios2_gen2_debug_mem_slave_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (nios2_gen2_debug_mem_slave_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (nios2_gen2_debug_mem_slave_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (nios2_gen2_debug_mem_slave_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (nios2_gen2_debug_mem_slave_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (nios2_gen2_debug_mem_slave_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                       // (terminated),                         
		.csr_read          (1'b0),                                                        // (terminated),                         
		.csr_write         (1'b0),                                                        // (terminated),                         
		.csr_readdata      (),                                                            // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                        // (terminated),                         
		.almost_full_data  (),                                                            // (terminated),                         
		.almost_empty_data (),                                                            // (terminated),                         
		.in_empty          (1'b0),                                                        // (terminated),                         
		.out_empty         (),                                                            // (terminated),                         
		.in_error          (1'b0),                                                        // (terminated),                         
		.out_error         (),                                                            // (terminated),                         
		.in_channel        (1'b0),                                                        // (terminated),                         
		.out_channel       ()                                                             // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) onchip_memory2_s1_agent (
		.clk                     (clock_in_out_clk_clk),                               //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),        //   input,    width = 1,       clk_reset.reset
		.m0_address              (onchip_memory2_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (onchip_memory2_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (onchip_memory2_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (onchip_memory2_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (onchip_memory2_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (onchip_memory2_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (onchip_memory2_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (onchip_memory2_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (onchip_memory2_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (onchip_memory2_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (onchip_memory2_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (onchip_memory2_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (onchip_memory2_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (onchip_memory2_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (onchip_memory2_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (onchip_memory2_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_003_src_ready),                              //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_003_src_valid),                              //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_003_src_data),                               //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_003_src_startofpacket),                      //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_003_src_endofpacket),                        //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_003_src_channel),                            //   input,   width = 21,                .channel
		.rf_sink_ready           (onchip_memory2_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (onchip_memory2_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (onchip_memory2_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (onchip_memory2_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (onchip_memory2_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (onchip_memory2_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (onchip_memory2_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (onchip_memory2_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (onchip_memory2_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (onchip_memory2_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (onchip_memory2_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (onchip_memory2_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (onchip_memory2_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (onchip_memory2_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (onchip_memory2_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (onchip_memory2_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                              // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                               // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) onchip_memory2_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                               //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),        //   input,    width = 1, clk_reset.reset
		.in_data           (onchip_memory2_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (onchip_memory2_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (onchip_memory2_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (onchip_memory2_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (onchip_memory2_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (onchip_memory2_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (onchip_memory2_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (onchip_memory2_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (onchip_memory2_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (onchip_memory2_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                              // (terminated),                         
		.csr_read          (1'b0),                                               // (terminated),                         
		.csr_write         (1'b0),                                               // (terminated),                         
		.csr_readdata      (),                                                   // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),               // (terminated),                         
		.almost_full_data  (),                                                   // (terminated),                         
		.almost_empty_data (),                                                   // (terminated),                         
		.in_empty          (1'b0),                                               // (terminated),                         
		.out_empty         (),                                                   // (terminated),                         
		.in_error          (1'b0),                                               // (terminated),                         
		.out_error         (),                                                   // (terminated),                         
		.in_channel        (1'b0),                                               // (terminated),                         
		.out_channel       ()                                                    // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_temperature_fpga_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                            //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                     //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_temperature_fpga_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_temperature_fpga_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_temperature_fpga_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_temperature_fpga_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_temperature_fpga_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_temperature_fpga_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_temperature_fpga_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_temperature_fpga_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_temperature_fpga_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_temperature_fpga_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_temperature_fpga_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_temperature_fpga_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_temperature_fpga_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_temperature_fpga_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_temperature_fpga_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_temperature_fpga_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_004_src_ready),                                           //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_004_src_valid),                                           //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_004_src_data),                                            //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_004_src_startofpacket),                                   //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_004_src_endofpacket),                                     //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_004_src_channel),                                         //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_temperature_fpga_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_temperature_fpga_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_temperature_fpga_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_temperature_fpga_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_temperature_fpga_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_temperature_fpga_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_temperature_fpga_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_temperature_fpga_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_temperature_fpga_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_temperature_fpga_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_temperature_fpga_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_temperature_fpga_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_temperature_fpga_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_temperature_fpga_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_temperature_fpga_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_temperature_fpga_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                           // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                            // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                             // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_temperature_fpga_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                            //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                     //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_temperature_fpga_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_temperature_fpga_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_temperature_fpga_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_temperature_fpga_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_temperature_fpga_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_temperature_fpga_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_temperature_fpga_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_temperature_fpga_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_temperature_fpga_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_temperature_fpga_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                           // (terminated),                         
		.csr_read          (1'b0),                                                            // (terminated),                         
		.csr_write         (1'b0),                                                            // (terminated),                         
		.csr_readdata      (),                                                                // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                            // (terminated),                         
		.almost_full_data  (),                                                                // (terminated),                         
		.almost_empty_data (),                                                                // (terminated),                         
		.in_empty          (1'b0),                                                            // (terminated),                         
		.out_empty         (),                                                                // (terminated),                         
		.in_error          (1'b0),                                                            // (terminated),                         
		.out_error         (),                                                                // (terminated),                         
		.in_channel        (1'b0),                                                            // (terminated),                         
		.out_channel       ()                                                                 // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_temperature_board1_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                              //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                       //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_temperature_board1_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_temperature_board1_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_temperature_board1_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_temperature_board1_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_temperature_board1_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_temperature_board1_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_temperature_board1_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_temperature_board1_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_temperature_board1_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_temperature_board1_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_temperature_board1_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_temperature_board1_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_temperature_board1_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_temperature_board1_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_temperature_board1_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_temperature_board1_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_005_src_ready),                                             //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_005_src_valid),                                             //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_005_src_data),                                              //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_005_src_startofpacket),                                     //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_005_src_endofpacket),                                       //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_005_src_channel),                                           //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_temperature_board1_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_temperature_board1_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_temperature_board1_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_temperature_board1_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_temperature_board1_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_temperature_board1_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_temperature_board1_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_temperature_board1_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_temperature_board1_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_temperature_board1_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_temperature_board1_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_temperature_board1_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_temperature_board1_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_temperature_board1_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_temperature_board1_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_temperature_board1_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                             // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                              // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                               // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_temperature_board1_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                              //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                       //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_temperature_board1_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_temperature_board1_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_temperature_board1_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_temperature_board1_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_temperature_board1_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_temperature_board1_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_temperature_board1_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_temperature_board1_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_temperature_board1_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_temperature_board1_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                             // (terminated),                         
		.csr_read          (1'b0),                                                              // (terminated),                         
		.csr_write         (1'b0),                                                              // (terminated),                         
		.csr_readdata      (),                                                                  // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                              // (terminated),                         
		.almost_full_data  (),                                                                  // (terminated),                         
		.almost_empty_data (),                                                                  // (terminated),                         
		.in_empty          (1'b0),                                                              // (terminated),                         
		.out_empty         (),                                                                  // (terminated),                         
		.in_error          (1'b0),                                                              // (terminated),                         
		.out_error         (),                                                                  // (terminated),                         
		.in_channel        (1'b0),                                                              // (terminated),                         
		.out_channel       ()                                                                   // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_fan_speed1_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                      //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),               //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_fan_speed1_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_fan_speed1_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_fan_speed1_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_fan_speed1_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_fan_speed1_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_fan_speed1_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_fan_speed1_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_fan_speed1_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_fan_speed1_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_fan_speed1_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_fan_speed1_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_fan_speed1_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_fan_speed1_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_fan_speed1_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_fan_speed1_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_fan_speed1_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_006_src_ready),                                     //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_006_src_valid),                                     //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_006_src_data),                                      //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_006_src_startofpacket),                             //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_006_src_endofpacket),                               //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_006_src_channel),                                   //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_fan_speed1_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_fan_speed1_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_fan_speed1_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_fan_speed1_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_fan_speed1_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_fan_speed1_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_fan_speed1_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_fan_speed1_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_fan_speed1_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_fan_speed1_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_fan_speed1_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_fan_speed1_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_fan_speed1_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_fan_speed1_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_fan_speed1_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_fan_speed1_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                     // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                      // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                       // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_fan_speed1_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                      //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),               //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_fan_speed1_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_fan_speed1_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_fan_speed1_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_fan_speed1_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_fan_speed1_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_fan_speed1_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_fan_speed1_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_fan_speed1_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_fan_speed1_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_fan_speed1_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                     // (terminated),                         
		.csr_read          (1'b0),                                                      // (terminated),                         
		.csr_write         (1'b0),                                                      // (terminated),                         
		.csr_readdata      (),                                                          // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                      // (terminated),                         
		.almost_full_data  (),                                                          // (terminated),                         
		.almost_empty_data (),                                                          // (terminated),                         
		.in_empty          (1'b0),                                                      // (terminated),                         
		.out_empty         (),                                                          // (terminated),                         
		.in_error          (1'b0),                                                      // (terminated),                         
		.out_error         (),                                                          // (terminated),                         
		.in_channel        (1'b0),                                                      // (terminated),                         
		.out_channel       ()                                                           // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_fan_speed2_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                      //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),               //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_fan_speed2_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_fan_speed2_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_fan_speed2_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_fan_speed2_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_fan_speed2_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_fan_speed2_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_fan_speed2_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_fan_speed2_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_fan_speed2_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_fan_speed2_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_fan_speed2_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_fan_speed2_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_fan_speed2_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_fan_speed2_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_fan_speed2_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_fan_speed2_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_007_src_ready),                                     //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_007_src_valid),                                     //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_007_src_data),                                      //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_007_src_startofpacket),                             //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_007_src_endofpacket),                               //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_007_src_channel),                                   //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_fan_speed2_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_fan_speed2_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_fan_speed2_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_fan_speed2_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_fan_speed2_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_fan_speed2_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_fan_speed2_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_fan_speed2_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_fan_speed2_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_fan_speed2_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_fan_speed2_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_fan_speed2_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_fan_speed2_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_fan_speed2_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_fan_speed2_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_fan_speed2_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                     // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                      // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                       // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_fan_speed2_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                      //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),               //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_fan_speed2_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_fan_speed2_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_fan_speed2_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_fan_speed2_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_fan_speed2_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_fan_speed2_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_fan_speed2_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_fan_speed2_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_fan_speed2_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_fan_speed2_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                     // (terminated),                         
		.csr_read          (1'b0),                                                      // (terminated),                         
		.csr_write         (1'b0),                                                      // (terminated),                         
		.csr_readdata      (),                                                          // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                      // (terminated),                         
		.almost_full_data  (),                                                          // (terminated),                         
		.almost_empty_data (),                                                          // (terminated),                         
		.in_empty          (1'b0),                                                      // (terminated),                         
		.out_empty         (),                                                          // (terminated),                         
		.in_error          (1'b0),                                                      // (terminated),                         
		.out_error         (),                                                          // (terminated),                         
		.in_channel        (1'b0),                                                      // (terminated),                         
		.out_channel       ()                                                           // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_core_current_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                        //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                 //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_core_current_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_core_current_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_core_current_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_core_current_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_core_current_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_core_current_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_core_current_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_core_current_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_core_current_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_core_current_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_core_current_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_core_current_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_core_current_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_core_current_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_core_current_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_core_current_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_008_src_ready),                                       //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_008_src_valid),                                       //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_008_src_data),                                        //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_008_src_startofpacket),                               //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_008_src_endofpacket),                                 //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_008_src_channel),                                     //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_core_current_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_core_current_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_core_current_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_core_current_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_core_current_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_core_current_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_core_current_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_core_current_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_core_current_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_core_current_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_core_current_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_core_current_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_core_current_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_core_current_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_core_current_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_core_current_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                       // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                        // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                         // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_core_current_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                        //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                 //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_core_current_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_core_current_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_core_current_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_core_current_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_core_current_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_core_current_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_core_current_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_core_current_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_core_current_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_core_current_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                       // (terminated),                         
		.csr_read          (1'b0),                                                        // (terminated),                         
		.csr_write         (1'b0),                                                        // (terminated),                         
		.csr_readdata      (),                                                            // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                        // (terminated),                         
		.almost_full_data  (),                                                            // (terminated),                         
		.almost_empty_data (),                                                            // (terminated),                         
		.in_empty          (1'b0),                                                        // (terminated),                         
		.out_empty         (),                                                            // (terminated),                         
		.in_error          (1'b0),                                                        // (terminated),                         
		.out_error         (),                                                            // (terminated),                         
		.in_channel        (1'b0),                                                        // (terminated),                         
		.out_channel       ()                                                             // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_core_voltage_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                        //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                 //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_core_voltage_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_core_voltage_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_core_voltage_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_core_voltage_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_core_voltage_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_core_voltage_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_core_voltage_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_core_voltage_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_core_voltage_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_core_voltage_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_core_voltage_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_core_voltage_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_core_voltage_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_core_voltage_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_core_voltage_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_core_voltage_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_009_src_ready),                                       //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_009_src_valid),                                       //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_009_src_data),                                        //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_009_src_startofpacket),                               //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_009_src_endofpacket),                                 //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_009_src_channel),                                     //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_core_voltage_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_core_voltage_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_core_voltage_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_core_voltage_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_core_voltage_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_core_voltage_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_core_voltage_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_core_voltage_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_core_voltage_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_core_voltage_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_core_voltage_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_core_voltage_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_core_voltage_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_core_voltage_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_core_voltage_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_core_voltage_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                       // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                        // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                         // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_core_voltage_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                        //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                 //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_core_voltage_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_core_voltage_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_core_voltage_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_core_voltage_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_core_voltage_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_core_voltage_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_core_voltage_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_core_voltage_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_core_voltage_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_core_voltage_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                       // (terminated),                         
		.csr_read          (1'b0),                                                        // (terminated),                         
		.csr_write         (1'b0),                                                        // (terminated),                         
		.csr_readdata      (),                                                            // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                        // (terminated),                         
		.almost_full_data  (),                                                            // (terminated),                         
		.almost_empty_data (),                                                            // (terminated),                         
		.in_empty          (1'b0),                                                        // (terminated),                         
		.out_empty         (),                                                            // (terminated),                         
		.in_error          (1'b0),                                                        // (terminated),                         
		.out_error         (),                                                            // (terminated),                         
		.in_channel        (1'b0),                                                        // (terminated),                         
		.out_channel       ()                                                             // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_power_in_current_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                            //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                     //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_power_in_current_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_power_in_current_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_power_in_current_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_power_in_current_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_power_in_current_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_power_in_current_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_power_in_current_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_power_in_current_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_power_in_current_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_power_in_current_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_power_in_current_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_power_in_current_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_power_in_current_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_power_in_current_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_power_in_current_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_power_in_current_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_010_src_ready),                                           //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_010_src_valid),                                           //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_010_src_data),                                            //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_010_src_startofpacket),                                   //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_010_src_endofpacket),                                     //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_010_src_channel),                                         //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_power_in_current_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_power_in_current_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_power_in_current_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_power_in_current_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_power_in_current_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_power_in_current_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_power_in_current_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_power_in_current_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_power_in_current_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_power_in_current_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_power_in_current_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_power_in_current_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_power_in_current_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_power_in_current_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_power_in_current_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_power_in_current_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                           // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                            // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                             // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_power_in_current_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                            //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                     //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_power_in_current_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_power_in_current_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_power_in_current_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_power_in_current_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_power_in_current_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_power_in_current_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_power_in_current_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_power_in_current_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_power_in_current_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_power_in_current_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                           // (terminated),                         
		.csr_read          (1'b0),                                                            // (terminated),                         
		.csr_write         (1'b0),                                                            // (terminated),                         
		.csr_readdata      (),                                                                // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                            // (terminated),                         
		.almost_full_data  (),                                                                // (terminated),                         
		.almost_empty_data (),                                                                // (terminated),                         
		.in_empty          (1'b0),                                                            // (terminated),                         
		.out_empty         (),                                                                // (terminated),                         
		.in_error          (1'b0),                                                            // (terminated),                         
		.out_error         (),                                                                // (terminated),                         
		.in_channel        (1'b0),                                                            // (terminated),                         
		.out_channel       ()                                                                 // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_power_in_voltage_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                            //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                     //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_power_in_voltage_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_power_in_voltage_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_power_in_voltage_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_power_in_voltage_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_power_in_voltage_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_power_in_voltage_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_power_in_voltage_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_power_in_voltage_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_power_in_voltage_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_power_in_voltage_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_power_in_voltage_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_power_in_voltage_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_power_in_voltage_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_power_in_voltage_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_power_in_voltage_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_power_in_voltage_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_011_src_ready),                                           //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_011_src_valid),                                           //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_011_src_data),                                            //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_011_src_startofpacket),                                   //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_011_src_endofpacket),                                     //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_011_src_channel),                                         //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_power_in_voltage_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_power_in_voltage_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_power_in_voltage_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_power_in_voltage_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_power_in_voltage_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_power_in_voltage_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_power_in_voltage_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_power_in_voltage_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_power_in_voltage_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_power_in_voltage_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_power_in_voltage_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_power_in_voltage_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_power_in_voltage_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_power_in_voltage_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_power_in_voltage_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_power_in_voltage_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                           // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                            // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                             // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_power_in_voltage_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                            //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                     //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_power_in_voltage_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_power_in_voltage_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_power_in_voltage_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_power_in_voltage_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_power_in_voltage_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_power_in_voltage_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_power_in_voltage_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_power_in_voltage_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_power_in_voltage_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_power_in_voltage_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                           // (terminated),                         
		.csr_read          (1'b0),                                                            // (terminated),                         
		.csr_write         (1'b0),                                                            // (terminated),                         
		.csr_readdata      (),                                                                // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                            // (terminated),                         
		.almost_full_data  (),                                                                // (terminated),                         
		.almost_empty_data (),                                                                // (terminated),                         
		.in_empty          (1'b0),                                                            // (terminated),                         
		.out_empty         (),                                                                // (terminated),                         
		.in_error          (1'b0),                                                            // (terminated),                         
		.out_error         (),                                                                // (terminated),                         
		.in_channel        (1'b0),                                                            // (terminated),                         
		.out_channel       ()                                                                 // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_pin_status_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                      //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),               //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_pin_status_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_pin_status_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_pin_status_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_pin_status_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_pin_status_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_pin_status_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_pin_status_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_pin_status_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_pin_status_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_pin_status_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_pin_status_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_pin_status_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_pin_status_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_pin_status_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_pin_status_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_pin_status_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_012_src_ready),                                     //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_012_src_valid),                                     //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_012_src_data),                                      //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_012_src_startofpacket),                             //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_012_src_endofpacket),                               //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_012_src_channel),                                   //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_pin_status_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_pin_status_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_pin_status_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_pin_status_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_pin_status_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_pin_status_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_pin_status_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_pin_status_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_pin_status_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_pin_status_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_pin_status_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_pin_status_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_pin_status_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_pin_status_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_pin_status_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_pin_status_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                     // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                      // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                       // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_pin_status_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                      //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),               //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_pin_status_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_pin_status_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_pin_status_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_pin_status_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_pin_status_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_pin_status_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_pin_status_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_pin_status_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_pin_status_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_pin_status_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                     // (terminated),                         
		.csr_read          (1'b0),                                                      // (terminated),                         
		.csr_write         (1'b0),                                                      // (terminated),                         
		.csr_readdata      (),                                                          // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                      // (terminated),                         
		.almost_full_data  (),                                                          // (terminated),                         
		.almost_empty_data (),                                                          // (terminated),                         
		.in_empty          (1'b0),                                                      // (terminated),                         
		.out_empty         (),                                                          // (terminated),                         
		.in_error          (1'b0),                                                      // (terminated),                         
		.out_error         (),                                                          // (terminated),                         
		.in_channel        (1'b0),                                                      // (terminated),                         
		.out_channel       ()                                                           // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_temperature_sdm_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                           //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                    //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_temperature_sdm_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_temperature_sdm_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_temperature_sdm_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_temperature_sdm_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_temperature_sdm_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_temperature_sdm_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_temperature_sdm_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_temperature_sdm_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_temperature_sdm_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_temperature_sdm_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_temperature_sdm_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_temperature_sdm_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_temperature_sdm_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_temperature_sdm_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_temperature_sdm_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_temperature_sdm_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_013_src_ready),                                          //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_013_src_valid),                                          //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_013_src_data),                                           //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_013_src_startofpacket),                                  //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_013_src_endofpacket),                                    //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_013_src_channel),                                        //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_temperature_sdm_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_temperature_sdm_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_temperature_sdm_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_temperature_sdm_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_temperature_sdm_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_temperature_sdm_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_temperature_sdm_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_temperature_sdm_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_temperature_sdm_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_temperature_sdm_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_temperature_sdm_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_temperature_sdm_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_temperature_sdm_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_temperature_sdm_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_temperature_sdm_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_temperature_sdm_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                          // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                           // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                            // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_temperature_sdm_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                           //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                    //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_temperature_sdm_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_temperature_sdm_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_temperature_sdm_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_temperature_sdm_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_temperature_sdm_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_temperature_sdm_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_temperature_sdm_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_temperature_sdm_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_temperature_sdm_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_temperature_sdm_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                          // (terminated),                         
		.csr_read          (1'b0),                                                           // (terminated),                         
		.csr_write         (1'b0),                                                           // (terminated),                         
		.csr_readdata      (),                                                               // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                           // (terminated),                         
		.almost_full_data  (),                                                               // (terminated),                         
		.almost_empty_data (),                                                               // (terminated),                         
		.in_empty          (1'b0),                                                           // (terminated),                         
		.out_empty         (),                                                               // (terminated),                         
		.in_error          (1'b0),                                                           // (terminated),                         
		.out_error         (),                                                               // (terminated),                         
		.in_channel        (1'b0),                                                           // (terminated),                         
		.out_channel       ()                                                                // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_temperature_xcvr1_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                             //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                      //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_temperature_xcvr1_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_temperature_xcvr1_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_temperature_xcvr1_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_temperature_xcvr1_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_temperature_xcvr1_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_temperature_xcvr1_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_temperature_xcvr1_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_temperature_xcvr1_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_temperature_xcvr1_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_temperature_xcvr1_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_temperature_xcvr1_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_temperature_xcvr1_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_temperature_xcvr1_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_temperature_xcvr1_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_temperature_xcvr1_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_temperature_xcvr1_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_014_src_ready),                                            //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_014_src_valid),                                            //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_014_src_data),                                             //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_014_src_startofpacket),                                    //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_014_src_endofpacket),                                      //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_014_src_channel),                                          //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_temperature_xcvr1_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_temperature_xcvr1_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_temperature_xcvr1_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_temperature_xcvr1_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_temperature_xcvr1_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_temperature_xcvr1_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_temperature_xcvr1_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_temperature_xcvr1_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_temperature_xcvr1_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_temperature_xcvr1_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_temperature_xcvr1_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                            // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                             // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                              // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_temperature_xcvr1_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                             //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                      //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_temperature_xcvr1_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_temperature_xcvr1_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_temperature_xcvr1_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_temperature_xcvr1_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_temperature_xcvr1_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_temperature_xcvr1_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                            // (terminated),                         
		.csr_read          (1'b0),                                                             // (terminated),                         
		.csr_write         (1'b0),                                                             // (terminated),                         
		.csr_readdata      (),                                                                 // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                             // (terminated),                         
		.almost_full_data  (),                                                                 // (terminated),                         
		.almost_empty_data (),                                                                 // (terminated),                         
		.in_empty          (1'b0),                                                             // (terminated),                         
		.out_empty         (),                                                                 // (terminated),                         
		.in_error          (1'b0),                                                             // (terminated),                         
		.out_error         (),                                                                 // (terminated),                         
		.in_channel        (1'b0),                                                             // (terminated),                         
		.out_channel       ()                                                                  // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_temperature_board2_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                              //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                       //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_temperature_board2_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_temperature_board2_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_temperature_board2_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_temperature_board2_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_temperature_board2_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_temperature_board2_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_temperature_board2_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_temperature_board2_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_temperature_board2_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_temperature_board2_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_temperature_board2_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_temperature_board2_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_temperature_board2_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_temperature_board2_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_temperature_board2_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_temperature_board2_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_015_src_ready),                                             //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_015_src_valid),                                             //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_015_src_data),                                              //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_015_src_startofpacket),                                     //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_015_src_endofpacket),                                       //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_015_src_channel),                                           //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_temperature_board2_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_temperature_board2_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_temperature_board2_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_temperature_board2_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_temperature_board2_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_temperature_board2_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_temperature_board2_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_temperature_board2_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_temperature_board2_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_temperature_board2_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_temperature_board2_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_temperature_board2_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_temperature_board2_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_temperature_board2_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_temperature_board2_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_temperature_board2_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                             // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                              // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                               // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_temperature_board2_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                              //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                       //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_temperature_board2_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_temperature_board2_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_temperature_board2_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_temperature_board2_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_temperature_board2_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_temperature_board2_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_temperature_board2_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_temperature_board2_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_temperature_board2_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_temperature_board2_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                             // (terminated),                         
		.csr_read          (1'b0),                                                              // (terminated),                         
		.csr_write         (1'b0),                                                              // (terminated),                         
		.csr_readdata      (),                                                                  // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                              // (terminated),                         
		.almost_full_data  (),                                                                  // (terminated),                         
		.almost_empty_data (),                                                                  // (terminated),                         
		.in_empty          (1'b0),                                                              // (terminated),                         
		.out_empty         (),                                                                  // (terminated),                         
		.in_error          (1'b0),                                                              // (terminated),                         
		.out_error         (),                                                                  // (terminated),                         
		.in_channel        (1'b0),                                                              // (terminated),                         
		.out_channel       ()                                                                   // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_temperature_xcvr2_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                             //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                      //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_temperature_xcvr2_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_temperature_xcvr2_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_temperature_xcvr2_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_temperature_xcvr2_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_temperature_xcvr2_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_temperature_xcvr2_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_temperature_xcvr2_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_temperature_xcvr2_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_temperature_xcvr2_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_temperature_xcvr2_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_temperature_xcvr2_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_temperature_xcvr2_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_temperature_xcvr2_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_temperature_xcvr2_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_temperature_xcvr2_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_temperature_xcvr2_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_016_src_ready),                                            //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_016_src_valid),                                            //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_016_src_data),                                             //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_016_src_startofpacket),                                    //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_016_src_endofpacket),                                      //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_016_src_channel),                                          //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_temperature_xcvr2_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_temperature_xcvr2_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_temperature_xcvr2_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_temperature_xcvr2_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_temperature_xcvr2_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_temperature_xcvr2_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_temperature_xcvr2_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_temperature_xcvr2_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_temperature_xcvr2_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_temperature_xcvr2_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_temperature_xcvr2_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                            // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                             // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                              // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_temperature_xcvr2_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                             //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                      //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_temperature_xcvr2_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_temperature_xcvr2_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_temperature_xcvr2_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_temperature_xcvr2_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_temperature_xcvr2_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_temperature_xcvr2_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                            // (terminated),                         
		.csr_read          (1'b0),                                                             // (terminated),                         
		.csr_write         (1'b0),                                                             // (terminated),                         
		.csr_readdata      (),                                                                 // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                             // (terminated),                         
		.almost_full_data  (),                                                                 // (terminated),                         
		.almost_empty_data (),                                                                 // (terminated),                         
		.in_empty          (1'b0),                                                             // (terminated),                         
		.out_empty         (),                                                                 // (terminated),                         
		.in_error          (1'b0),                                                             // (terminated),                         
		.out_error         (),                                                                 // (terminated),                         
		.in_channel        (1'b0),                                                             // (terminated),                         
		.out_channel       ()                                                                  // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) timer_s1_agent (
		.clk                     (clock_in_out_clk_clk),                        //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1,       clk_reset.reset
		.m0_address              (timer_s1_agent_m0_address),                   //  output,   width = 21,              m0.address
		.m0_burstcount           (timer_s1_agent_m0_burstcount),                //  output,    width = 3,                .burstcount
		.m0_byteenable           (timer_s1_agent_m0_byteenable),                //  output,    width = 4,                .byteenable
		.m0_debugaccess          (timer_s1_agent_m0_debugaccess),               //  output,    width = 1,                .debugaccess
		.m0_lock                 (timer_s1_agent_m0_lock),                      //  output,    width = 1,                .lock
		.m0_readdata             (timer_s1_agent_m0_readdata),                  //   input,   width = 32,                .readdata
		.m0_readdatavalid        (timer_s1_agent_m0_readdatavalid),             //   input,    width = 1,                .readdatavalid
		.m0_read                 (timer_s1_agent_m0_read),                      //  output,    width = 1,                .read
		.m0_waitrequest          (timer_s1_agent_m0_waitrequest),               //   input,    width = 1,                .waitrequest
		.m0_writedata            (timer_s1_agent_m0_writedata),                 //  output,   width = 32,                .writedata
		.m0_write                (timer_s1_agent_m0_write),                     //  output,    width = 1,                .write
		.rp_endofpacket          (timer_s1_agent_rp_endofpacket),               //  output,    width = 1,              rp.endofpacket
		.rp_ready                (timer_s1_agent_rp_ready),                     //   input,    width = 1,                .ready
		.rp_valid                (timer_s1_agent_rp_valid),                     //  output,    width = 1,                .valid
		.rp_data                 (timer_s1_agent_rp_data),                      //  output,  width = 123,                .data
		.rp_startofpacket        (timer_s1_agent_rp_startofpacket),             //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_017_src_ready),                       //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_017_src_valid),                       //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_017_src_data),                        //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_017_src_startofpacket),               //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_017_src_endofpacket),                 //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_017_src_channel),                     //   input,   width = 21,                .channel
		.rf_sink_ready           (timer_s1_agent_rsp_fifo_out_ready),           //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (timer_s1_agent_rsp_fifo_out_valid),           //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (timer_s1_agent_rsp_fifo_out_startofpacket),   //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (timer_s1_agent_rsp_fifo_out_endofpacket),     //   input,    width = 1,                .endofpacket
		.rf_sink_data            (timer_s1_agent_rsp_fifo_out_data),            //   input,  width = 124,                .data
		.rf_source_ready         (timer_s1_agent_rf_source_ready),              //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (timer_s1_agent_rf_source_valid),              //  output,    width = 1,                .valid
		.rf_source_startofpacket (timer_s1_agent_rf_source_startofpacket),      //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (timer_s1_agent_rf_source_endofpacket),        //  output,    width = 1,                .endofpacket
		.rf_source_data          (timer_s1_agent_rf_source_data),               //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (timer_s1_agent_rdata_fifo_src_ready),         //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (timer_s1_agent_rdata_fifo_src_valid),         //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (timer_s1_agent_rdata_fifo_src_data),          //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (timer_s1_agent_rdata_fifo_src_ready),         //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (timer_s1_agent_rdata_fifo_src_valid),         //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (timer_s1_agent_rdata_fifo_src_data),          //  output,   width = 34,                .data
		.m0_response             (2'b00),                                       // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                        // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                         // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) timer_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.in_data           (timer_s1_agent_rf_source_data),               //   input,  width = 124,        in.data
		.in_valid          (timer_s1_agent_rf_source_valid),              //   input,    width = 1,          .valid
		.in_ready          (timer_s1_agent_rf_source_ready),              //  output,    width = 1,          .ready
		.in_startofpacket  (timer_s1_agent_rf_source_startofpacket),      //   input,    width = 1,          .startofpacket
		.in_endofpacket    (timer_s1_agent_rf_source_endofpacket),        //   input,    width = 1,          .endofpacket
		.out_data          (timer_s1_agent_rsp_fifo_out_data),            //  output,  width = 124,       out.data
		.out_valid         (timer_s1_agent_rsp_fifo_out_valid),           //  output,    width = 1,          .valid
		.out_ready         (timer_s1_agent_rsp_fifo_out_ready),           //   input,    width = 1,          .ready
		.out_startofpacket (timer_s1_agent_rsp_fifo_out_startofpacket),   //  output,    width = 1,          .startofpacket
		.out_endofpacket   (timer_s1_agent_rsp_fifo_out_endofpacket),     //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                       // (terminated),                         
		.csr_read          (1'b0),                                        // (terminated),                         
		.csr_write         (1'b0),                                        // (terminated),                         
		.csr_readdata      (),                                            // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),        // (terminated),                         
		.almost_full_data  (),                                            // (terminated),                         
		.almost_empty_data (),                                            // (terminated),                         
		.in_empty          (1'b0),                                        // (terminated),                         
		.out_empty         (),                                            // (terminated),                         
		.in_error          (1'b0),                                        // (terminated),                         
		.out_error         (),                                            // (terminated),                         
		.in_channel        (1'b0),                                        // (terminated),                         
		.out_channel       ()                                             // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_temperature_power_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                             //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                      //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_temperature_power_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_temperature_power_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_temperature_power_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_temperature_power_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_temperature_power_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_temperature_power_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_temperature_power_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_temperature_power_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_temperature_power_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_temperature_power_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_temperature_power_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_temperature_power_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_temperature_power_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_temperature_power_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_temperature_power_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_temperature_power_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_018_src_ready),                                            //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_018_src_valid),                                            //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_018_src_data),                                             //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_018_src_startofpacket),                                    //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_018_src_endofpacket),                                      //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_018_src_channel),                                          //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_temperature_power_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_temperature_power_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_temperature_power_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_temperature_power_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_temperature_power_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_temperature_power_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_temperature_power_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_temperature_power_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_temperature_power_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_temperature_power_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_temperature_power_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_temperature_power_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_temperature_power_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_temperature_power_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_temperature_power_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_temperature_power_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                            // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                             // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                              // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_temperature_power_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                             //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                      //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_temperature_power_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_temperature_power_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_temperature_power_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_temperature_power_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_temperature_power_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_temperature_power_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_temperature_power_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_temperature_power_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_temperature_power_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_temperature_power_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                            // (terminated),                         
		.csr_read          (1'b0),                                                             // (terminated),                         
		.csr_write         (1'b0),                                                             // (terminated),                         
		.csr_readdata      (),                                                                 // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                             // (terminated),                         
		.almost_full_data  (),                                                                 // (terminated),                         
		.almost_empty_data (),                                                                 // (terminated),                         
		.in_empty          (1'b0),                                                             // (terminated),                         
		.out_empty         (),                                                                 // (terminated),                         
		.in_error          (1'b0),                                                             // (terminated),                         
		.out_error         (),                                                                 // (terminated),                         
		.in_channel        (1'b0),                                                             // (terminated),                         
		.out_channel       ()                                                                  // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_temperature_board3_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                              //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                       //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_temperature_board3_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_temperature_board3_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_temperature_board3_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_temperature_board3_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_temperature_board3_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_temperature_board3_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_temperature_board3_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_temperature_board3_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_temperature_board3_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_temperature_board3_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_temperature_board3_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_temperature_board3_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_temperature_board3_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_temperature_board3_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_temperature_board3_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_temperature_board3_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_019_src_ready),                                             //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_019_src_valid),                                             //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_019_src_data),                                              //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_019_src_startofpacket),                                     //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_019_src_endofpacket),                                       //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_019_src_channel),                                           //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_temperature_board3_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_temperature_board3_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_temperature_board3_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_temperature_board3_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_temperature_board3_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_temperature_board3_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_temperature_board3_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_temperature_board3_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_temperature_board3_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_temperature_board3_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_temperature_board3_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_temperature_board3_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_temperature_board3_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_temperature_board3_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_temperature_board3_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_temperature_board3_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                             // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                              // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                               // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_temperature_board3_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                              //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                       //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_temperature_board3_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_temperature_board3_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_temperature_board3_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_temperature_board3_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_temperature_board3_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_temperature_board3_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_temperature_board3_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_temperature_board3_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_temperature_board3_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_temperature_board3_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                             // (terminated),                         
		.csr_read          (1'b0),                                                              // (terminated),                         
		.csr_write         (1'b0),                                                              // (terminated),                         
		.csr_readdata      (),                                                                  // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                              // (terminated),                         
		.almost_full_data  (),                                                                  // (terminated),                         
		.almost_empty_data (),                                                                  // (terminated),                         
		.in_empty          (1'b0),                                                              // (terminated),                         
		.out_empty         (),                                                                  // (terminated),                         
		.in_error          (1'b0),                                                              // (terminated),                         
		.out_error         (),                                                                  // (terminated),                         
		.in_channel        (1'b0),                                                              // (terminated),                         
		.out_channel       ()                                                                   // (terminated),                         
	);

	system_altera_merlin_slave_agent_1921_b6r3djy #(
		.PKT_ORI_BURST_SIZE_H      (100),
		.PKT_ORI_BURST_SIZE_L      (98),
		.PKT_RESPONSE_STATUS_H     (97),
		.PKT_RESPONSE_STATUS_L     (96),
		.PKT_BURST_SIZE_H          (71),
		.PKT_BURST_SIZE_L          (69),
		.PKT_TRANS_LOCK            (61),
		.PKT_BEGIN_BURST           (76),
		.PKT_PROTECTION_H          (91),
		.PKT_PROTECTION_L          (89),
		.PKT_BURSTWRAP_H           (68),
		.PKT_BURSTWRAP_L           (66),
		.PKT_BYTE_CNT_H            (65),
		.PKT_BYTE_CNT_L            (63),
		.PKT_ADDR_H                (56),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (57),
		.PKT_TRANS_POSTED          (58),
		.PKT_TRANS_WRITE           (59),
		.PKT_TRANS_READ            (60),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (82),
		.PKT_SRC_ID_L              (78),
		.PKT_DEST_ID_H             (87),
		.PKT_DEST_ID_L             (83),
		.PKT_POISON_H              (110),
		.PKT_POISON_L              (110),
		.PKT_DATACHK_H             (111),
		.PKT_DATACHK_L             (111),
		.PKT_SAI_H                 (113),
		.PKT_SAI_L                 (113),
		.PKT_ADDRCHK_H             (112),
		.PKT_ADDRCHK_L             (112),
		.PKT_SYMBOL_W              (8),
		.ST_CHANNEL_W              (21),
		.ST_DATA_W                 (123),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.USE_MEMORY_BLOCKS         (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0),
		.ECC_ENABLE                (0),
		.SYNC_RESET                (0),
		.USE_PKT_DATACHK           (0),
		.ROLE_BASED_USER           (0)
	) board_info_temperature_xcvr3_s1_agent (
		.clk                     (clock_in_out_clk_clk),                                             //   input,    width = 1,             clk.clk
		.reset                   (jtag_uart_reset_reset_bridge_in_reset_reset),                      //   input,    width = 1,       clk_reset.reset
		.m0_address              (board_info_temperature_xcvr3_s1_agent_m0_address),                 //  output,   width = 21,              m0.address
		.m0_burstcount           (board_info_temperature_xcvr3_s1_agent_m0_burstcount),              //  output,    width = 3,                .burstcount
		.m0_byteenable           (board_info_temperature_xcvr3_s1_agent_m0_byteenable),              //  output,    width = 4,                .byteenable
		.m0_debugaccess          (board_info_temperature_xcvr3_s1_agent_m0_debugaccess),             //  output,    width = 1,                .debugaccess
		.m0_lock                 (board_info_temperature_xcvr3_s1_agent_m0_lock),                    //  output,    width = 1,                .lock
		.m0_readdata             (board_info_temperature_xcvr3_s1_agent_m0_readdata),                //   input,   width = 32,                .readdata
		.m0_readdatavalid        (board_info_temperature_xcvr3_s1_agent_m0_readdatavalid),           //   input,    width = 1,                .readdatavalid
		.m0_read                 (board_info_temperature_xcvr3_s1_agent_m0_read),                    //  output,    width = 1,                .read
		.m0_waitrequest          (board_info_temperature_xcvr3_s1_agent_m0_waitrequest),             //   input,    width = 1,                .waitrequest
		.m0_writedata            (board_info_temperature_xcvr3_s1_agent_m0_writedata),               //  output,   width = 32,                .writedata
		.m0_write                (board_info_temperature_xcvr3_s1_agent_m0_write),                   //  output,    width = 1,                .write
		.rp_endofpacket          (board_info_temperature_xcvr3_s1_agent_rp_endofpacket),             //  output,    width = 1,              rp.endofpacket
		.rp_ready                (board_info_temperature_xcvr3_s1_agent_rp_ready),                   //   input,    width = 1,                .ready
		.rp_valid                (board_info_temperature_xcvr3_s1_agent_rp_valid),                   //  output,    width = 1,                .valid
		.rp_data                 (board_info_temperature_xcvr3_s1_agent_rp_data),                    //  output,  width = 123,                .data
		.rp_startofpacket        (board_info_temperature_xcvr3_s1_agent_rp_startofpacket),           //  output,    width = 1,                .startofpacket
		.cp_ready                (cmd_mux_020_src_ready),                                            //  output,    width = 1,              cp.ready
		.cp_valid                (cmd_mux_020_src_valid),                                            //   input,    width = 1,                .valid
		.cp_data                 (cmd_mux_020_src_data),                                             //   input,  width = 123,                .data
		.cp_startofpacket        (cmd_mux_020_src_startofpacket),                                    //   input,    width = 1,                .startofpacket
		.cp_endofpacket          (cmd_mux_020_src_endofpacket),                                      //   input,    width = 1,                .endofpacket
		.cp_channel              (cmd_mux_020_src_channel),                                          //   input,   width = 21,                .channel
		.rf_sink_ready           (board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_ready),         //  output,    width = 1,         rf_sink.ready
		.rf_sink_valid           (board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_valid),         //   input,    width = 1,                .valid
		.rf_sink_startofpacket   (board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_startofpacket), //   input,    width = 1,                .startofpacket
		.rf_sink_endofpacket     (board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_endofpacket),   //   input,    width = 1,                .endofpacket
		.rf_sink_data            (board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_data),          //   input,  width = 124,                .data
		.rf_source_ready         (board_info_temperature_xcvr3_s1_agent_rf_source_ready),            //   input,    width = 1,       rf_source.ready
		.rf_source_valid         (board_info_temperature_xcvr3_s1_agent_rf_source_valid),            //  output,    width = 1,                .valid
		.rf_source_startofpacket (board_info_temperature_xcvr3_s1_agent_rf_source_startofpacket),    //  output,    width = 1,                .startofpacket
		.rf_source_endofpacket   (board_info_temperature_xcvr3_s1_agent_rf_source_endofpacket),      //  output,    width = 1,                .endofpacket
		.rf_source_data          (board_info_temperature_xcvr3_s1_agent_rf_source_data),             //  output,  width = 124,                .data
		.rdata_fifo_sink_ready   (board_info_temperature_xcvr3_s1_agent_rdata_fifo_src_ready),       //  output,    width = 1, rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (board_info_temperature_xcvr3_s1_agent_rdata_fifo_src_valid),       //   input,    width = 1,                .valid
		.rdata_fifo_sink_data    (board_info_temperature_xcvr3_s1_agent_rdata_fifo_src_data),        //   input,   width = 34,                .data
		.rdata_fifo_src_ready    (board_info_temperature_xcvr3_s1_agent_rdata_fifo_src_ready),       //   input,    width = 1,  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (board_info_temperature_xcvr3_s1_agent_rdata_fifo_src_valid),       //  output,    width = 1,                .valid
		.rdata_fifo_src_data     (board_info_temperature_xcvr3_s1_agent_rdata_fifo_src_data),        //  output,   width = 34,                .data
		.m0_response             (2'b00),                                                            // (terminated),                               
		.m0_writeresponsevalid   (1'b0),                                                             // (terminated),                               
		.rdata_fifo_sink_error   (1'b0)                                                              // (terminated),                               
	);

	system_altera_avalon_sc_fifo_1931_fzgstwy #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (124),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0),
		.EMPTY_WIDTH         (1),
		.SYNC_RESET          (0)
	) board_info_temperature_xcvr3_s1_agent_rsp_fifo (
		.clk               (clock_in_out_clk_clk),                                             //   input,    width = 1,       clk.clk
		.reset             (jtag_uart_reset_reset_bridge_in_reset_reset),                      //   input,    width = 1, clk_reset.reset
		.in_data           (board_info_temperature_xcvr3_s1_agent_rf_source_data),             //   input,  width = 124,        in.data
		.in_valid          (board_info_temperature_xcvr3_s1_agent_rf_source_valid),            //   input,    width = 1,          .valid
		.in_ready          (board_info_temperature_xcvr3_s1_agent_rf_source_ready),            //  output,    width = 1,          .ready
		.in_startofpacket  (board_info_temperature_xcvr3_s1_agent_rf_source_startofpacket),    //   input,    width = 1,          .startofpacket
		.in_endofpacket    (board_info_temperature_xcvr3_s1_agent_rf_source_endofpacket),      //   input,    width = 1,          .endofpacket
		.out_data          (board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_data),          //  output,  width = 124,       out.data
		.out_valid         (board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_valid),         //  output,    width = 1,          .valid
		.out_ready         (board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_ready),         //   input,    width = 1,          .ready
		.out_startofpacket (board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_startofpacket), //  output,    width = 1,          .startofpacket
		.out_endofpacket   (board_info_temperature_xcvr3_s1_agent_rsp_fifo_out_endofpacket),   //  output,    width = 1,          .endofpacket
		.csr_address       (2'b00),                                                            // (terminated),                         
		.csr_read          (1'b0),                                                             // (terminated),                         
		.csr_write         (1'b0),                                                             // (terminated),                         
		.csr_readdata      (),                                                                 // (terminated),                         
		.csr_writedata     (32'b00000000000000000000000000000000),                             // (terminated),                         
		.almost_full_data  (),                                                                 // (terminated),                         
		.almost_empty_data (),                                                                 // (terminated),                         
		.in_empty          (1'b0),                                                             // (terminated),                         
		.out_empty         (),                                                                 // (terminated),                         
		.in_error          (1'b0),                                                             // (terminated),                         
		.out_error         (),                                                                 // (terminated),                         
		.in_channel        (1'b0),                                                             // (terminated),                         
		.out_channel       ()                                                                  // (terminated),                         
	);

	system_altera_merlin_router_1921_sflbyhi router (
		.sink_ready         (nios2_gen2_data_master_agent_cp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (nios2_gen2_data_master_agent_cp_valid),         //   input,    width = 1,          .valid
		.sink_data          (nios2_gen2_data_master_agent_cp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (nios2_gen2_data_master_agent_cp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (nios2_gen2_data_master_agent_cp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                          //   input,    width = 1,       clk.clk
		.reset              (nios2_gen2_reset_reset_bridge_in_reset_reset),  //   input,    width = 1, clk_reset.reset
		.src_ready          (router_src_ready),                              //   input,    width = 1,       src.ready
		.src_valid          (router_src_valid),                              //  output,    width = 1,          .valid
		.src_data           (router_src_data),                               //  output,  width = 123,          .data
		.src_channel        (router_src_channel),                            //  output,   width = 21,          .channel
		.src_startofpacket  (router_src_startofpacket),                      //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_src_endofpacket)                         //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_4d677ki router_001 (
		.sink_ready         (nios2_gen2_instruction_master_agent_cp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (nios2_gen2_instruction_master_agent_cp_valid),         //   input,    width = 1,          .valid
		.sink_data          (nios2_gen2_instruction_master_agent_cp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (nios2_gen2_instruction_master_agent_cp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (nios2_gen2_instruction_master_agent_cp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                                 //   input,    width = 1,       clk.clk
		.reset              (nios2_gen2_reset_reset_bridge_in_reset_reset),         //   input,    width = 1, clk_reset.reset
		.src_ready          (router_001_src_ready),                                 //   input,    width = 1,       src.ready
		.src_valid          (router_001_src_valid),                                 //  output,    width = 1,          .valid
		.src_data           (router_001_src_data),                                  //  output,  width = 123,          .data
		.src_channel        (router_001_src_channel),                               //  output,   width = 21,          .channel
		.src_startofpacket  (router_001_src_startofpacket),                         //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_001_src_endofpacket)                            //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_002 (
		.sink_ready         (jtag_uart_avalon_jtag_slave_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (jtag_uart_avalon_jtag_slave_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (jtag_uart_avalon_jtag_slave_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (jtag_uart_avalon_jtag_slave_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (jtag_uart_avalon_jtag_slave_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                               //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),        //   input,    width = 1, clk_reset.reset
		.src_ready          (router_002_src_ready),                               //   input,    width = 1,       src.ready
		.src_valid          (router_002_src_valid),                               //  output,    width = 1,          .valid
		.src_data           (router_002_src_data),                                //  output,  width = 123,          .data
		.src_channel        (router_002_src_channel),                             //  output,   width = 21,          .channel
		.src_startofpacket  (router_002_src_startofpacket),                       //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_002_src_endofpacket)                          //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_003 (
		.sink_ready         (sysid_qsys_control_slave_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (sysid_qsys_control_slave_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (sysid_qsys_control_slave_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (sysid_qsys_control_slave_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (sysid_qsys_control_slave_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                            //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),     //   input,    width = 1, clk_reset.reset
		.src_ready          (router_003_src_ready),                            //   input,    width = 1,       src.ready
		.src_valid          (router_003_src_valid),                            //  output,    width = 1,          .valid
		.src_data           (router_003_src_data),                             //  output,  width = 123,          .data
		.src_channel        (router_003_src_channel),                          //  output,   width = 21,          .channel
		.src_startofpacket  (router_003_src_startofpacket),                    //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_003_src_endofpacket)                       //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_kku3csa router_004 (
		.sink_ready         (nios2_gen2_debug_mem_slave_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (nios2_gen2_debug_mem_slave_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (nios2_gen2_debug_mem_slave_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (nios2_gen2_debug_mem_slave_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (nios2_gen2_debug_mem_slave_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                              //   input,    width = 1,       clk.clk
		.reset              (nios2_gen2_reset_reset_bridge_in_reset_reset),      //   input,    width = 1, clk_reset.reset
		.src_ready          (router_004_src_ready),                              //   input,    width = 1,       src.ready
		.src_valid          (router_004_src_valid),                              //  output,    width = 1,          .valid
		.src_data           (router_004_src_data),                               //  output,  width = 123,          .data
		.src_channel        (router_004_src_channel),                            //  output,   width = 21,          .channel
		.src_startofpacket  (router_004_src_startofpacket),                      //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_004_src_endofpacket)                         //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_kku3csa router_005 (
		.sink_ready         (onchip_memory2_s1_agent_rp_ready),            //  output,    width = 1,      sink.ready
		.sink_valid         (onchip_memory2_s1_agent_rp_valid),            //   input,    width = 1,          .valid
		.sink_data          (onchip_memory2_s1_agent_rp_data),             //   input,  width = 123,          .data
		.sink_startofpacket (onchip_memory2_s1_agent_rp_startofpacket),    //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (onchip_memory2_s1_agent_rp_endofpacket),      //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready          (router_005_src_ready),                        //   input,    width = 1,       src.ready
		.src_valid          (router_005_src_valid),                        //  output,    width = 1,          .valid
		.src_data           (router_005_src_data),                         //  output,  width = 123,          .data
		.src_channel        (router_005_src_channel),                      //  output,   width = 21,          .channel
		.src_startofpacket  (router_005_src_startofpacket),                //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_005_src_endofpacket)                   //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_006 (
		.sink_ready         (board_info_temperature_fpga_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_temperature_fpga_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_temperature_fpga_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_temperature_fpga_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_temperature_fpga_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                                  //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),           //   input,    width = 1, clk_reset.reset
		.src_ready          (router_006_src_ready),                                  //   input,    width = 1,       src.ready
		.src_valid          (router_006_src_valid),                                  //  output,    width = 1,          .valid
		.src_data           (router_006_src_data),                                   //  output,  width = 123,          .data
		.src_channel        (router_006_src_channel),                                //  output,   width = 21,          .channel
		.src_startofpacket  (router_006_src_startofpacket),                          //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_006_src_endofpacket)                             //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_007 (
		.sink_ready         (board_info_temperature_board1_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_temperature_board1_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_temperature_board1_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_temperature_board1_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_temperature_board1_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                                    //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),             //   input,    width = 1, clk_reset.reset
		.src_ready          (router_007_src_ready),                                    //   input,    width = 1,       src.ready
		.src_valid          (router_007_src_valid),                                    //  output,    width = 1,          .valid
		.src_data           (router_007_src_data),                                     //  output,  width = 123,          .data
		.src_channel        (router_007_src_channel),                                  //  output,   width = 21,          .channel
		.src_startofpacket  (router_007_src_startofpacket),                            //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_007_src_endofpacket)                               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_008 (
		.sink_ready         (board_info_fan_speed1_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_fan_speed1_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_fan_speed1_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_fan_speed1_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_fan_speed1_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                            //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),     //   input,    width = 1, clk_reset.reset
		.src_ready          (router_008_src_ready),                            //   input,    width = 1,       src.ready
		.src_valid          (router_008_src_valid),                            //  output,    width = 1,          .valid
		.src_data           (router_008_src_data),                             //  output,  width = 123,          .data
		.src_channel        (router_008_src_channel),                          //  output,   width = 21,          .channel
		.src_startofpacket  (router_008_src_startofpacket),                    //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_008_src_endofpacket)                       //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_009 (
		.sink_ready         (board_info_fan_speed2_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_fan_speed2_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_fan_speed2_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_fan_speed2_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_fan_speed2_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                            //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),     //   input,    width = 1, clk_reset.reset
		.src_ready          (router_009_src_ready),                            //   input,    width = 1,       src.ready
		.src_valid          (router_009_src_valid),                            //  output,    width = 1,          .valid
		.src_data           (router_009_src_data),                             //  output,  width = 123,          .data
		.src_channel        (router_009_src_channel),                          //  output,   width = 21,          .channel
		.src_startofpacket  (router_009_src_startofpacket),                    //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_009_src_endofpacket)                       //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_010 (
		.sink_ready         (board_info_core_current_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_core_current_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_core_current_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_core_current_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_core_current_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                              //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),       //   input,    width = 1, clk_reset.reset
		.src_ready          (router_010_src_ready),                              //   input,    width = 1,       src.ready
		.src_valid          (router_010_src_valid),                              //  output,    width = 1,          .valid
		.src_data           (router_010_src_data),                               //  output,  width = 123,          .data
		.src_channel        (router_010_src_channel),                            //  output,   width = 21,          .channel
		.src_startofpacket  (router_010_src_startofpacket),                      //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_010_src_endofpacket)                         //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_011 (
		.sink_ready         (board_info_core_voltage_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_core_voltage_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_core_voltage_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_core_voltage_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_core_voltage_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                              //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),       //   input,    width = 1, clk_reset.reset
		.src_ready          (router_011_src_ready),                              //   input,    width = 1,       src.ready
		.src_valid          (router_011_src_valid),                              //  output,    width = 1,          .valid
		.src_data           (router_011_src_data),                               //  output,  width = 123,          .data
		.src_channel        (router_011_src_channel),                            //  output,   width = 21,          .channel
		.src_startofpacket  (router_011_src_startofpacket),                      //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_011_src_endofpacket)                         //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_012 (
		.sink_ready         (board_info_power_in_current_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_power_in_current_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_power_in_current_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_power_in_current_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_power_in_current_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                                  //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),           //   input,    width = 1, clk_reset.reset
		.src_ready          (router_012_src_ready),                                  //   input,    width = 1,       src.ready
		.src_valid          (router_012_src_valid),                                  //  output,    width = 1,          .valid
		.src_data           (router_012_src_data),                                   //  output,  width = 123,          .data
		.src_channel        (router_012_src_channel),                                //  output,   width = 21,          .channel
		.src_startofpacket  (router_012_src_startofpacket),                          //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_012_src_endofpacket)                             //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_013 (
		.sink_ready         (board_info_power_in_voltage_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_power_in_voltage_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_power_in_voltage_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_power_in_voltage_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_power_in_voltage_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                                  //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),           //   input,    width = 1, clk_reset.reset
		.src_ready          (router_013_src_ready),                                  //   input,    width = 1,       src.ready
		.src_valid          (router_013_src_valid),                                  //  output,    width = 1,          .valid
		.src_data           (router_013_src_data),                                   //  output,  width = 123,          .data
		.src_channel        (router_013_src_channel),                                //  output,   width = 21,          .channel
		.src_startofpacket  (router_013_src_startofpacket),                          //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_013_src_endofpacket)                             //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_014 (
		.sink_ready         (board_info_pin_status_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_pin_status_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_pin_status_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_pin_status_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_pin_status_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                            //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),     //   input,    width = 1, clk_reset.reset
		.src_ready          (router_014_src_ready),                            //   input,    width = 1,       src.ready
		.src_valid          (router_014_src_valid),                            //  output,    width = 1,          .valid
		.src_data           (router_014_src_data),                             //  output,  width = 123,          .data
		.src_channel        (router_014_src_channel),                          //  output,   width = 21,          .channel
		.src_startofpacket  (router_014_src_startofpacket),                    //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_014_src_endofpacket)                       //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_015 (
		.sink_ready         (board_info_temperature_sdm_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_temperature_sdm_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_temperature_sdm_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_temperature_sdm_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_temperature_sdm_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                                 //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),          //   input,    width = 1, clk_reset.reset
		.src_ready          (router_015_src_ready),                                 //   input,    width = 1,       src.ready
		.src_valid          (router_015_src_valid),                                 //  output,    width = 1,          .valid
		.src_data           (router_015_src_data),                                  //  output,  width = 123,          .data
		.src_channel        (router_015_src_channel),                               //  output,   width = 21,          .channel
		.src_startofpacket  (router_015_src_startofpacket),                         //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_015_src_endofpacket)                            //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_016 (
		.sink_ready         (board_info_temperature_xcvr1_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_temperature_xcvr1_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_temperature_xcvr1_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_temperature_xcvr1_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_temperature_xcvr1_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                                   //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),            //   input,    width = 1, clk_reset.reset
		.src_ready          (router_016_src_ready),                                   //   input,    width = 1,       src.ready
		.src_valid          (router_016_src_valid),                                   //  output,    width = 1,          .valid
		.src_data           (router_016_src_data),                                    //  output,  width = 123,          .data
		.src_channel        (router_016_src_channel),                                 //  output,   width = 21,          .channel
		.src_startofpacket  (router_016_src_startofpacket),                           //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_016_src_endofpacket)                              //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_017 (
		.sink_ready         (board_info_temperature_board2_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_temperature_board2_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_temperature_board2_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_temperature_board2_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_temperature_board2_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                                    //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),             //   input,    width = 1, clk_reset.reset
		.src_ready          (router_017_src_ready),                                    //   input,    width = 1,       src.ready
		.src_valid          (router_017_src_valid),                                    //  output,    width = 1,          .valid
		.src_data           (router_017_src_data),                                     //  output,  width = 123,          .data
		.src_channel        (router_017_src_channel),                                  //  output,   width = 21,          .channel
		.src_startofpacket  (router_017_src_startofpacket),                            //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_017_src_endofpacket)                               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_018 (
		.sink_ready         (board_info_temperature_xcvr2_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_temperature_xcvr2_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_temperature_xcvr2_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_temperature_xcvr2_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_temperature_xcvr2_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                                   //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),            //   input,    width = 1, clk_reset.reset
		.src_ready          (router_018_src_ready),                                   //   input,    width = 1,       src.ready
		.src_valid          (router_018_src_valid),                                   //  output,    width = 1,          .valid
		.src_data           (router_018_src_data),                                    //  output,  width = 123,          .data
		.src_channel        (router_018_src_channel),                                 //  output,   width = 21,          .channel
		.src_startofpacket  (router_018_src_startofpacket),                           //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_018_src_endofpacket)                              //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_019 (
		.sink_ready         (timer_s1_agent_rp_ready),                     //  output,    width = 1,      sink.ready
		.sink_valid         (timer_s1_agent_rp_valid),                     //   input,    width = 1,          .valid
		.sink_data          (timer_s1_agent_rp_data),                      //   input,  width = 123,          .data
		.sink_startofpacket (timer_s1_agent_rp_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (timer_s1_agent_rp_endofpacket),               //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready          (router_019_src_ready),                        //   input,    width = 1,       src.ready
		.src_valid          (router_019_src_valid),                        //  output,    width = 1,          .valid
		.src_data           (router_019_src_data),                         //  output,  width = 123,          .data
		.src_channel        (router_019_src_channel),                      //  output,   width = 21,          .channel
		.src_startofpacket  (router_019_src_startofpacket),                //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_019_src_endofpacket)                   //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_020 (
		.sink_ready         (board_info_temperature_power_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_temperature_power_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_temperature_power_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_temperature_power_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_temperature_power_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                                   //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),            //   input,    width = 1, clk_reset.reset
		.src_ready          (router_020_src_ready),                                   //   input,    width = 1,       src.ready
		.src_valid          (router_020_src_valid),                                   //  output,    width = 1,          .valid
		.src_data           (router_020_src_data),                                    //  output,  width = 123,          .data
		.src_channel        (router_020_src_channel),                                 //  output,   width = 21,          .channel
		.src_startofpacket  (router_020_src_startofpacket),                           //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_020_src_endofpacket)                              //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_021 (
		.sink_ready         (board_info_temperature_board3_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_temperature_board3_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_temperature_board3_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_temperature_board3_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_temperature_board3_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                                    //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),             //   input,    width = 1, clk_reset.reset
		.src_ready          (router_021_src_ready),                                    //   input,    width = 1,       src.ready
		.src_valid          (router_021_src_valid),                                    //  output,    width = 1,          .valid
		.src_data           (router_021_src_data),                                     //  output,  width = 123,          .data
		.src_channel        (router_021_src_channel),                                  //  output,   width = 21,          .channel
		.src_startofpacket  (router_021_src_startofpacket),                            //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_021_src_endofpacket)                               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_router_1921_mbg66ga router_022 (
		.sink_ready         (board_info_temperature_xcvr3_s1_agent_rp_ready),         //  output,    width = 1,      sink.ready
		.sink_valid         (board_info_temperature_xcvr3_s1_agent_rp_valid),         //   input,    width = 1,          .valid
		.sink_data          (board_info_temperature_xcvr3_s1_agent_rp_data),          //   input,  width = 123,          .data
		.sink_startofpacket (board_info_temperature_xcvr3_s1_agent_rp_startofpacket), //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (board_info_temperature_xcvr3_s1_agent_rp_endofpacket),   //   input,    width = 1,          .endofpacket
		.clk                (clock_in_out_clk_clk),                                   //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset),            //   input,    width = 1, clk_reset.reset
		.src_ready          (router_022_src_ready),                                   //   input,    width = 1,       src.ready
		.src_valid          (router_022_src_valid),                                   //  output,    width = 1,          .valid
		.src_data           (router_022_src_data),                                    //  output,  width = 123,          .data
		.src_channel        (router_022_src_channel),                                 //  output,   width = 21,          .channel
		.src_startofpacket  (router_022_src_startofpacket),                           //  output,    width = 1,          .startofpacket
		.src_endofpacket    (router_022_src_endofpacket)                              //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_traffic_limiter_1921_76whh4i #(
		.SYNC_RESET                           (0),
		.PKT_DEST_ID_H                        (87),
		.PKT_DEST_ID_L                        (83),
		.PKT_SRC_ID_H                         (82),
		.PKT_SRC_ID_L                         (78),
		.PKT_BYTE_CNT_H                       (65),
		.PKT_BYTE_CNT_L                       (63),
		.PKT_BYTEEN_H                         (35),
		.PKT_BYTEEN_L                         (32),
		.PKT_TRANS_POSTED                     (58),
		.PKT_TRANS_WRITE                      (59),
		.PKT_TRANS_SEQ_H                      (122),
		.PKT_TRANS_SEQ_L                      (116),
		.MAX_OUTSTANDING_RESPONSES            (2),
		.PIPELINED                            (0),
		.ST_DATA_W                            (123),
		.ST_CHANNEL_W                         (21),
		.VALID_WIDTH                          (21),
		.ENFORCE_ORDER                        (1),
		.PREVENT_HAZARDS                      (0),
		.SUPPORTS_POSTED_WRITES               (1),
		.SUPPORTS_NONPOSTED_WRITES            (0),
		.REORDER                              (0),
		.ENABLE_CONCURRENT_SUBORDINATE_ACCESS (0),
		.NO_REPEATED_IDS_BETWEEN_SUBORDINATES (0),
		.ENABLE_OOO                           (0)
	) nios2_gen2_data_master_limiter (
		.clk                    (clock_in_out_clk_clk),                                 //   input,    width = 1,       clk.clk
		.reset                  (nios2_gen2_reset_reset_bridge_in_reset_reset),         //   input,    width = 1, clk_reset.reset
		.cmd_sink_ready         (router_src_ready),                                     //  output,    width = 1,  cmd_sink.ready
		.cmd_sink_valid         (router_src_valid),                                     //   input,    width = 1,          .valid
		.cmd_sink_data          (router_src_data),                                      //   input,  width = 123,          .data
		.cmd_sink_channel       (router_src_channel),                                   //   input,   width = 21,          .channel
		.cmd_sink_startofpacket (router_src_startofpacket),                             //   input,    width = 1,          .startofpacket
		.cmd_sink_endofpacket   (router_src_endofpacket),                               //   input,    width = 1,          .endofpacket
		.cmd_src_ready          (nios2_gen2_data_master_limiter_cmd_src_ready),         //   input,    width = 1,   cmd_src.ready
		.cmd_src_data           (nios2_gen2_data_master_limiter_cmd_src_data),          //  output,  width = 123,          .data
		.cmd_src_channel        (nios2_gen2_data_master_limiter_cmd_src_channel),       //  output,   width = 21,          .channel
		.cmd_src_startofpacket  (nios2_gen2_data_master_limiter_cmd_src_startofpacket), //  output,    width = 1,          .startofpacket
		.cmd_src_endofpacket    (nios2_gen2_data_master_limiter_cmd_src_endofpacket),   //  output,    width = 1,          .endofpacket
		.rsp_sink_ready         (rsp_mux_src_ready),                                    //  output,    width = 1,  rsp_sink.ready
		.rsp_sink_valid         (rsp_mux_src_valid),                                    //   input,    width = 1,          .valid
		.rsp_sink_channel       (rsp_mux_src_channel),                                  //   input,   width = 21,          .channel
		.rsp_sink_data          (rsp_mux_src_data),                                     //   input,  width = 123,          .data
		.rsp_sink_startofpacket (rsp_mux_src_startofpacket),                            //   input,    width = 1,          .startofpacket
		.rsp_sink_endofpacket   (rsp_mux_src_endofpacket),                              //   input,    width = 1,          .endofpacket
		.rsp_src_ready          (nios2_gen2_data_master_limiter_rsp_src_ready),         //   input,    width = 1,   rsp_src.ready
		.rsp_src_valid          (nios2_gen2_data_master_limiter_rsp_src_valid),         //  output,    width = 1,          .valid
		.rsp_src_data           (nios2_gen2_data_master_limiter_rsp_src_data),          //  output,  width = 123,          .data
		.rsp_src_channel        (nios2_gen2_data_master_limiter_rsp_src_channel),       //  output,   width = 21,          .channel
		.rsp_src_startofpacket  (nios2_gen2_data_master_limiter_rsp_src_startofpacket), //  output,    width = 1,          .startofpacket
		.rsp_src_endofpacket    (nios2_gen2_data_master_limiter_rsp_src_endofpacket),   //  output,    width = 1,          .endofpacket
		.cmd_src_valid          (nios2_gen2_data_master_limiter_cmd_valid_data)         //  output,   width = 21, cmd_valid.data
	);

	system_altera_merlin_traffic_limiter_1921_76whh4i #(
		.SYNC_RESET                           (0),
		.PKT_DEST_ID_H                        (87),
		.PKT_DEST_ID_L                        (83),
		.PKT_SRC_ID_H                         (82),
		.PKT_SRC_ID_L                         (78),
		.PKT_BYTE_CNT_H                       (65),
		.PKT_BYTE_CNT_L                       (63),
		.PKT_BYTEEN_H                         (35),
		.PKT_BYTEEN_L                         (32),
		.PKT_TRANS_POSTED                     (58),
		.PKT_TRANS_WRITE                      (59),
		.PKT_TRANS_SEQ_H                      (122),
		.PKT_TRANS_SEQ_L                      (116),
		.MAX_OUTSTANDING_RESPONSES            (2),
		.PIPELINED                            (0),
		.ST_DATA_W                            (123),
		.ST_CHANNEL_W                         (21),
		.VALID_WIDTH                          (21),
		.ENFORCE_ORDER                        (1),
		.PREVENT_HAZARDS                      (0),
		.SUPPORTS_POSTED_WRITES               (1),
		.SUPPORTS_NONPOSTED_WRITES            (0),
		.REORDER                              (0),
		.ENABLE_CONCURRENT_SUBORDINATE_ACCESS (0),
		.NO_REPEATED_IDS_BETWEEN_SUBORDINATES (0),
		.ENABLE_OOO                           (0)
	) nios2_gen2_instruction_master_limiter (
		.clk                    (clock_in_out_clk_clk),                                        //   input,    width = 1,       clk.clk
		.reset                  (nios2_gen2_reset_reset_bridge_in_reset_reset),                //   input,    width = 1, clk_reset.reset
		.cmd_sink_ready         (router_001_src_ready),                                        //  output,    width = 1,  cmd_sink.ready
		.cmd_sink_valid         (router_001_src_valid),                                        //   input,    width = 1,          .valid
		.cmd_sink_data          (router_001_src_data),                                         //   input,  width = 123,          .data
		.cmd_sink_channel       (router_001_src_channel),                                      //   input,   width = 21,          .channel
		.cmd_sink_startofpacket (router_001_src_startofpacket),                                //   input,    width = 1,          .startofpacket
		.cmd_sink_endofpacket   (router_001_src_endofpacket),                                  //   input,    width = 1,          .endofpacket
		.cmd_src_ready          (nios2_gen2_instruction_master_limiter_cmd_src_ready),         //   input,    width = 1,   cmd_src.ready
		.cmd_src_data           (nios2_gen2_instruction_master_limiter_cmd_src_data),          //  output,  width = 123,          .data
		.cmd_src_channel        (nios2_gen2_instruction_master_limiter_cmd_src_channel),       //  output,   width = 21,          .channel
		.cmd_src_startofpacket  (nios2_gen2_instruction_master_limiter_cmd_src_startofpacket), //  output,    width = 1,          .startofpacket
		.cmd_src_endofpacket    (nios2_gen2_instruction_master_limiter_cmd_src_endofpacket),   //  output,    width = 1,          .endofpacket
		.rsp_sink_ready         (rsp_mux_001_src_ready),                                       //  output,    width = 1,  rsp_sink.ready
		.rsp_sink_valid         (rsp_mux_001_src_valid),                                       //   input,    width = 1,          .valid
		.rsp_sink_channel       (rsp_mux_001_src_channel),                                     //   input,   width = 21,          .channel
		.rsp_sink_data          (rsp_mux_001_src_data),                                        //   input,  width = 123,          .data
		.rsp_sink_startofpacket (rsp_mux_001_src_startofpacket),                               //   input,    width = 1,          .startofpacket
		.rsp_sink_endofpacket   (rsp_mux_001_src_endofpacket),                                 //   input,    width = 1,          .endofpacket
		.rsp_src_ready          (nios2_gen2_instruction_master_limiter_rsp_src_ready),         //   input,    width = 1,   rsp_src.ready
		.rsp_src_valid          (nios2_gen2_instruction_master_limiter_rsp_src_valid),         //  output,    width = 1,          .valid
		.rsp_src_data           (nios2_gen2_instruction_master_limiter_rsp_src_data),          //  output,  width = 123,          .data
		.rsp_src_channel        (nios2_gen2_instruction_master_limiter_rsp_src_channel),       //  output,   width = 21,          .channel
		.rsp_src_startofpacket  (nios2_gen2_instruction_master_limiter_rsp_src_startofpacket), //  output,    width = 1,          .startofpacket
		.rsp_src_endofpacket    (nios2_gen2_instruction_master_limiter_rsp_src_endofpacket),   //  output,    width = 1,          .endofpacket
		.cmd_src_valid          (nios2_gen2_instruction_master_limiter_cmd_valid_data)         //  output,   width = 21, cmd_valid.data
	);

	system_altera_merlin_demultiplexer_1921_y46jyqa cmd_demux (
		.clk                 (clock_in_out_clk_clk),                                 //   input,    width = 1,        clk.clk
		.reset               (nios2_gen2_reset_reset_bridge_in_reset_reset),         //   input,    width = 1,  clk_reset.reset
		.sink_ready          (nios2_gen2_data_master_limiter_cmd_src_ready),         //  output,    width = 1,       sink.ready
		.sink_channel        (nios2_gen2_data_master_limiter_cmd_src_channel),       //   input,   width = 21,           .channel
		.sink_data           (nios2_gen2_data_master_limiter_cmd_src_data),          //   input,  width = 123,           .data
		.sink_startofpacket  (nios2_gen2_data_master_limiter_cmd_src_startofpacket), //   input,    width = 1,           .startofpacket
		.sink_endofpacket    (nios2_gen2_data_master_limiter_cmd_src_endofpacket),   //   input,    width = 1,           .endofpacket
		.sink_valid          (nios2_gen2_data_master_limiter_cmd_valid_data),        //   input,   width = 21, sink_valid.data
		.src0_ready          (cmd_demux_src0_ready),                                 //   input,    width = 1,       src0.ready
		.src0_valid          (cmd_demux_src0_valid),                                 //  output,    width = 1,           .valid
		.src0_data           (cmd_demux_src0_data),                                  //  output,  width = 123,           .data
		.src0_channel        (cmd_demux_src0_channel),                               //  output,   width = 21,           .channel
		.src0_startofpacket  (cmd_demux_src0_startofpacket),                         //  output,    width = 1,           .startofpacket
		.src0_endofpacket    (cmd_demux_src0_endofpacket),                           //  output,    width = 1,           .endofpacket
		.src1_ready          (cmd_demux_src1_ready),                                 //   input,    width = 1,       src1.ready
		.src1_valid          (cmd_demux_src1_valid),                                 //  output,    width = 1,           .valid
		.src1_data           (cmd_demux_src1_data),                                  //  output,  width = 123,           .data
		.src1_channel        (cmd_demux_src1_channel),                               //  output,   width = 21,           .channel
		.src1_startofpacket  (cmd_demux_src1_startofpacket),                         //  output,    width = 1,           .startofpacket
		.src1_endofpacket    (cmd_demux_src1_endofpacket),                           //  output,    width = 1,           .endofpacket
		.src2_ready          (cmd_demux_src2_ready),                                 //   input,    width = 1,       src2.ready
		.src2_valid          (cmd_demux_src2_valid),                                 //  output,    width = 1,           .valid
		.src2_data           (cmd_demux_src2_data),                                  //  output,  width = 123,           .data
		.src2_channel        (cmd_demux_src2_channel),                               //  output,   width = 21,           .channel
		.src2_startofpacket  (cmd_demux_src2_startofpacket),                         //  output,    width = 1,           .startofpacket
		.src2_endofpacket    (cmd_demux_src2_endofpacket),                           //  output,    width = 1,           .endofpacket
		.src3_ready          (cmd_demux_src3_ready),                                 //   input,    width = 1,       src3.ready
		.src3_valid          (cmd_demux_src3_valid),                                 //  output,    width = 1,           .valid
		.src3_data           (cmd_demux_src3_data),                                  //  output,  width = 123,           .data
		.src3_channel        (cmd_demux_src3_channel),                               //  output,   width = 21,           .channel
		.src3_startofpacket  (cmd_demux_src3_startofpacket),                         //  output,    width = 1,           .startofpacket
		.src3_endofpacket    (cmd_demux_src3_endofpacket),                           //  output,    width = 1,           .endofpacket
		.src4_ready          (cmd_demux_src4_ready),                                 //   input,    width = 1,       src4.ready
		.src4_valid          (cmd_demux_src4_valid),                                 //  output,    width = 1,           .valid
		.src4_data           (cmd_demux_src4_data),                                  //  output,  width = 123,           .data
		.src4_channel        (cmd_demux_src4_channel),                               //  output,   width = 21,           .channel
		.src4_startofpacket  (cmd_demux_src4_startofpacket),                         //  output,    width = 1,           .startofpacket
		.src4_endofpacket    (cmd_demux_src4_endofpacket),                           //  output,    width = 1,           .endofpacket
		.src5_ready          (cmd_demux_src5_ready),                                 //   input,    width = 1,       src5.ready
		.src5_valid          (cmd_demux_src5_valid),                                 //  output,    width = 1,           .valid
		.src5_data           (cmd_demux_src5_data),                                  //  output,  width = 123,           .data
		.src5_channel        (cmd_demux_src5_channel),                               //  output,   width = 21,           .channel
		.src5_startofpacket  (cmd_demux_src5_startofpacket),                         //  output,    width = 1,           .startofpacket
		.src5_endofpacket    (cmd_demux_src5_endofpacket),                           //  output,    width = 1,           .endofpacket
		.src6_ready          (cmd_demux_src6_ready),                                 //   input,    width = 1,       src6.ready
		.src6_valid          (cmd_demux_src6_valid),                                 //  output,    width = 1,           .valid
		.src6_data           (cmd_demux_src6_data),                                  //  output,  width = 123,           .data
		.src6_channel        (cmd_demux_src6_channel),                               //  output,   width = 21,           .channel
		.src6_startofpacket  (cmd_demux_src6_startofpacket),                         //  output,    width = 1,           .startofpacket
		.src6_endofpacket    (cmd_demux_src6_endofpacket),                           //  output,    width = 1,           .endofpacket
		.src7_ready          (cmd_demux_src7_ready),                                 //   input,    width = 1,       src7.ready
		.src7_valid          (cmd_demux_src7_valid),                                 //  output,    width = 1,           .valid
		.src7_data           (cmd_demux_src7_data),                                  //  output,  width = 123,           .data
		.src7_channel        (cmd_demux_src7_channel),                               //  output,   width = 21,           .channel
		.src7_startofpacket  (cmd_demux_src7_startofpacket),                         //  output,    width = 1,           .startofpacket
		.src7_endofpacket    (cmd_demux_src7_endofpacket),                           //  output,    width = 1,           .endofpacket
		.src8_ready          (cmd_demux_src8_ready),                                 //   input,    width = 1,       src8.ready
		.src8_valid          (cmd_demux_src8_valid),                                 //  output,    width = 1,           .valid
		.src8_data           (cmd_demux_src8_data),                                  //  output,  width = 123,           .data
		.src8_channel        (cmd_demux_src8_channel),                               //  output,   width = 21,           .channel
		.src8_startofpacket  (cmd_demux_src8_startofpacket),                         //  output,    width = 1,           .startofpacket
		.src8_endofpacket    (cmd_demux_src8_endofpacket),                           //  output,    width = 1,           .endofpacket
		.src9_ready          (cmd_demux_src9_ready),                                 //   input,    width = 1,       src9.ready
		.src9_valid          (cmd_demux_src9_valid),                                 //  output,    width = 1,           .valid
		.src9_data           (cmd_demux_src9_data),                                  //  output,  width = 123,           .data
		.src9_channel        (cmd_demux_src9_channel),                               //  output,   width = 21,           .channel
		.src9_startofpacket  (cmd_demux_src9_startofpacket),                         //  output,    width = 1,           .startofpacket
		.src9_endofpacket    (cmd_demux_src9_endofpacket),                           //  output,    width = 1,           .endofpacket
		.src10_ready         (cmd_demux_src10_ready),                                //   input,    width = 1,      src10.ready
		.src10_valid         (cmd_demux_src10_valid),                                //  output,    width = 1,           .valid
		.src10_data          (cmd_demux_src10_data),                                 //  output,  width = 123,           .data
		.src10_channel       (cmd_demux_src10_channel),                              //  output,   width = 21,           .channel
		.src10_startofpacket (cmd_demux_src10_startofpacket),                        //  output,    width = 1,           .startofpacket
		.src10_endofpacket   (cmd_demux_src10_endofpacket),                          //  output,    width = 1,           .endofpacket
		.src11_ready         (cmd_demux_src11_ready),                                //   input,    width = 1,      src11.ready
		.src11_valid         (cmd_demux_src11_valid),                                //  output,    width = 1,           .valid
		.src11_data          (cmd_demux_src11_data),                                 //  output,  width = 123,           .data
		.src11_channel       (cmd_demux_src11_channel),                              //  output,   width = 21,           .channel
		.src11_startofpacket (cmd_demux_src11_startofpacket),                        //  output,    width = 1,           .startofpacket
		.src11_endofpacket   (cmd_demux_src11_endofpacket),                          //  output,    width = 1,           .endofpacket
		.src12_ready         (cmd_demux_src12_ready),                                //   input,    width = 1,      src12.ready
		.src12_valid         (cmd_demux_src12_valid),                                //  output,    width = 1,           .valid
		.src12_data          (cmd_demux_src12_data),                                 //  output,  width = 123,           .data
		.src12_channel       (cmd_demux_src12_channel),                              //  output,   width = 21,           .channel
		.src12_startofpacket (cmd_demux_src12_startofpacket),                        //  output,    width = 1,           .startofpacket
		.src12_endofpacket   (cmd_demux_src12_endofpacket),                          //  output,    width = 1,           .endofpacket
		.src13_ready         (cmd_demux_src13_ready),                                //   input,    width = 1,      src13.ready
		.src13_valid         (cmd_demux_src13_valid),                                //  output,    width = 1,           .valid
		.src13_data          (cmd_demux_src13_data),                                 //  output,  width = 123,           .data
		.src13_channel       (cmd_demux_src13_channel),                              //  output,   width = 21,           .channel
		.src13_startofpacket (cmd_demux_src13_startofpacket),                        //  output,    width = 1,           .startofpacket
		.src13_endofpacket   (cmd_demux_src13_endofpacket),                          //  output,    width = 1,           .endofpacket
		.src14_ready         (cmd_demux_src14_ready),                                //   input,    width = 1,      src14.ready
		.src14_valid         (cmd_demux_src14_valid),                                //  output,    width = 1,           .valid
		.src14_data          (cmd_demux_src14_data),                                 //  output,  width = 123,           .data
		.src14_channel       (cmd_demux_src14_channel),                              //  output,   width = 21,           .channel
		.src14_startofpacket (cmd_demux_src14_startofpacket),                        //  output,    width = 1,           .startofpacket
		.src14_endofpacket   (cmd_demux_src14_endofpacket),                          //  output,    width = 1,           .endofpacket
		.src15_ready         (cmd_demux_src15_ready),                                //   input,    width = 1,      src15.ready
		.src15_valid         (cmd_demux_src15_valid),                                //  output,    width = 1,           .valid
		.src15_data          (cmd_demux_src15_data),                                 //  output,  width = 123,           .data
		.src15_channel       (cmd_demux_src15_channel),                              //  output,   width = 21,           .channel
		.src15_startofpacket (cmd_demux_src15_startofpacket),                        //  output,    width = 1,           .startofpacket
		.src15_endofpacket   (cmd_demux_src15_endofpacket),                          //  output,    width = 1,           .endofpacket
		.src16_ready         (cmd_demux_src16_ready),                                //   input,    width = 1,      src16.ready
		.src16_valid         (cmd_demux_src16_valid),                                //  output,    width = 1,           .valid
		.src16_data          (cmd_demux_src16_data),                                 //  output,  width = 123,           .data
		.src16_channel       (cmd_demux_src16_channel),                              //  output,   width = 21,           .channel
		.src16_startofpacket (cmd_demux_src16_startofpacket),                        //  output,    width = 1,           .startofpacket
		.src16_endofpacket   (cmd_demux_src16_endofpacket),                          //  output,    width = 1,           .endofpacket
		.src17_ready         (cmd_demux_src17_ready),                                //   input,    width = 1,      src17.ready
		.src17_valid         (cmd_demux_src17_valid),                                //  output,    width = 1,           .valid
		.src17_data          (cmd_demux_src17_data),                                 //  output,  width = 123,           .data
		.src17_channel       (cmd_demux_src17_channel),                              //  output,   width = 21,           .channel
		.src17_startofpacket (cmd_demux_src17_startofpacket),                        //  output,    width = 1,           .startofpacket
		.src17_endofpacket   (cmd_demux_src17_endofpacket),                          //  output,    width = 1,           .endofpacket
		.src18_ready         (cmd_demux_src18_ready),                                //   input,    width = 1,      src18.ready
		.src18_valid         (cmd_demux_src18_valid),                                //  output,    width = 1,           .valid
		.src18_data          (cmd_demux_src18_data),                                 //  output,  width = 123,           .data
		.src18_channel       (cmd_demux_src18_channel),                              //  output,   width = 21,           .channel
		.src18_startofpacket (cmd_demux_src18_startofpacket),                        //  output,    width = 1,           .startofpacket
		.src18_endofpacket   (cmd_demux_src18_endofpacket),                          //  output,    width = 1,           .endofpacket
		.src19_ready         (cmd_demux_src19_ready),                                //   input,    width = 1,      src19.ready
		.src19_valid         (cmd_demux_src19_valid),                                //  output,    width = 1,           .valid
		.src19_data          (cmd_demux_src19_data),                                 //  output,  width = 123,           .data
		.src19_channel       (cmd_demux_src19_channel),                              //  output,   width = 21,           .channel
		.src19_startofpacket (cmd_demux_src19_startofpacket),                        //  output,    width = 1,           .startofpacket
		.src19_endofpacket   (cmd_demux_src19_endofpacket),                          //  output,    width = 1,           .endofpacket
		.src20_ready         (cmd_demux_src20_ready),                                //   input,    width = 1,      src20.ready
		.src20_valid         (cmd_demux_src20_valid),                                //  output,    width = 1,           .valid
		.src20_data          (cmd_demux_src20_data),                                 //  output,  width = 123,           .data
		.src20_channel       (cmd_demux_src20_channel),                              //  output,   width = 21,           .channel
		.src20_startofpacket (cmd_demux_src20_startofpacket),                        //  output,    width = 1,           .startofpacket
		.src20_endofpacket   (cmd_demux_src20_endofpacket)                           //  output,    width = 1,           .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_j54ao4q cmd_demux_001 (
		.clk                (clock_in_out_clk_clk),                                        //   input,    width = 1,        clk.clk
		.reset              (nios2_gen2_reset_reset_bridge_in_reset_reset),                //   input,    width = 1,  clk_reset.reset
		.sink_ready         (nios2_gen2_instruction_master_limiter_cmd_src_ready),         //  output,    width = 1,       sink.ready
		.sink_channel       (nios2_gen2_instruction_master_limiter_cmd_src_channel),       //   input,   width = 21,           .channel
		.sink_data          (nios2_gen2_instruction_master_limiter_cmd_src_data),          //   input,  width = 123,           .data
		.sink_startofpacket (nios2_gen2_instruction_master_limiter_cmd_src_startofpacket), //   input,    width = 1,           .startofpacket
		.sink_endofpacket   (nios2_gen2_instruction_master_limiter_cmd_src_endofpacket),   //   input,    width = 1,           .endofpacket
		.sink_valid         (nios2_gen2_instruction_master_limiter_cmd_valid_data),        //   input,   width = 21, sink_valid.data
		.src0_ready         (cmd_demux_001_src0_ready),                                    //   input,    width = 1,       src0.ready
		.src0_valid         (cmd_demux_001_src0_valid),                                    //  output,    width = 1,           .valid
		.src0_data          (cmd_demux_001_src0_data),                                     //  output,  width = 123,           .data
		.src0_channel       (cmd_demux_001_src0_channel),                                  //  output,   width = 21,           .channel
		.src0_startofpacket (cmd_demux_001_src0_startofpacket),                            //  output,    width = 1,           .startofpacket
		.src0_endofpacket   (cmd_demux_001_src0_endofpacket),                              //  output,    width = 1,           .endofpacket
		.src1_ready         (cmd_demux_001_src1_ready),                                    //   input,    width = 1,       src1.ready
		.src1_valid         (cmd_demux_001_src1_valid),                                    //  output,    width = 1,           .valid
		.src1_data          (cmd_demux_001_src1_data),                                     //  output,  width = 123,           .data
		.src1_channel       (cmd_demux_001_src1_channel),                                  //  output,   width = 21,           .channel
		.src1_startofpacket (cmd_demux_001_src1_startofpacket),                            //  output,    width = 1,           .startofpacket
		.src1_endofpacket   (cmd_demux_001_src1_endofpacket)                               //  output,    width = 1,           .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_src_ready),                           //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_src_valid),                           //  output,    width = 1,          .valid
		.src_data            (cmd_mux_src_data),                            //  output,  width = 123,          .data
		.src_channel         (cmd_mux_src_channel),                         //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_src_startofpacket),                   //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_src_endofpacket),                     //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src0_ready),                        //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src0_valid),                        //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src0_channel),                      //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src0_data),                         //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src0_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src0_endofpacket)                   //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_001 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_001_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_001_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_001_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_001_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_001_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_001_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src1_ready),                        //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src1_valid),                        //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src1_channel),                      //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src1_data),                         //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src1_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src1_endofpacket)                   //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_yf77khy cmd_mux_002 (
		.clk                 (clock_in_out_clk_clk),                         //   input,    width = 1,       clk.clk
		.reset               (nios2_gen2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_002_src_ready),                        //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_002_src_valid),                        //  output,    width = 1,          .valid
		.src_data            (cmd_mux_002_src_data),                         //  output,  width = 123,          .data
		.src_channel         (cmd_mux_002_src_channel),                      //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_002_src_startofpacket),                //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_002_src_endofpacket),                  //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src2_ready),                         //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src2_valid),                         //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src2_channel),                       //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src2_data),                          //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src2_startofpacket),                 //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src2_endofpacket),                   //   input,    width = 1,          .endofpacket
		.sink1_ready         (cmd_demux_001_src0_ready),                     //  output,    width = 1,     sink1.ready
		.sink1_valid         (cmd_demux_001_src0_valid),                     //   input,    width = 1,          .valid
		.sink1_channel       (cmd_demux_001_src0_channel),                   //   input,   width = 21,          .channel
		.sink1_data          (cmd_demux_001_src0_data),                      //   input,  width = 123,          .data
		.sink1_startofpacket (cmd_demux_001_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink1_endofpacket   (cmd_demux_001_src0_endofpacket)                //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_yf77khy cmd_mux_003 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_003_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_003_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_003_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_003_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_003_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_003_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src3_ready),                        //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src3_valid),                        //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src3_channel),                      //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src3_data),                         //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src3_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src3_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink1_ready         (cmd_demux_001_src1_ready),                    //  output,    width = 1,     sink1.ready
		.sink1_valid         (cmd_demux_001_src1_valid),                    //   input,    width = 1,          .valid
		.sink1_channel       (cmd_demux_001_src1_channel),                  //   input,   width = 21,          .channel
		.sink1_data          (cmd_demux_001_src1_data),                     //   input,  width = 123,          .data
		.sink1_startofpacket (cmd_demux_001_src1_startofpacket),            //   input,    width = 1,          .startofpacket
		.sink1_endofpacket   (cmd_demux_001_src1_endofpacket)               //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_004 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_004_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_004_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_004_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_004_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_004_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_004_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src4_ready),                        //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src4_valid),                        //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src4_channel),                      //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src4_data),                         //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src4_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src4_endofpacket)                   //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_005 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_005_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_005_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_005_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_005_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_005_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_005_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src5_ready),                        //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src5_valid),                        //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src5_channel),                      //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src5_data),                         //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src5_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src5_endofpacket)                   //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_006 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_006_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_006_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_006_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_006_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_006_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_006_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src6_ready),                        //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src6_valid),                        //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src6_channel),                      //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src6_data),                         //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src6_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src6_endofpacket)                   //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_007 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_007_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_007_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_007_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_007_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_007_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_007_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src7_ready),                        //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src7_valid),                        //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src7_channel),                      //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src7_data),                         //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src7_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src7_endofpacket)                   //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_008 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_008_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_008_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_008_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_008_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_008_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_008_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src8_ready),                        //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src8_valid),                        //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src8_channel),                      //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src8_data),                         //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src8_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src8_endofpacket)                   //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_009 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_009_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_009_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_009_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_009_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_009_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_009_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src9_ready),                        //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src9_valid),                        //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src9_channel),                      //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src9_data),                         //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src9_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src9_endofpacket)                   //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_010 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_010_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_010_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_010_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_010_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_010_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_010_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src10_ready),                       //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src10_valid),                       //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src10_channel),                     //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src10_data),                        //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src10_startofpacket),               //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src10_endofpacket)                  //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_011 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_011_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_011_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_011_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_011_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_011_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_011_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src11_ready),                       //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src11_valid),                       //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src11_channel),                     //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src11_data),                        //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src11_startofpacket),               //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src11_endofpacket)                  //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_012 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_012_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_012_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_012_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_012_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_012_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_012_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src12_ready),                       //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src12_valid),                       //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src12_channel),                     //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src12_data),                        //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src12_startofpacket),               //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src12_endofpacket)                  //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_013 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_013_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_013_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_013_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_013_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_013_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_013_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src13_ready),                       //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src13_valid),                       //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src13_channel),                     //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src13_data),                        //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src13_startofpacket),               //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src13_endofpacket)                  //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_014 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_014_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_014_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_014_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_014_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_014_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_014_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src14_ready),                       //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src14_valid),                       //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src14_channel),                     //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src14_data),                        //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src14_startofpacket),               //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src14_endofpacket)                  //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_015 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_015_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_015_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_015_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_015_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_015_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_015_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src15_ready),                       //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src15_valid),                       //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src15_channel),                     //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src15_data),                        //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src15_startofpacket),               //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src15_endofpacket)                  //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_016 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_016_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_016_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_016_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_016_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_016_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_016_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src16_ready),                       //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src16_valid),                       //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src16_channel),                     //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src16_data),                        //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src16_startofpacket),               //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src16_endofpacket)                  //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_017 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_017_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_017_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_017_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_017_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_017_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_017_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src17_ready),                       //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src17_valid),                       //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src17_channel),                     //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src17_data),                        //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src17_startofpacket),               //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src17_endofpacket)                  //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_018 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_018_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_018_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_018_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_018_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_018_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_018_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src18_ready),                       //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src18_valid),                       //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src18_channel),                     //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src18_data),                        //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src18_startofpacket),               //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src18_endofpacket)                  //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_019 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_019_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_019_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_019_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_019_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_019_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_019_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src19_ready),                       //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src19_valid),                       //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src19_channel),                     //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src19_data),                        //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src19_startofpacket),               //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src19_endofpacket)                  //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2wxwv4y cmd_mux_020 (
		.clk                 (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset               (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (cmd_mux_020_src_ready),                       //   input,    width = 1,       src.ready
		.src_valid           (cmd_mux_020_src_valid),                       //  output,    width = 1,          .valid
		.src_data            (cmd_mux_020_src_data),                        //  output,  width = 123,          .data
		.src_channel         (cmd_mux_020_src_channel),                     //  output,   width = 21,          .channel
		.src_startofpacket   (cmd_mux_020_src_startofpacket),               //  output,    width = 1,          .startofpacket
		.src_endofpacket     (cmd_mux_020_src_endofpacket),                 //  output,    width = 1,          .endofpacket
		.sink0_ready         (cmd_demux_src20_ready),                       //  output,    width = 1,     sink0.ready
		.sink0_valid         (cmd_demux_src20_valid),                       //   input,    width = 1,          .valid
		.sink0_channel       (cmd_demux_src20_channel),                     //   input,   width = 21,          .channel
		.sink0_data          (cmd_demux_src20_data),                        //   input,  width = 123,          .data
		.sink0_startofpacket (cmd_demux_src20_startofpacket),               //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (cmd_demux_src20_endofpacket)                  //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_002_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_002_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_002_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_002_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_002_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_002_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_src0_ready),                        //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_src0_valid),                        //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_src0_data),                         //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_src0_channel),                      //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_src0_startofpacket),                //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_src0_endofpacket)                   //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_001 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_003_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_003_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_003_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_003_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_003_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_003_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_001_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_001_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_001_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_001_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_001_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_001_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_gvuv5by rsp_demux_002 (
		.clk                (clock_in_out_clk_clk),                         //   input,    width = 1,       clk.clk
		.reset              (nios2_gen2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_004_src_ready),                         //  output,    width = 1,      sink.ready
		.sink_channel       (router_004_src_channel),                       //   input,   width = 21,          .channel
		.sink_data          (router_004_src_data),                          //   input,  width = 123,          .data
		.sink_startofpacket (router_004_src_startofpacket),                 //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_004_src_endofpacket),                   //   input,    width = 1,          .endofpacket
		.sink_valid         (router_004_src_valid),                         //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_002_src0_ready),                     //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_002_src0_valid),                     //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_002_src0_data),                      //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_002_src0_channel),                   //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_002_src0_startofpacket),             //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_002_src0_endofpacket),               //  output,    width = 1,          .endofpacket
		.src1_ready         (rsp_demux_002_src1_ready),                     //   input,    width = 1,      src1.ready
		.src1_valid         (rsp_demux_002_src1_valid),                     //  output,    width = 1,          .valid
		.src1_data          (rsp_demux_002_src1_data),                      //  output,  width = 123,          .data
		.src1_channel       (rsp_demux_002_src1_channel),                   //  output,   width = 21,          .channel
		.src1_startofpacket (rsp_demux_002_src1_startofpacket),             //  output,    width = 1,          .startofpacket
		.src1_endofpacket   (rsp_demux_002_src1_endofpacket)                //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_gvuv5by rsp_demux_003 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_005_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_005_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_005_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_005_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_005_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_005_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_003_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_003_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_003_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_003_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_003_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_003_src0_endofpacket),              //  output,    width = 1,          .endofpacket
		.src1_ready         (rsp_demux_003_src1_ready),                    //   input,    width = 1,      src1.ready
		.src1_valid         (rsp_demux_003_src1_valid),                    //  output,    width = 1,          .valid
		.src1_data          (rsp_demux_003_src1_data),                     //  output,  width = 123,          .data
		.src1_channel       (rsp_demux_003_src1_channel),                  //  output,   width = 21,          .channel
		.src1_startofpacket (rsp_demux_003_src1_startofpacket),            //  output,    width = 1,          .startofpacket
		.src1_endofpacket   (rsp_demux_003_src1_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_004 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_006_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_006_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_006_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_006_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_006_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_006_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_004_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_004_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_004_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_004_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_004_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_004_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_005 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_007_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_007_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_007_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_007_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_007_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_007_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_005_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_005_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_005_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_005_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_005_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_005_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_006 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_008_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_008_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_008_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_008_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_008_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_008_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_006_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_006_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_006_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_006_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_006_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_006_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_007 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_009_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_009_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_009_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_009_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_009_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_009_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_007_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_007_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_007_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_007_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_007_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_007_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_008 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_010_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_010_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_010_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_010_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_010_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_010_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_008_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_008_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_008_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_008_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_008_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_008_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_009 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_011_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_011_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_011_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_011_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_011_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_011_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_009_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_009_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_009_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_009_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_009_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_009_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_010 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_012_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_012_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_012_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_012_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_012_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_012_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_010_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_010_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_010_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_010_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_010_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_010_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_011 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_013_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_013_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_013_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_013_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_013_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_013_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_011_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_011_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_011_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_011_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_011_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_011_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_012 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_014_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_014_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_014_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_014_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_014_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_014_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_012_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_012_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_012_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_012_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_012_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_012_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_013 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_015_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_015_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_015_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_015_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_015_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_015_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_013_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_013_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_013_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_013_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_013_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_013_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_014 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_016_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_016_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_016_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_016_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_016_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_016_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_014_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_014_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_014_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_014_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_014_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_014_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_015 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_017_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_017_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_017_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_017_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_017_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_017_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_015_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_015_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_015_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_015_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_015_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_015_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_016 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_018_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_018_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_018_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_018_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_018_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_018_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_016_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_016_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_016_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_016_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_016_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_016_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_017 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_019_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_019_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_019_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_019_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_019_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_019_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_017_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_017_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_017_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_017_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_017_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_017_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_018 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_020_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_020_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_020_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_020_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_020_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_020_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_018_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_018_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_018_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_018_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_018_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_018_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_019 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_021_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_021_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_021_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_021_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_021_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_021_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_019_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_019_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_019_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_019_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_019_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_019_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_demultiplexer_1921_k7cu52i rsp_demux_020 (
		.clk                (clock_in_out_clk_clk),                        //   input,    width = 1,       clk.clk
		.reset              (jtag_uart_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.sink_ready         (router_022_src_ready),                        //  output,    width = 1,      sink.ready
		.sink_channel       (router_022_src_channel),                      //   input,   width = 21,          .channel
		.sink_data          (router_022_src_data),                         //   input,  width = 123,          .data
		.sink_startofpacket (router_022_src_startofpacket),                //   input,    width = 1,          .startofpacket
		.sink_endofpacket   (router_022_src_endofpacket),                  //   input,    width = 1,          .endofpacket
		.sink_valid         (router_022_src_valid),                        //   input,    width = 1,          .valid
		.src0_ready         (rsp_demux_020_src0_ready),                    //   input,    width = 1,      src0.ready
		.src0_valid         (rsp_demux_020_src0_valid),                    //  output,    width = 1,          .valid
		.src0_data          (rsp_demux_020_src0_data),                     //  output,  width = 123,          .data
		.src0_channel       (rsp_demux_020_src0_channel),                  //  output,   width = 21,          .channel
		.src0_startofpacket (rsp_demux_020_src0_startofpacket),            //  output,    width = 1,          .startofpacket
		.src0_endofpacket   (rsp_demux_020_src0_endofpacket)               //  output,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_2deevpa rsp_mux (
		.clk                  (clock_in_out_clk_clk),                         //   input,    width = 1,       clk.clk
		.reset                (nios2_gen2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready            (rsp_mux_src_ready),                            //   input,    width = 1,       src.ready
		.src_valid            (rsp_mux_src_valid),                            //  output,    width = 1,          .valid
		.src_data             (rsp_mux_src_data),                             //  output,  width = 123,          .data
		.src_channel          (rsp_mux_src_channel),                          //  output,   width = 21,          .channel
		.src_startofpacket    (rsp_mux_src_startofpacket),                    //  output,    width = 1,          .startofpacket
		.src_endofpacket      (rsp_mux_src_endofpacket),                      //  output,    width = 1,          .endofpacket
		.sink0_ready          (rsp_demux_src0_ready),                         //  output,    width = 1,     sink0.ready
		.sink0_valid          (rsp_demux_src0_valid),                         //   input,    width = 1,          .valid
		.sink0_channel        (rsp_demux_src0_channel),                       //   input,   width = 21,          .channel
		.sink0_data           (rsp_demux_src0_data),                          //   input,  width = 123,          .data
		.sink0_startofpacket  (rsp_demux_src0_startofpacket),                 //   input,    width = 1,          .startofpacket
		.sink0_endofpacket    (rsp_demux_src0_endofpacket),                   //   input,    width = 1,          .endofpacket
		.sink1_ready          (rsp_demux_001_src0_ready),                     //  output,    width = 1,     sink1.ready
		.sink1_valid          (rsp_demux_001_src0_valid),                     //   input,    width = 1,          .valid
		.sink1_channel        (rsp_demux_001_src0_channel),                   //   input,   width = 21,          .channel
		.sink1_data           (rsp_demux_001_src0_data),                      //   input,  width = 123,          .data
		.sink1_startofpacket  (rsp_demux_001_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink1_endofpacket    (rsp_demux_001_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink2_ready          (rsp_demux_002_src0_ready),                     //  output,    width = 1,     sink2.ready
		.sink2_valid          (rsp_demux_002_src0_valid),                     //   input,    width = 1,          .valid
		.sink2_channel        (rsp_demux_002_src0_channel),                   //   input,   width = 21,          .channel
		.sink2_data           (rsp_demux_002_src0_data),                      //   input,  width = 123,          .data
		.sink2_startofpacket  (rsp_demux_002_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink2_endofpacket    (rsp_demux_002_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink3_ready          (rsp_demux_003_src0_ready),                     //  output,    width = 1,     sink3.ready
		.sink3_valid          (rsp_demux_003_src0_valid),                     //   input,    width = 1,          .valid
		.sink3_channel        (rsp_demux_003_src0_channel),                   //   input,   width = 21,          .channel
		.sink3_data           (rsp_demux_003_src0_data),                      //   input,  width = 123,          .data
		.sink3_startofpacket  (rsp_demux_003_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink3_endofpacket    (rsp_demux_003_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink4_ready          (rsp_demux_004_src0_ready),                     //  output,    width = 1,     sink4.ready
		.sink4_valid          (rsp_demux_004_src0_valid),                     //   input,    width = 1,          .valid
		.sink4_channel        (rsp_demux_004_src0_channel),                   //   input,   width = 21,          .channel
		.sink4_data           (rsp_demux_004_src0_data),                      //   input,  width = 123,          .data
		.sink4_startofpacket  (rsp_demux_004_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink4_endofpacket    (rsp_demux_004_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink5_ready          (rsp_demux_005_src0_ready),                     //  output,    width = 1,     sink5.ready
		.sink5_valid          (rsp_demux_005_src0_valid),                     //   input,    width = 1,          .valid
		.sink5_channel        (rsp_demux_005_src0_channel),                   //   input,   width = 21,          .channel
		.sink5_data           (rsp_demux_005_src0_data),                      //   input,  width = 123,          .data
		.sink5_startofpacket  (rsp_demux_005_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink5_endofpacket    (rsp_demux_005_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink6_ready          (rsp_demux_006_src0_ready),                     //  output,    width = 1,     sink6.ready
		.sink6_valid          (rsp_demux_006_src0_valid),                     //   input,    width = 1,          .valid
		.sink6_channel        (rsp_demux_006_src0_channel),                   //   input,   width = 21,          .channel
		.sink6_data           (rsp_demux_006_src0_data),                      //   input,  width = 123,          .data
		.sink6_startofpacket  (rsp_demux_006_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink6_endofpacket    (rsp_demux_006_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink7_ready          (rsp_demux_007_src0_ready),                     //  output,    width = 1,     sink7.ready
		.sink7_valid          (rsp_demux_007_src0_valid),                     //   input,    width = 1,          .valid
		.sink7_channel        (rsp_demux_007_src0_channel),                   //   input,   width = 21,          .channel
		.sink7_data           (rsp_demux_007_src0_data),                      //   input,  width = 123,          .data
		.sink7_startofpacket  (rsp_demux_007_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink7_endofpacket    (rsp_demux_007_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink8_ready          (rsp_demux_008_src0_ready),                     //  output,    width = 1,     sink8.ready
		.sink8_valid          (rsp_demux_008_src0_valid),                     //   input,    width = 1,          .valid
		.sink8_channel        (rsp_demux_008_src0_channel),                   //   input,   width = 21,          .channel
		.sink8_data           (rsp_demux_008_src0_data),                      //   input,  width = 123,          .data
		.sink8_startofpacket  (rsp_demux_008_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink8_endofpacket    (rsp_demux_008_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink9_ready          (rsp_demux_009_src0_ready),                     //  output,    width = 1,     sink9.ready
		.sink9_valid          (rsp_demux_009_src0_valid),                     //   input,    width = 1,          .valid
		.sink9_channel        (rsp_demux_009_src0_channel),                   //   input,   width = 21,          .channel
		.sink9_data           (rsp_demux_009_src0_data),                      //   input,  width = 123,          .data
		.sink9_startofpacket  (rsp_demux_009_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink9_endofpacket    (rsp_demux_009_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink10_ready         (rsp_demux_010_src0_ready),                     //  output,    width = 1,    sink10.ready
		.sink10_valid         (rsp_demux_010_src0_valid),                     //   input,    width = 1,          .valid
		.sink10_channel       (rsp_demux_010_src0_channel),                   //   input,   width = 21,          .channel
		.sink10_data          (rsp_demux_010_src0_data),                      //   input,  width = 123,          .data
		.sink10_startofpacket (rsp_demux_010_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink10_endofpacket   (rsp_demux_010_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink11_ready         (rsp_demux_011_src0_ready),                     //  output,    width = 1,    sink11.ready
		.sink11_valid         (rsp_demux_011_src0_valid),                     //   input,    width = 1,          .valid
		.sink11_channel       (rsp_demux_011_src0_channel),                   //   input,   width = 21,          .channel
		.sink11_data          (rsp_demux_011_src0_data),                      //   input,  width = 123,          .data
		.sink11_startofpacket (rsp_demux_011_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink11_endofpacket   (rsp_demux_011_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink12_ready         (rsp_demux_012_src0_ready),                     //  output,    width = 1,    sink12.ready
		.sink12_valid         (rsp_demux_012_src0_valid),                     //   input,    width = 1,          .valid
		.sink12_channel       (rsp_demux_012_src0_channel),                   //   input,   width = 21,          .channel
		.sink12_data          (rsp_demux_012_src0_data),                      //   input,  width = 123,          .data
		.sink12_startofpacket (rsp_demux_012_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink12_endofpacket   (rsp_demux_012_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink13_ready         (rsp_demux_013_src0_ready),                     //  output,    width = 1,    sink13.ready
		.sink13_valid         (rsp_demux_013_src0_valid),                     //   input,    width = 1,          .valid
		.sink13_channel       (rsp_demux_013_src0_channel),                   //   input,   width = 21,          .channel
		.sink13_data          (rsp_demux_013_src0_data),                      //   input,  width = 123,          .data
		.sink13_startofpacket (rsp_demux_013_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink13_endofpacket   (rsp_demux_013_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink14_ready         (rsp_demux_014_src0_ready),                     //  output,    width = 1,    sink14.ready
		.sink14_valid         (rsp_demux_014_src0_valid),                     //   input,    width = 1,          .valid
		.sink14_channel       (rsp_demux_014_src0_channel),                   //   input,   width = 21,          .channel
		.sink14_data          (rsp_demux_014_src0_data),                      //   input,  width = 123,          .data
		.sink14_startofpacket (rsp_demux_014_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink14_endofpacket   (rsp_demux_014_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink15_ready         (rsp_demux_015_src0_ready),                     //  output,    width = 1,    sink15.ready
		.sink15_valid         (rsp_demux_015_src0_valid),                     //   input,    width = 1,          .valid
		.sink15_channel       (rsp_demux_015_src0_channel),                   //   input,   width = 21,          .channel
		.sink15_data          (rsp_demux_015_src0_data),                      //   input,  width = 123,          .data
		.sink15_startofpacket (rsp_demux_015_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink15_endofpacket   (rsp_demux_015_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink16_ready         (rsp_demux_016_src0_ready),                     //  output,    width = 1,    sink16.ready
		.sink16_valid         (rsp_demux_016_src0_valid),                     //   input,    width = 1,          .valid
		.sink16_channel       (rsp_demux_016_src0_channel),                   //   input,   width = 21,          .channel
		.sink16_data          (rsp_demux_016_src0_data),                      //   input,  width = 123,          .data
		.sink16_startofpacket (rsp_demux_016_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink16_endofpacket   (rsp_demux_016_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink17_ready         (rsp_demux_017_src0_ready),                     //  output,    width = 1,    sink17.ready
		.sink17_valid         (rsp_demux_017_src0_valid),                     //   input,    width = 1,          .valid
		.sink17_channel       (rsp_demux_017_src0_channel),                   //   input,   width = 21,          .channel
		.sink17_data          (rsp_demux_017_src0_data),                      //   input,  width = 123,          .data
		.sink17_startofpacket (rsp_demux_017_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink17_endofpacket   (rsp_demux_017_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink18_ready         (rsp_demux_018_src0_ready),                     //  output,    width = 1,    sink18.ready
		.sink18_valid         (rsp_demux_018_src0_valid),                     //   input,    width = 1,          .valid
		.sink18_channel       (rsp_demux_018_src0_channel),                   //   input,   width = 21,          .channel
		.sink18_data          (rsp_demux_018_src0_data),                      //   input,  width = 123,          .data
		.sink18_startofpacket (rsp_demux_018_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink18_endofpacket   (rsp_demux_018_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink19_ready         (rsp_demux_019_src0_ready),                     //  output,    width = 1,    sink19.ready
		.sink19_valid         (rsp_demux_019_src0_valid),                     //   input,    width = 1,          .valid
		.sink19_channel       (rsp_demux_019_src0_channel),                   //   input,   width = 21,          .channel
		.sink19_data          (rsp_demux_019_src0_data),                      //   input,  width = 123,          .data
		.sink19_startofpacket (rsp_demux_019_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink19_endofpacket   (rsp_demux_019_src0_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink20_ready         (rsp_demux_020_src0_ready),                     //  output,    width = 1,    sink20.ready
		.sink20_valid         (rsp_demux_020_src0_valid),                     //   input,    width = 1,          .valid
		.sink20_channel       (rsp_demux_020_src0_channel),                   //   input,   width = 21,          .channel
		.sink20_data          (rsp_demux_020_src0_data),                      //   input,  width = 123,          .data
		.sink20_startofpacket (rsp_demux_020_src0_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink20_endofpacket   (rsp_demux_020_src0_endofpacket)                //   input,    width = 1,          .endofpacket
	);

	system_altera_merlin_multiplexer_1922_s5qvfri rsp_mux_001 (
		.clk                 (clock_in_out_clk_clk),                         //   input,    width = 1,       clk.clk
		.reset               (nios2_gen2_reset_reset_bridge_in_reset_reset), //   input,    width = 1, clk_reset.reset
		.src_ready           (rsp_mux_001_src_ready),                        //   input,    width = 1,       src.ready
		.src_valid           (rsp_mux_001_src_valid),                        //  output,    width = 1,          .valid
		.src_data            (rsp_mux_001_src_data),                         //  output,  width = 123,          .data
		.src_channel         (rsp_mux_001_src_channel),                      //  output,   width = 21,          .channel
		.src_startofpacket   (rsp_mux_001_src_startofpacket),                //  output,    width = 1,          .startofpacket
		.src_endofpacket     (rsp_mux_001_src_endofpacket),                  //  output,    width = 1,          .endofpacket
		.sink0_ready         (rsp_demux_002_src1_ready),                     //  output,    width = 1,     sink0.ready
		.sink0_valid         (rsp_demux_002_src1_valid),                     //   input,    width = 1,          .valid
		.sink0_channel       (rsp_demux_002_src1_channel),                   //   input,   width = 21,          .channel
		.sink0_data          (rsp_demux_002_src1_data),                      //   input,  width = 123,          .data
		.sink0_startofpacket (rsp_demux_002_src1_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink0_endofpacket   (rsp_demux_002_src1_endofpacket),               //   input,    width = 1,          .endofpacket
		.sink1_ready         (rsp_demux_003_src1_ready),                     //  output,    width = 1,     sink1.ready
		.sink1_valid         (rsp_demux_003_src1_valid),                     //   input,    width = 1,          .valid
		.sink1_channel       (rsp_demux_003_src1_channel),                   //   input,   width = 21,          .channel
		.sink1_data          (rsp_demux_003_src1_data),                      //   input,  width = 123,          .data
		.sink1_startofpacket (rsp_demux_003_src1_startofpacket),             //   input,    width = 1,          .startofpacket
		.sink1_endofpacket   (rsp_demux_003_src1_endofpacket)                //   input,    width = 1,          .endofpacket
	);

endmodule
